mirror of
https://github.com/xcat2/xNBA.git
synced 2025-01-05 11:05:07 +00:00
Symbol fixups
This commit is contained in:
Michael Brown
parent
3c2851e563
commit
c112f12c5b
@ -141,13 +141,17 @@ static unsigned long ioaddr;
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/* transmit descriptor and buffer */
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#define NTXD 2
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static struct txdesc txd[NTXD] __attribute__ ((aligned(4)));
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static unsigned char txb[BUFLEN] __attribute__ ((aligned(4)));
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/* receive descriptor(s) and buffer(s) */
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#define NRXD 4
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static struct rxdesc rxd[NRXD] __attribute__ ((aligned(4)));
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static unsigned char rxb[NRXD * BUFLEN] __attribute__ ((aligned(4)));
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struct {
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struct txdesc txd[NTXD] __attribute__ ((aligned(4)));
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unsigned char txb[BUFLEN] __attribute__ ((aligned(4)));
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struct rxdesc rxd[NRXD] __attribute__ ((aligned(4)));
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unsigned char rxb[NRXD * BUFLEN] __attribute__ ((aligned(4)));
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} davicom_bufs __shared;
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#define txd davicom_bufs.txd
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#define txb davicom_bufs.txb
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#define rxd davicom_bufs.rxd
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#define rxb davicom_bufs.rxb
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static int rxd_tail;
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static int TxPtr;
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@ -150,7 +150,7 @@ struct rx_desc {
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u32 /* struct rx_desc * */ next_rx_desc;
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} __attribute__ ((aligned(32)));
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struct dmfe_private {
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static struct dmfe_private {
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u32 chip_id; /* Chip vendor/Device ID */
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u32 chip_revision; /* Chip revision */
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u32 cr0_data;
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@ -214,26 +214,21 @@ static u8 SF_mode; /* Special Function: 1:VLAN, 2:RX Flow Control
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/**********************************************
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* Descriptor Ring and Buffer defination
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***********************************************/
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/* Define the TX Descriptor */
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static struct tx_desc txd[TX_DESC_CNT]
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__attribute__ ((aligned(32)));
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/* Create a static buffer of size PKT_BUF_SZ for each TX Descriptor.
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All descriptors point to a part of this buffer */
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static unsigned char txb[TX_BUF_ALLOC * TX_DESC_CNT]
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__attribute__ ((aligned(32)));
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/* Define the RX Descriptor */
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static struct rx_desc rxd[RX_DESC_CNT]
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__attribute__ ((aligned(32)));
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/* Create a static buffer of size PKT_BUF_SZ for each RX Descriptor.
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All descriptors point to a part of this buffer */
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static unsigned char rxb[RX_ALLOC_SIZE * RX_DESC_CNT]
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__attribute__ ((aligned(32)));
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struct {
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struct tx_desc txd[TX_DESC_CNT] __attribute__ ((aligned(32)));
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unsigned char txb[TX_BUF_ALLOC * TX_DESC_CNT]
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__attribute__ ((aligned(32)));
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struct rx_desc rxd[RX_DESC_CNT] __attribute__ ((aligned(32)));
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unsigned char rxb[RX_ALLOC_SIZE * RX_DESC_CNT]
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__attribute__ ((aligned(32)));
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} dmfe_bufs __shared;
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#define txd dmfe_bufs.txd
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#define txb dmfe_bufs.txb
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#define rxd dmfe_bufs.rxd
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#define rxb dmfe_bufs.rxb
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/* NIC specific static variables go here */
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long int BASE;
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static long int BASE;
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static u16 read_srom_word(long ioaddr, int offset);
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static void dmfe_init_dm910x(struct nic *nic);
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@ -89,9 +89,12 @@ static struct nic_operations e1000_operations;
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static struct pci_driver e1000_driver;
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static struct e1000_hw hw;
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static char tx_pool[128 + 16];
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static char rx_pool[128 + 16];
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static char packet[2096];
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struct {
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char tx_pool[128 + 16];
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char rx_pool[128 + 16];
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char packet[2096];
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} e1000_bufs __shared;
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static struct e1000_tx_desc *tx_base;
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static struct e1000_rx_desc *rx_base;
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@ -171,13 +174,13 @@ static void e1000_irq(struct nic *nic, irq_action_t action);
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#define E1000_WRITE_FLUSH(a) {uint32_t x; x = E1000_READ_REG(a, STATUS);}
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uint32_t
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static inline uint32_t
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e1000_io_read(struct e1000_hw *hw __unused, uint32_t port)
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{
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return inl(port);
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}
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void
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static inline void
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e1000_io_write(struct e1000_hw *hw __unused, uint32_t port, uint32_t value)
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{
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outl(value, port);
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@ -724,11 +727,10 @@ e1000_clear_vfta(struct e1000_hw *hw)
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* hw - Struct containing variables accessed by shared code
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* offset - offset to write to * value - value to write
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*****************************************************************************/
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void e1000_write_reg_io(struct e1000_hw *hw, uint32_t offset, uint32_t value){
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uint32_t io_addr = hw->io_base;
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uint32_t io_data = hw->io_base + 4;
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e1000_io_write(hw, io_addr, offset);
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e1000_io_write(hw, io_data, value);
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static inline void e1000_write_reg_io(struct e1000_hw *hw, uint32_t offset,
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uint32_t value){
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e1000_io_write(hw, hw->io_base, offset);
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e1000_io_write(hw, hw->io_base + 4, value);
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}
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/******************************************************************************
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@ -3362,7 +3364,7 @@ static void fill_rx (void)
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rd = rx_base + rx_tail;
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rx_tail = (rx_tail + 1) % 8;
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memset (rd, 0, 16);
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rd->buffer_addr = virt_to_bus(&packet);
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rd->buffer_addr = virt_to_bus(&e1000_bufs.packet);
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E1000_WRITE_REG (&hw, RDT, rx_tail);
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}
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@ -3371,7 +3373,7 @@ static void init_descriptor (void)
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unsigned long ptr;
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unsigned long tctl;
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ptr = virt_to_phys(tx_pool);
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ptr = virt_to_phys(e1000_bufs.tx_pool);
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if (ptr & 0xf)
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ptr = (ptr + 0x10) & (~0xf);
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@ -3409,7 +3411,7 @@ static void init_descriptor (void)
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rx_tail = 0;
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/* disable receive */
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E1000_WRITE_REG (&hw, RCTL, 0);
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ptr = virt_to_phys(rx_pool);
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ptr = virt_to_phys(e1000_bufs.rx_pool);
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if (ptr & 0xf)
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ptr = (ptr + 0x10) & (~0xf);
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rx_base = phys_to_virt(ptr);
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@ -3454,7 +3456,7 @@ e1000_poll (struct nic *nic, int retrieve)
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if ( ! retrieve ) return 1;
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// printf("recv: packet %! -> %! len=%d \n", packet+6, packet,rd->Length);
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memcpy (nic->packet, packet, rd->length);
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memcpy (nic->packet, e1000_bufs.packet, rd->length);
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nic->packetlen = rd->length;
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fill_rx ();
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@ -262,7 +262,10 @@ static struct nic_operations eepro100_operations;
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static struct pci_driver eepro100_driver;
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#define RXFD_COUNT 4
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static struct RxFD rxfds[RXFD_COUNT];
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struct {
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struct RxFD rxfds[RXFD_COUNT];
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} eepro100_bufs __shared;
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#define rxfds eepro100_bufs.rxfds
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static unsigned int rxfd = 0;
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static int congenb = 0; /* Enable congestion control in the DP83840. */
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@ -86,12 +86,18 @@ static unsigned int cur_rx, cur_tx; /* The next free ring entry */
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static unsigned short eeprom[64];
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#endif
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static signed char phys[4]; /* MII device addresses. */
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static struct epic_rx_desc rx_ring[RX_RING_SIZE]
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struct {
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struct epic_rx_desc rx_ring[RX_RING_SIZE]
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__attribute__ ((aligned(4)));
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static struct epic_tx_desc tx_ring[TX_RING_SIZE]
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struct epic_tx_desc tx_ring[TX_RING_SIZE]
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__attribute__ ((aligned(4)));
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static unsigned char rx_packet[PKT_BUF_SZ * RX_RING_SIZE];
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static unsigned char tx_packet[PKT_BUF_SZ * TX_RING_SIZE];
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unsigned char rx_packet[PKT_BUF_SZ * RX_RING_SIZE];
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unsigned char tx_packet[PKT_BUF_SZ * TX_RING_SIZE];
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} epic100_bufs __shared;
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#define rx_ring epic100_bufs.rx_ring
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#define tx_ring epic100_bufs.tx_ring
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#define rx_packet epic100_bufs.rx_packet
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#define tx_packet epic100_bufs.tx_packet
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/***********************************************************************/
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/* Externally visible functions */
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@ -71,7 +71,7 @@ typedef signed int s32;
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#define virt_to_le32desc(addr) cpu_to_le32(virt_to_bus(addr))
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#define le32desc_to_virt(addr) bus_to_virt(le32_to_cpu(addr))
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unsigned long BASE;
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static unsigned long BASE;
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/* NIC specific static variables go here */
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@ -290,24 +290,20 @@ struct ring_desc {
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};
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/* Define the TX Descriptor */
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static struct ring_desc tx_ring[TX_RING];
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/* Create a static buffer of size RX_BUF_SZ for each
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TX Descriptor. All descriptors point to a
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part of this buffer */
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static unsigned char txb[TX_RING * RX_NIC_BUFSIZE];
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/* Define the TX Descriptor */
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static struct ring_desc rx_ring[RX_RING];
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/* Create a static buffer of size RX_BUF_SZ for each
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RX Descriptor All descriptors point to a
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part of this buffer */
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static unsigned char rxb[RX_RING * RX_NIC_BUFSIZE];
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/* Define the TX and RX Descriptor and Buffers */
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struct {
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struct ring_desc tx_ring[TX_RING];
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unsigned char txb[TX_RING * RX_NIC_BUFSIZE];
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struct ring_desc rx_ring[RX_RING];
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unsigned char rxb[RX_RING * RX_NIC_BUFSIZE];
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} forcedeth_bufs __shared;
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#define tx_ring forcedeth_bufs.tx_ring
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#define rx_ring forcedeth_bufs.rx_ring
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#define txb forcedeth_bufs.txb
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#define rxb forcedeth_bufs.rxb
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/* Private Storage for the NIC */
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struct forcedeth_private {
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static struct forcedeth_private {
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/* General data:
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* Locking: spin_lock(&np->lock); */
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int in_shutdown;
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@ -322,19 +318,13 @@ struct forcedeth_private {
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/* rx specific fields.
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* Locking: Within irq hander or disable_irq+spin_lock(&np->lock);
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*/
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struct ring_desc *rx_ring;
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unsigned int cur_rx, refill_rx;
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struct sk_buff *rx_skbuff[RX_RING];
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u32 rx_dma[RX_RING];
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unsigned int rx_buf_sz;
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/*
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* tx specific fields.
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*/
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struct ring_desc *tx_ring;
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unsigned int next_tx, nic_tx;
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struct sk_buff *tx_skbuff[TX_RING];
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u32 tx_dma[TX_RING];
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u16 tx_flags;
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} npx;
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@ -368,16 +368,14 @@ enum tx_desc_control_bits {
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#define LinkIsUp2 0x00040000
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/* Create a static buffer of size PKT_BUF_SZ for each
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TX Descriptor. All descriptors point to a
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RX and TX Descriptor. All descriptors point to a
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part of this buffer */
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static u8 txb[PKT_BUF_SZ * TX_RING_SIZE]
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__attribute__ ((aligned(8)));
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/* Create a static buffer of size PKT_BUF_SZ for each
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RX Descriptor All descriptors point to a
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part of this buffer */
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static u8 rxb[PKT_BUF_SZ * RX_RING_SIZE]
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__attribute__ ((aligned(8)));
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struct {
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u8 txb[PKT_BUF_SZ * TX_RING_SIZE] __attribute__ ((aligned(8)));
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u8 rxb[PKT_BUF_SZ * RX_RING_SIZE] __attribute__ ((aligned(8)));
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} mtd80x_bufs __shared;
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#define txb mtd80x_bufs.txb
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#define rxb mtd80x_bufs.rxb
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/* The Tulip Rx and Tx buffer descriptors. */
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struct mtd_desc
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@ -205,11 +205,16 @@ static unsigned int tx_config;
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longword aligned
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*/
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static BufferDesc txd __attribute__ ((aligned(4)));
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static BufferDesc rxd[NUM_RX_DESC] __attribute__ ((aligned(4)));
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static unsigned char txb[TX_BUF_SIZE] __attribute__ ((aligned(4)));
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static unsigned char rxb[NUM_RX_DESC * RX_BUF_SIZE] __attribute__ ((aligned(4)));
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struct {
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BufferDesc txd __attribute__ ((aligned(4)));
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BufferDesc rxd[NUM_RX_DESC] __attribute__ ((aligned(4)));
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unsigned char txb[TX_BUF_SIZE] __attribute__ ((aligned(4)));
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unsigned char rxb[NUM_RX_DESC * RX_BUF_SIZE] __attribute__ ((aligned(4)));
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} natsemi_bufs __shared;
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#define txd natsemi_bufs.txd
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#define rxd natsemi_bufs.rxd
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#define txb natsemi_bufs.txb
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#define rxb natsemi_bufs.rxb
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/* Function Prototypes */
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@ -393,24 +393,18 @@ struct ns83820_private {
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} nsx;
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static struct ns83820_private *ns;
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/* Define the TX Descriptor */
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static struct ring_desc tx_ring[NR_TX_DESC]
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__attribute__ ((aligned(8)));
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/* Create a static buffer of size REAL_RX_BUF_SIZE for each
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TX Descriptor. All descriptors point to a
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part of this buffer */
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static unsigned char txb[NR_TX_DESC * REAL_RX_BUF_SIZE];
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/* Define the TX Descriptor */
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static struct ring_desc rx_ring[NR_RX_DESC]
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__attribute__ ((aligned(8)));
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/* Create a static buffer of size REAL_RX_BUF_SIZE for each
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RX Descriptor All descriptors point to a
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part of this buffer */
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static unsigned char rxb[NR_RX_DESC * REAL_RX_BUF_SIZE]
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__attribute__ ((aligned(8)));
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/* Define the TX and RX Descriptor and Buffers */
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struct {
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struct ring_desc tx_ring[NR_TX_DESC] __attribute__ ((aligned(8)));
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unsigned char txb[NR_TX_DESC * REAL_RX_BUF_SIZE];
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struct ring_desc rx_ring[NR_RX_DESC] __attribute__ ((aligned(8)));
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unsigned char rxb[NR_RX_DESC * REAL_RX_BUF_SIZE]
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__attribute__ ((aligned(8)));
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} ns83820_bufs __shared;
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#define tx_ring ns83820_bufs.tx_ring
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#define rx_ring ns83820_bufs.rx_ring
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#define txb ns83820_bufs.txb
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#define rxb ns83820_bufs.rxb
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static void phy_intr(struct nic *nic __unused)
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{
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@ -182,20 +182,6 @@ static int full_duplex[MAX_UNITS];
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#define PCNET32_TOTAL_SIZE 0x20
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/* Buffers for the tx and Rx */
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/* Create a static buffer of size PKT_BUF_SZ for each
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TX Descriptor. All descriptors point to a
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part of this buffer */
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static unsigned char txb[PKT_BUF_SZ * TX_RING_SIZE];
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// __attribute__ ((aligned(16)));
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/* Create a static buffer of size PKT_BUF_SZ for each
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RX Descriptor All descriptors point to a
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part of this buffer */
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static unsigned char rxb[RX_RING_SIZE * PKT_BUF_SZ];
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// __attribute__ ((aligned(16)));
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/* The PCNET32 Rx and Tx ring descriptors. */
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struct pcnet32_rx_head {
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u32 base;
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@ -235,14 +221,15 @@ struct pcnet32_access {
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void (*reset) (unsigned long);
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};
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/* Define the TX Descriptor */
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static struct pcnet32_tx_head tx_ring[TX_RING_SIZE]
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__attribute__ ((aligned(16)));
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/* Define the RX Descriptor */
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static struct pcnet32_rx_head rx_ring[RX_RING_SIZE]
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__attribute__ ((aligned(16)));
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/* Define the TX and RX Descriptors and Rings */
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struct {
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struct pcnet32_tx_head tx_ring[TX_RING_SIZE]
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__attribute__ ((aligned(16)));
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struct pcnet32_rx_head rx_ring[RX_RING_SIZE]
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__attribute__ ((aligned(16)));
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unsigned char txb[PKT_BUF_SZ * TX_RING_SIZE];
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unsigned char rxb[RX_RING_SIZE * PKT_BUF_SZ];
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} pcnet32_bufs __shared;
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/* May need to be moved to mii.h */
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struct mii_if_info {
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@ -411,16 +398,17 @@ static int pcnet32_init_ring(struct nic *nic)
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lp->cur_rx = lp->cur_tx = 0;
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for (i = 0; i < RX_RING_SIZE; i++) {
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rx_ring[i].base = (u32) virt_to_le32desc(&rxb[i]);
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rx_ring[i].buf_length = le16_to_cpu(-PKT_BUF_SZ);
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rx_ring[i].status = le16_to_cpu(0x8000);
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pcnet32_bufs.rx_ring[i].base =
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virt_to_le32desc(&pcnet32_bufs.rxb[i]);
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pcnet32_bufs.rx_ring[i].buf_length = le16_to_cpu(-PKT_BUF_SZ);
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pcnet32_bufs.rx_ring[i].status = le16_to_cpu(0x8000);
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}
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/* The Tx buffer address is filled in as needed, but we do need to clear
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the upper ownership bit. */
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for (i = 0; i < TX_RING_SIZE; i++) {
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tx_ring[i].base = 0;
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tx_ring[i].status = 0;
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pcnet32_bufs.tx_ring[i].base = 0;
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pcnet32_bufs.tx_ring[i].status = 0;
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}
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@ -428,8 +416,8 @@ static int pcnet32_init_ring(struct nic *nic)
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le16_to_cpu(TX_RING_LEN_BITS | RX_RING_LEN_BITS);
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for (i = 0; i < 6; i++)
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lp->init_block.phys_addr[i] = nic->node_addr[i];
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lp->init_block.rx_ring = (u32) virt_to_le32desc(&rx_ring[0]);
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lp->init_block.tx_ring = (u32) virt_to_le32desc(&tx_ring[0]);
|
||||
lp->init_block.rx_ring = virt_to_le32desc(&pcnet32_bufs.rx_ring[0]);
|
||||
lp->init_block.tx_ring = virt_to_le32desc(&pcnet32_bufs.tx_ring[0]);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -547,11 +535,11 @@ static int pcnet32_poll(struct nic *nic __unused, int retrieve)
|
||||
/* nic->packet should contain data on return */
|
||||
/* nic->packetlen should contain length of data */
|
||||
|
||||
int status;
|
||||
signed char status;
|
||||
int entry;
|
||||
|
||||
entry = lp->cur_rx & RX_RING_MOD_MASK;
|
||||
status = ((short) le16_to_cpu(rx_ring[entry].status) >> 8);
|
||||
status = (le16_to_cpu(pcnet32_bufs.rx_ring[entry].status) >> 8);
|
||||
|
||||
if (status < 0)
|
||||
return 0;
|
||||
@ -560,13 +548,16 @@ static int pcnet32_poll(struct nic *nic __unused, int retrieve)
|
||||
|
||||
if (status == 0x03) {
|
||||
nic->packetlen =
|
||||
(le32_to_cpu(rx_ring[entry].msg_length) & 0xfff) - 4;
|
||||
memcpy(nic->packet, &rxb[entry], nic->packetlen);
|
||||
(le32_to_cpu(pcnet32_bufs.rx_ring[entry].msg_length)
|
||||
& 0xfff) - 4;
|
||||
memcpy(nic->packet, &pcnet32_bufs.rxb[entry], nic->packetlen);
|
||||
|
||||
/* Andrew Boyd of QNX reports that some revs of the 79C765
|
||||
* clear the buffer length */
|
||||
rx_ring[entry].buf_length = le16_to_cpu(-PKT_BUF_SZ);
|
||||
rx_ring[entry].status |= le16_to_cpu(0x8000); /* prime for next receive */
|
||||
pcnet32_bufs.rx_ring[entry].buf_length
|
||||
= le16_to_cpu(-PKT_BUF_SZ);
|
||||
/* prime for next receive */
|
||||
pcnet32_bufs.rx_ring[entry].status |= le16_to_cpu(0x8000);
|
||||
/* Switch to the next Rx ring buffer */
|
||||
lp->cur_rx++;
|
||||
|
||||
@ -594,7 +585,7 @@ static void pcnet32_transmit(struct nic *nic __unused, const char *d, /* Destina
|
||||
|
||||
status = 0x8300;
|
||||
/* point to the current txb incase multiple tx_rings are used */
|
||||
ptxb = txb + (lp->cur_tx * PKT_BUF_SZ);
|
||||
ptxb = pcnet32_bufs.txb + (lp->cur_tx * PKT_BUF_SZ);
|
||||
|
||||
/* copy the packet to ring buffer */
|
||||
memcpy(ptxb, d, ETH_ALEN); /* dst */
|
||||
@ -607,12 +598,12 @@ static void pcnet32_transmit(struct nic *nic __unused, const char *d, /* Destina
|
||||
while (s < ETH_ZLEN) /* pad to min length */
|
||||
ptxb[s++] = '\0';
|
||||
|
||||
tx_ring[entry].length = le16_to_cpu(-s);
|
||||
tx_ring[entry].misc = 0x00000000;
|
||||
tx_ring[entry].base = (u32) virt_to_le32desc(ptxb);
|
||||
pcnet32_bufs.tx_ring[entry].length = le16_to_cpu(-s);
|
||||
pcnet32_bufs.tx_ring[entry].misc = 0x00000000;
|
||||
pcnet32_bufs.tx_ring[entry].base = (u32) virt_to_le32desc(ptxb);
|
||||
|
||||
/* we set the top byte as the very last thing */
|
||||
tx_ring[entry].status = le16_to_cpu(status);
|
||||
pcnet32_bufs.tx_ring[entry].status = le16_to_cpu(status);
|
||||
|
||||
|
||||
/* Trigger an immediate send poll */
|
||||
@ -622,14 +613,14 @@ static void pcnet32_transmit(struct nic *nic __unused, const char *d, /* Destina
|
||||
lp->cur_tx = 0; /* (lp->cur_tx + 1); */
|
||||
time = currticks() + TICKS_PER_SEC; /* wait one second */
|
||||
while (currticks() < time &&
|
||||
((short) le16_to_cpu(tx_ring[entry].status) < 0));
|
||||
((short) le16_to_cpu(pcnet32_bufs.tx_ring[entry].status) < 0));
|
||||
|
||||
if ((short) le16_to_cpu(tx_ring[entry].status) < 0)
|
||||
if ((short) le16_to_cpu(pcnet32_bufs.tx_ring[entry].status) < 0)
|
||||
printf("PCNET32 timed out on transmit\n");
|
||||
|
||||
/* Stop pointing at the current txb
|
||||
* otherwise the card continues to send the packet */
|
||||
tx_ring[entry].base = 0;
|
||||
pcnet32_bufs.tx_ring[entry].base = 0;
|
||||
|
||||
}
|
||||
|
||||
@ -882,8 +873,8 @@ static int pcnet32_probe ( struct nic *nic, struct pci_device *pci ) {
|
||||
lp->init_block.phys_addr[i] = nic->node_addr[i];
|
||||
lp->init_block.filter[0] = 0xffffffff;
|
||||
lp->init_block.filter[1] = 0xffffffff;
|
||||
lp->init_block.rx_ring = virt_to_bus(&rx_ring);
|
||||
lp->init_block.tx_ring = virt_to_bus(&tx_ring);
|
||||
lp->init_block.rx_ring = virt_to_bus(&pcnet32_bufs.rx_ring);
|
||||
lp->init_block.tx_ring = virt_to_bus(&pcnet32_bufs.tx_ring);
|
||||
|
||||
/* switch pcnet32 to 32bit mode */
|
||||
a->write_bcr(ioaddr, 20, 2);
|
||||
|
||||
@ -169,8 +169,12 @@ enum rx_mode_bits {
|
||||
static unsigned int cur_rx,cur_tx;
|
||||
|
||||
/* The RTL8139 can only transmit from a contiguous, aligned memory block. */
|
||||
static unsigned char tx_buffer[TX_BUF_SIZE] __attribute__((aligned(4)));
|
||||
static unsigned char rx_ring[RX_BUF_LEN+16] __attribute__((aligned(4)));
|
||||
struct {
|
||||
unsigned char tx_buffer[TX_BUF_SIZE] __attribute__((aligned(4)));
|
||||
unsigned char rx_ring[RX_BUF_LEN+16] __attribute__((aligned(4)));
|
||||
} rtl8139_bufs __shared;
|
||||
#define tx_buffer rtl8139_bufs.tx_buffer
|
||||
#define rx_ring rtl8139_bufs.rx_ring
|
||||
|
||||
static int rtl8139_probe(struct nic *nic,struct pci_device *pci);
|
||||
static int read_eeprom(struct nic *nic, int location, int addr_len);
|
||||
|
||||
@ -64,10 +64,16 @@ static unsigned int cur_phy;
|
||||
|
||||
static unsigned int cur_rx;
|
||||
|
||||
static BufferDesc txd;
|
||||
static BufferDesc rxd[NUM_RX_DESC];
|
||||
static unsigned char txb[TX_BUF_SIZE];
|
||||
static unsigned char rxb[NUM_RX_DESC * RX_BUF_SIZE];
|
||||
struct {
|
||||
BufferDesc txd;
|
||||
BufferDesc rxd[NUM_RX_DESC];
|
||||
unsigned char txb[TX_BUF_SIZE];
|
||||
unsigned char rxb[NUM_RX_DESC * RX_BUF_SIZE];
|
||||
} sis900_bufs __shared;
|
||||
#define txd sis900_bufs.txd
|
||||
#define rxd sis900_bufs.rxd
|
||||
#define txb sis900_bufs.txb
|
||||
#define rxb sis900_bufs.rxb
|
||||
|
||||
#if 0
|
||||
static struct mac_chip_info {
|
||||
|
||||
@ -100,7 +100,7 @@ static void TLan_MiiSync(u16);
|
||||
static void TLan_MiiWriteReg(struct nic *nic __unused, u16, u16, u16);
|
||||
|
||||
|
||||
const char *media[] = {
|
||||
static const char *media[] = {
|
||||
"10BaseT-HD ", "10BaseT-FD ", "100baseTx-HD ",
|
||||
"100baseTx-FD", "100baseT4", 0
|
||||
};
|
||||
@ -187,21 +187,26 @@ struct TLanList {
|
||||
} buffer[TLAN_BUFFERS_PER_LIST];
|
||||
};
|
||||
|
||||
struct TLanList tx_ring[TLAN_NUM_TX_LISTS];
|
||||
static unsigned char txb[TLAN_MAX_FRAME_SIZE * TLAN_NUM_TX_LISTS];
|
||||
|
||||
struct TLanList rx_ring[TLAN_NUM_RX_LISTS];
|
||||
static unsigned char rxb[TLAN_MAX_FRAME_SIZE * TLAN_NUM_RX_LISTS];
|
||||
struct {
|
||||
struct TLanList tx_ring[TLAN_NUM_TX_LISTS];
|
||||
unsigned char txb[TLAN_MAX_FRAME_SIZE * TLAN_NUM_TX_LISTS];
|
||||
struct TLanList rx_ring[TLAN_NUM_RX_LISTS];
|
||||
unsigned char rxb[TLAN_MAX_FRAME_SIZE * TLAN_NUM_RX_LISTS];
|
||||
} tlan_buffers __shared;
|
||||
#define tx_ring tlan_buffers.tx_ring
|
||||
#define txb tlan_buffers.txb
|
||||
#define rx_ring tlan_buffers.rx_ring
|
||||
#define rxb tlan_buffers.rxb
|
||||
|
||||
typedef u8 TLanBuffer[TLAN_MAX_FRAME_SIZE];
|
||||
|
||||
int chip_idx;
|
||||
static int chip_idx;
|
||||
|
||||
/*****************************************************************
|
||||
* TLAN Private Information Structure
|
||||
*
|
||||
****************************************************************/
|
||||
struct tlan_private {
|
||||
static struct tlan_private {
|
||||
unsigned short vendor_id; /* PCI Vendor code */
|
||||
unsigned short dev_id; /* PCI Device code */
|
||||
const char *nic_name;
|
||||
@ -226,7 +231,7 @@ struct tlan_private {
|
||||
|
||||
static struct tlan_private *priv;
|
||||
|
||||
u32 BASE;
|
||||
static u32 BASE;
|
||||
|
||||
/***************************************************************
|
||||
* TLan_ResetLists
|
||||
@ -242,7 +247,7 @@ u32 BASE;
|
||||
*
|
||||
**************************************************************/
|
||||
|
||||
void TLan_ResetLists(struct nic *nic __unused)
|
||||
static void TLan_ResetLists(struct nic *nic __unused)
|
||||
{
|
||||
|
||||
int i;
|
||||
|
||||
@ -393,7 +393,7 @@ typedef struct tlan_adapter_entry {
|
||||
|
||||
/* Routines to access internal registers. */
|
||||
|
||||
inline u8 TLan_DioRead8(u16 base_addr, u16 internal_addr)
|
||||
static inline u8 TLan_DioRead8(u16 base_addr, u16 internal_addr)
|
||||
{
|
||||
outw(internal_addr, base_addr + TLAN_DIO_ADR);
|
||||
return (inb((base_addr + TLAN_DIO_DATA) + (internal_addr & 0x3)));
|
||||
@ -403,7 +403,7 @@ inline u8 TLan_DioRead8(u16 base_addr, u16 internal_addr)
|
||||
|
||||
|
||||
|
||||
inline u16 TLan_DioRead16(u16 base_addr, u16 internal_addr)
|
||||
static inline u16 TLan_DioRead16(u16 base_addr, u16 internal_addr)
|
||||
{
|
||||
outw(internal_addr, base_addr + TLAN_DIO_ADR);
|
||||
return (inw((base_addr + TLAN_DIO_DATA) + (internal_addr & 0x2)));
|
||||
@ -413,7 +413,7 @@ inline u16 TLan_DioRead16(u16 base_addr, u16 internal_addr)
|
||||
|
||||
|
||||
|
||||
inline u32 TLan_DioRead32(u16 base_addr, u16 internal_addr)
|
||||
static inline u32 TLan_DioRead32(u16 base_addr, u16 internal_addr)
|
||||
{
|
||||
outw(internal_addr, base_addr + TLAN_DIO_ADR);
|
||||
return (inl(base_addr + TLAN_DIO_DATA));
|
||||
@ -423,7 +423,7 @@ inline u32 TLan_DioRead32(u16 base_addr, u16 internal_addr)
|
||||
|
||||
|
||||
|
||||
inline void TLan_DioWrite8(u16 base_addr, u16 internal_addr, u8 data)
|
||||
static inline void TLan_DioWrite8(u16 base_addr, u16 internal_addr, u8 data)
|
||||
{
|
||||
outw(internal_addr, base_addr + TLAN_DIO_ADR);
|
||||
outb(data, base_addr + TLAN_DIO_DATA + (internal_addr & 0x3));
|
||||
@ -433,7 +433,7 @@ inline void TLan_DioWrite8(u16 base_addr, u16 internal_addr, u8 data)
|
||||
|
||||
|
||||
|
||||
inline void TLan_DioWrite16(u16 base_addr, u16 internal_addr, u16 data)
|
||||
static inline void TLan_DioWrite16(u16 base_addr, u16 internal_addr, u16 data)
|
||||
{
|
||||
outw(internal_addr, base_addr + TLAN_DIO_ADR);
|
||||
outw(data, base_addr + TLAN_DIO_DATA + (internal_addr & 0x2));
|
||||
@ -443,7 +443,7 @@ inline void TLan_DioWrite16(u16 base_addr, u16 internal_addr, u16 data)
|
||||
|
||||
|
||||
|
||||
inline void TLan_DioWrite32(u16 base_addr, u16 internal_addr, u32 data)
|
||||
static inline void TLan_DioWrite32(u16 base_addr, u16 internal_addr, u32 data)
|
||||
{
|
||||
outw(internal_addr, base_addr + TLAN_DIO_ADR);
|
||||
outl(data, base_addr + TLAN_DIO_DATA + (internal_addr & 0x2));
|
||||
@ -453,7 +453,7 @@ inline void TLan_DioWrite32(u16 base_addr, u16 internal_addr, u32 data)
|
||||
|
||||
|
||||
#if 0
|
||||
inline void TLan_ClearBit(u8 bit, u16 port)
|
||||
static inline void TLan_ClearBit(u8 bit, u16 port)
|
||||
{
|
||||
outb_p(inb_p(port) & ~bit, port);
|
||||
}
|
||||
@ -461,7 +461,7 @@ inline void TLan_ClearBit(u8 bit, u16 port)
|
||||
|
||||
|
||||
|
||||
inline int TLan_GetBit(u8 bit, u16 port)
|
||||
static inline int TLan_GetBit(u8 bit, u16 port)
|
||||
{
|
||||
return ((int) (inb_p(port) & bit));
|
||||
}
|
||||
@ -469,7 +469,7 @@ inline int TLan_GetBit(u8 bit, u16 port)
|
||||
|
||||
|
||||
|
||||
inline void TLan_SetBit(u8 bit, u16 port)
|
||||
static inline void TLan_SetBit(u8 bit, u16 port)
|
||||
{
|
||||
outb_p(inb_p(port) | bit, port);
|
||||
}
|
||||
@ -482,7 +482,7 @@ inline void TLan_SetBit(u8 bit, u16 port)
|
||||
#ifdef I_LIKE_A_FAST_HASH_FUNCTION
|
||||
/* given 6 bytes, view them as 8 6-bit numbers and return the XOR of those */
|
||||
/* the code below is about seven times as fast as the original code */
|
||||
inline u32 TLan_HashFunc(u8 * a)
|
||||
static inline u32 TLan_HashFunc(u8 * a)
|
||||
{
|
||||
u8 hash;
|
||||
|
||||
@ -498,7 +498,7 @@ inline u32 TLan_HashFunc(u8 * a)
|
||||
|
||||
#else /* original code */
|
||||
|
||||
inline u32 xor(u32 a, u32 b)
|
||||
static inline u32 xor(u32 a, u32 b)
|
||||
{
|
||||
return ((a && !b) || (!a && b));
|
||||
}
|
||||
@ -506,7 +506,7 @@ inline u32 xor(u32 a, u32 b)
|
||||
#define XOR8( a, b, c, d, e, f, g, h ) xor( a, xor( b, xor( c, xor( d, xor( e, xor( f, xor( g, h ) ) ) ) ) ) )
|
||||
#define DA( a, bit ) ( ( (u8) a[bit/8] ) & ( (u8) ( 1 << bit%8 ) ) )
|
||||
|
||||
inline u32 TLan_HashFunc(u8 * a)
|
||||
static inline u32 TLan_HashFunc(u8 * a)
|
||||
{
|
||||
u32 hash;
|
||||
|
||||
|
||||
@ -400,12 +400,17 @@ static u32 ioaddr;
|
||||
longword divisable */
|
||||
|
||||
#define TX_RING_SIZE 2
|
||||
static struct tulip_tx_desc tx_ring[TX_RING_SIZE] __attribute__ ((aligned(4)));
|
||||
static unsigned char txb[BUFLEN] __attribute__ ((aligned(4)));
|
||||
|
||||
#define RX_RING_SIZE 4
|
||||
static struct tulip_rx_desc rx_ring[RX_RING_SIZE] __attribute__ ((aligned(4)));
|
||||
static unsigned char rxb[RX_RING_SIZE * BUFLEN] __attribute__ ((aligned(4)));
|
||||
struct {
|
||||
struct tulip_tx_desc tx_ring[TX_RING_SIZE];
|
||||
unsigned char txb[BUFLEN];
|
||||
struct tulip_rx_desc rx_ring[RX_RING_SIZE];
|
||||
unsigned char rxb[RX_RING_SIZE * BUFLEN];
|
||||
} tulip_buffers __shared __attribute__ ((aligned(4)));
|
||||
#define tx_ring tulip_buffers.tx_ring
|
||||
#define txb tulip_buffers.txb
|
||||
#define rx_ring tulip_buffers.rx_ring
|
||||
#define rxb tulip_buffers.rxb
|
||||
|
||||
static struct tulip_private {
|
||||
int cur_rx;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user