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https://github.com/xcat2/xNBA.git
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Gets a response out of the hardware. (An error completion, to be precise.)
This commit is contained in:
Michael Brown
parent
21d4ab3ce2
commit
8b27da9de1
@ -141,18 +141,33 @@ struct addr_64_st {
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#define MLX_BIT_OFFSET( _structure, _field ) \
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offsetof ( struct _structure, _field )
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/** Dword offset of a field within a pseudo_bit_t structure */
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#define MLX_DWORD_OFFSET( _structure, _field ) \
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( MLX_BIT_OFFSET ( _structure, _field ) / 32 )
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/** Dword bit offset of a field within a pseudo_bit_t structure
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*
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* Yes, using mod-32 would work, but would lose the check for the
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* error of specifying a mismatched field name and dword index.
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*/
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#define MLX_DWORD_BIT_OFFSET( _structure, _index, _field ) \
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( MLX_BIT_OFFSET ( _structure, _field ) - ( 32 * (_index) ) )
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/** Bit width of a field within a pseudo_bit_t structure */
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#define MLX_BIT_WIDTH( _structure, _field ) \
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sizeof ( ( ( struct _structure * ) NULL )->_field )
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/** Bit mask for a field within a pseudo_bit_t structure */
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#define MLX_BIT_MASK( _structure, _field ) \
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( ( 1 << MLX_BIT_WIDTH ( _structure, _field ) ) - 1 )
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/*
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* Assemble native-endian dword from named fields and values
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*
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*/
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#define MLX_ASSEMBLE_1( _structure, _index, _field, _value ) \
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( (_value) << \
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( MLX_BIT_OFFSET ( _structure, _field ) - ( 32 * (_index) ) ) )
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( (_value) << MLX_DWORD_BIT_OFFSET ( _structure, _index, _field ) )
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#define MLX_ASSEMBLE_2( _structure, _index, _field, _value, ... ) \
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( MLX_ASSEMBLE_1 ( _structure, _index, _field, _value ) | \
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@ -172,9 +187,8 @@ struct addr_64_st {
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*/
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#define MLX_MASK_1( _structure, _index, _field ) \
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MLX_ASSEMBLE_1 ( _structure, _index, _field, \
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( ( 1 << MLX_BIT_WIDTH ( _structure, \
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_field ) ) - 1 ) )
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( MLX_BIT_MASK ( _structure, _field ) << \
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MLX_DWORD_BIT_OFFSET ( _structure, _index, _field ) )
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#define MLX_MASK_2( _structure, _index, _field, ... ) \
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( MLX_MASK_1 ( _structure, _index, _field ) | \
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@ -231,4 +245,21 @@ struct addr_64_st {
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*__ptr = cpu_to_be32 ( __value ); \
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} while ( 0 )
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/*
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* Extract value of named field
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*
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*/
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#define MLX_EXTRACT( _base, _structure, _field ) \
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( { \
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unsigned int __index = \
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MLX_DWORD_OFFSET ( _structure, _field ); \
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uint32_t *__ptr = ( ( (uint32_t *) (_base) ) + __index ); \
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uint32_t __value = be32_to_cpu ( *__ptr ); \
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__value >>= MLX_DWORD_BIT_OFFSET ( _structure, __index, \
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_field ); \
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__value &= MLX_BIT_MASK ( _structure, _field ); \
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__value; \
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} )
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#endif /* __bit_ops_h__ */
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@ -27,12 +27,13 @@ struct arbel_send_work_queue {
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/** Doorbell number */
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unsigned int doorbell_idx;
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/** Work queue entries */
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struct ud_send_wqe_st *wqe;
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// struct ud_send_wqe_st *wqe;
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union ud_send_wqe_u *wqe_u;
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};
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struct arbel {
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/** User Access Region */
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unsigned long uar;
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void *uar;
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/** Doorbell records */
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union db_record_st *db_rec;
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};
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@ -88,7 +89,6 @@ static uint8_t ib_broadcast[IB_ALEN] = { 0xff, };
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static int mlx_transmit ( struct net_device *netdev,
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struct io_buffer *iobuf ) {
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struct mlx_nic *mlx = netdev->priv;
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ud_av_t av = iobuf->data;
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ud_send_wqe_t snd_wqe;
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int rc;
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@ -110,6 +110,58 @@ static int mlx_transmit ( struct net_device *netdev,
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return 0;
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}
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static int arbel_post_send ( struct ib_device *ibdev, struct io_buffer *iobuf,
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struct ib_address_vector *av,
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struct ib_queue_pair *qp );
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static struct io_buffer *tx_ring[NUM_IPOIB_SND_WQES];
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static int tx_posted = 0;
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static int mlx_transmit_direct ( struct net_device *netdev,
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struct io_buffer *iobuf ) {
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struct mlx_nic *mlx = netdev->priv;
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int rc;
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struct arbel arbel = {
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.uar = memfree_pci_dev.uar,
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.db_rec = dev_ib_data.uar_context_base,
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};
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struct arbel_send_work_queue arbel_send_queue = {
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.doorbell_idx = IPOIB_SND_QP_DB_IDX,
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.wqe_u = ( (struct udqp_st *) ipoib_data.ipoib_qph )->snd_wq,
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};
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struct ib_device ibdev = {
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.priv = &arbel,
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};
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struct ib_queue_pair qp = {
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.qpn = ib_get_qpn ( mlx->ipoib_qph ),
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.send = {
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.num_wqes = NUM_IPOIB_SND_WQES,
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.posted = tx_posted,
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.iobufs = tx_ring,
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.priv = &arbel_send_queue,
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},
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};
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struct ud_av_st *bcast_av = mlx->bcast_av;
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struct address_vector_st *bav = &bcast_av->av;
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struct ib_address_vector av = {
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.dest_qp = bcast_av->dest_qp,
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.qkey = bcast_av->qkey,
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.dlid = MLX_EXTRACT ( bav, arbelprm_ud_address_vector_st, rlid ),
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.rate = ( MLX_EXTRACT ( bav, arbelprm_ud_address_vector_st, max_stat_rate ) ? 1 : 4 ),
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.sl = MLX_EXTRACT ( bav, arbelprm_ud_address_vector_st, sl ),
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.gid_present = 1,
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};
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memcpy ( &av.gid, ( ( void * ) bav ) + 16, 16 );
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rc = arbel_post_send ( &ibdev, iobuf, &av, &qp );
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tx_posted = qp.send.posted;
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return rc;
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}
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/**
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* Handle TX completion
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*
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@ -234,7 +286,7 @@ static void mlx_irq ( struct net_device *netdev, int enable ) {
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static struct net_device_operations mlx_operations = {
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.open = mlx_open,
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.close = mlx_close,
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.transmit = mlx_transmit,
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.transmit = mlx_transmit_direct,
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.poll = mlx_poll,
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.irq = mlx_irq,
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};
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@ -274,12 +326,13 @@ static int arbel_post_send ( struct ib_device *ibdev, struct io_buffer *iobuf,
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/* Allocate work queue entry */
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prev_wqe_idx = wq->posted;
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wqe_idx = ( prev_wqe_idx + 1 );
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if ( wq->iobuf[wqe_idx & wqe_idx_mask] ) {
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if ( wq->iobufs[wqe_idx & wqe_idx_mask] ) {
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DBGC ( arbel, "ARBEL %p send queue full", arbel );
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return -ENOBUFS;
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}
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prev_wqe = &arbel_wq->wqe[prev_wqe_idx & wqe_idx_mask];
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wqe = &arbel_wq->wqe[wqe_idx & wqe_idx_mask];
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wq->iobufs[wqe_idx & wqe_idx_mask] = iobuf;
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prev_wqe = &arbel_wq->wqe_u[prev_wqe_idx & wqe_idx_mask].wqe_cont.wqe;
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wqe = &arbel_wq->wqe_u[wqe_idx & wqe_idx_mask].wqe_cont.wqe;
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/* Construct work queue entry */
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memset ( &wqe->next.control, 0,
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@ -73,10 +73,10 @@ struct ib_work_queue {
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* This is the index of the most recently posted entry.
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*/
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unsigned int posted;
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/** I/O buffers assigned to work queue */
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struct io_buffer **iobufs;
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/** Driver private data */
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void *priv;
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/** I/O buffers assigned to work queue */
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struct io_buffer *iobuf[0];
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};
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/** An Infiniband Queue Pair */
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