mirror of
https://github.com/xcat2/xNBA.git
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Rewrote to use the new net driver API, the updated PCI API, and the
generic three-wire serial device support for EEPROM access.
This commit is contained in:
Michael Brown
parent
69b1f24a97
commit
70ef6dbb7c
@ -17,6 +17,10 @@
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/*********************************************************************/
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/*
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27 May 2006 mcb30@users.sourceforge.net (Michael Brown)
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Rewrote to use the new net driver API, the updated PCI API, and
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the generic three-wire serial device support for EEPROM access.
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28 Dec 2002 ken_yap@users.sourceforge.net (Ken Yap)
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Put in virt_to_bus calls to allow Etherboot relocation.
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@ -62,26 +66,47 @@
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*/
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#include "etherboot.h"
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#include "nic.h"
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#include <io.h>
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#include <errno.h>
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#include <vsprintf.h>
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#include <timer.h>
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#include <malloc.h>
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#include <byteswap.h>
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#include <gpxe/pci.h>
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#include "timer.h"
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#include <gpxe/if_ether.h>
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#include <gpxe/ethernet.h>
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#include <gpxe/pkbuff.h>
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#include <gpxe/netdevice.h>
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#include <gpxe/nvs/threewire.h>
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#define RTL_TIMEOUT (1*TICKS_PER_SEC)
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#define TX_RING_SIZE 4
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/* PCI Tuning Parameters
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Threshold is bytes transferred to chip before transmission starts. */
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#define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */
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#define RX_FIFO_THRESH 4 /* Rx buffer level before first PCI xfer. */
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#define RX_DMA_BURST 4 /* Maximum PCI burst, '4' is 256 bytes */
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#define TX_DMA_BURST 4 /* Calculate as 16<<val. */
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#define NUM_TX_DESC 4 /* Number of Tx descriptor registers. */
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#define TX_BUF_SIZE ETH_FRAME_LEN /* FCS is added by the chip */
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#define RX_BUF_LEN_IDX 0 /* 0, 1, 2 is allowed - 8,16,32K rx buffer */
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#define RX_BUF_LEN (8192 << RX_BUF_LEN_IDX)
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struct rtl8139_tx {
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unsigned int next;
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struct pk_buff *pkb[TX_RING_SIZE];
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};
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#undef DEBUG_TX
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#undef DEBUG_RX
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struct rtl8139_rx {
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void *ring;
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unsigned int offset;
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};
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struct rtl8139_nic {
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struct threewire eeprom;
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unsigned short ioaddr;
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struct rtl8139_tx tx;
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struct rtl8139_rx rx;
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};
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/* Tuning Parameters */
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#define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */
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#define RX_FIFO_THRESH 4 /* Rx buffer level before first PCI xfer. */
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#define RX_DMA_BURST 4 /* Maximum PCI burst, '4' is 256 bytes */
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#define TX_DMA_BURST 4 /* Calculate as 16<<val. */
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#define TX_IPG 3 /* This is the only valid value */
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#define RX_BUF_LEN_IDX 0 /* 0, 1, 2 is allowed - 8,16,32K rx buffer */
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#define RX_BUF_LEN ( (8192 << RX_BUF_LEN_IDX) )
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#define RX_BUF_PAD 4
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/* Symbolic offsets to registers. */
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enum RTL8139_registers {
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@ -159,327 +184,300 @@ enum CSCRBits {
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CSCR_LinkDownCmd=0x0f3c0,
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};
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/* Bits in RxConfig. */
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enum rx_mode_bits {
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enum RxConfigBits {
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RxCfgWrap=0x80,
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Eeprom9356=0x40,
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AcceptErr=0x20, AcceptRunt=0x10, AcceptBroadcast=0x08,
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AcceptMulticast=0x04, AcceptMyPhys=0x02, AcceptAllPhys=0x01,
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};
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static unsigned int cur_rx,cur_tx;
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/* EEPROM access */
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#define EE_MODE_PROGRAM 0x80
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#define EE_MODE_NORMAL 0x00
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#define EE_CS 0x08 /* EEPROM chip select */
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#define EE_SK 0x04 /* EEPROM shift clock */
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#define EE_DI 0x02 /* Data in */
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#define EE_DO 0x01 /* Data out */
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/* The RTL8139 can only transmit from a contiguous, aligned memory block. */
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struct {
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unsigned char tx_buffer[TX_BUF_SIZE] __attribute__((aligned(4)));
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unsigned char rx_ring[RX_BUF_LEN+16] __attribute__((aligned(4)));
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} rtl8139_bufs __shared;
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#define tx_buffer rtl8139_bufs.tx_buffer
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#define rx_ring rtl8139_bufs.rx_ring
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/* Offsets within EEPROM (these are word offsets) */
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#define EE_MAC 7
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static int rtl8139_probe(struct nic *nic,struct pci_device *pci);
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static int read_eeprom(struct nic *nic, int location, int addr_len);
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static void rtl_reset(struct nic *nic);
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static void rtl_transmit(struct nic *nic, const char *destaddr,
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unsigned int type, unsigned int len, const char *data);
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static int rtl_poll(struct nic *nic, int retrieve);
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static void rtl_disable(struct nic *nic, struct pci_device *pci);
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static void rtl_irq(struct nic *nic, irq_action_t action);
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static struct nic_operations rtl_operations;
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static struct pci_driver rtl8139_driver;
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static inline struct rtl8139_nic * three_to_rtl ( struct threewire *three ) {
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return container_of ( three, struct rtl8139_nic, eeprom );
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}
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static int rtl8139_probe ( struct nic *nic, struct pci_device *pci ) {
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static void rtl_setcs ( struct threewire *three, int cs ) {
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struct rtl8139_nic *rtl = three_to_rtl ( three );
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unsigned int eereg;
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eereg = cs ? ( EE_MODE_PROGRAM | EE_CS ) : ( EE_MODE_NORMAL );
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outb ( eereg, rtl->ioaddr + Cfg9346 );
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}
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static void rtl_setsk ( struct threewire *three, int sk ) {
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struct rtl8139_nic *rtl = three_to_rtl ( three );
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unsigned int eereg;
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eereg = inb ( rtl->ioaddr + Cfg9346 );
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eereg = ( eereg & ~EE_SK ) | ( sk ? EE_SK : 0 );
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outb ( eereg, rtl->ioaddr + Cfg9346 );
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}
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static void rtl_setdi ( struct threewire *three, int di ) {
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struct rtl8139_nic *rtl = three_to_rtl ( three );
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unsigned int eereg;
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eereg = inb ( rtl->ioaddr + Cfg9346 );
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eereg = ( eereg & ~EE_DI ) | ( di ? EE_DI : 0 );
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outb ( eereg, rtl->ioaddr + Cfg9346 );
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}
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static int rtl_getdo ( struct threewire *three ) {
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struct rtl8139_nic *rtl = three_to_rtl ( three );
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unsigned int eereg;
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eereg = ( inb ( rtl->ioaddr + Cfg9346 ) & EE_DO );
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return eereg;
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}
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static struct threewire_operations rtl_three_ops = {
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.setcs = rtl_setcs,
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.setsk = rtl_setsk,
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.setdi = rtl_setdi,
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.getdo = rtl_getdo,
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};
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/**
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* Set up for EEPROM access
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*
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* @v rtl RTL8139 NIC
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*/
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static void rtl_init_eeprom ( struct rtl8139_nic *rtl ) {
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int ee9356;
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ee9356 = ( inw ( rtl->ioaddr + RxConfig ) & Eeprom9356 );
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DBG ( "EEPROM is an %s\n", ee9356 ? "AT93C56" : "AT93C46" );
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rtl->eeprom.ops = &rtl_three_ops;
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rtl->eeprom.adrsize =
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( ee9356 ? AT93C56_ORG16_ADRSIZE : AT93C46_ORG16_ADRSIZE );
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rtl->eeprom.datasize =
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( ee9356 ? AT93C56_ORG16_DATASIZE : AT93C46_ORG16_DATASIZE );
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rtl->eeprom.udelay = 1;
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}
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/**
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* Read the MAC address
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*
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* @v rtl RTL8139 NIC
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* @v mac_addr Buffer to contain MAC address (ETH_ALEN bytes)
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*/
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static void rtl_read_mac ( struct rtl8139_nic *rtl, uint8_t *mac_addr ) {
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union {
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uint16_t word;
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uint8_t bytes[2];
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} u;
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int i;
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int speed10, fullduplex;
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int addr_len;
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unsigned short *ap = (unsigned short*)nic->node_addr;
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/* Copy ioaddr and IRQ from PCI information */
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pci_fill_nic ( nic, pci );
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nic->ioaddr = pci->ioaddr;
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nic->irqno = pci->irq;
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adjust_pci_device(pci);
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/* Bring the chip out of low-power mode. */
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outb(0x00, nic->ioaddr + Config1);
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addr_len = read_eeprom(nic,0,8) == 0x8129 ? 8 : 6;
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for (i = 0; i < 3; i++)
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*ap++ = read_eeprom(nic,i + 7,addr_len);
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rtl_reset(nic);
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speed10 = inb(nic->ioaddr + MediaStatus) & MSRSpeed10;
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nic->mbps = speed10 ? 10 : 100;
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fullduplex = inw(nic->ioaddr + MII_BMCR) & BMCRDuplex;
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nic->duplex = fullduplex ? FULL_DUPLEX : HALF_DUPLEX;
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nic->nic_op = &rtl_operations;
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return 1;
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}
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/* Serial EEPROM section. */
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/* EEPROM_Ctrl bits. */
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#define EE_SHIFT_CLK 0x04 /* EEPROM shift clock. */
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#define EE_CS 0x08 /* EEPROM chip select. */
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#define EE_DATA_WRITE 0x02 /* EEPROM chip data in. */
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#define EE_WRITE_0 0x00
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#define EE_WRITE_1 0x02
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#define EE_DATA_READ 0x01 /* EEPROM chip data out. */
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#define EE_ENB (0x80 | EE_CS)
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/*
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Delay between EEPROM clock transitions.
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No extra delay is needed with 33Mhz PCI, but 66Mhz may change this.
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*/
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#define eeprom_delay() inl(ee_addr)
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/* The EEPROM commands include the alway-set leading bit. */
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#define EE_WRITE_CMD (5)
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#define EE_READ_CMD (6)
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#define EE_ERASE_CMD (7)
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static int read_eeprom(struct nic *nic, int location, int addr_len)
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{
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int i;
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unsigned int retval = 0;
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long ee_addr = nic->ioaddr + Cfg9346;
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int read_cmd = location | (EE_READ_CMD << addr_len);
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outb(EE_ENB & ~EE_CS, ee_addr);
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outb(EE_ENB, ee_addr);
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eeprom_delay();
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/* Shift the read command bits out. */
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for (i = 4 + addr_len; i >= 0; i--) {
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int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
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outb(EE_ENB | dataval, ee_addr);
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eeprom_delay();
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outb(EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);
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eeprom_delay();
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}
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outb(EE_ENB, ee_addr);
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eeprom_delay();
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for (i = 16; i > 0; i--) {
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outb(EE_ENB | EE_SHIFT_CLK, ee_addr);
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eeprom_delay();
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retval = (retval << 1) | ((inb(ee_addr) & EE_DATA_READ) ? 1 : 0);
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outb(EE_ENB, ee_addr);
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eeprom_delay();
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}
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/* Terminate the EEPROM access. */
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outb(~EE_CS, ee_addr);
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eeprom_delay();
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return retval;
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}
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static const unsigned int rtl8139_rx_config =
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(RX_BUF_LEN_IDX << 11) |
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(RX_FIFO_THRESH << 13) |
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(RX_DMA_BURST << 8);
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static void set_rx_mode(struct nic *nic) {
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unsigned int mc_filter[2];
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int rx_mode;
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/* !IFF_PROMISC */
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rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
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mc_filter[1] = mc_filter[0] = 0xffffffff;
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outl(rtl8139_rx_config | rx_mode, nic->ioaddr + RxConfig);
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outl(mc_filter[0], nic->ioaddr + MAR0 + 0);
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outl(mc_filter[1], nic->ioaddr + MAR0 + 4);
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}
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static int rtl_connect ( struct nic *nic ) {
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if (inb(nic->ioaddr + MediaStatus) & MSRLinkFail) {
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printf("Cable not connected or other link failure\n");
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return 0;
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DBG ( "MAC address is " );
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for ( i = 0 ; i < ( ETH_ALEN / 2 ) ; i++ ) {
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u.word = cpu_to_le16 ( threewire_read ( &rtl->eeprom,
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EE_MAC + i ) );
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*mac_addr++ = u.bytes[0];
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*mac_addr++ = u.bytes[1];
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DBG ( "%02x%02x", u.bytes[0], u.bytes[1] );
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}
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return 1;
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DBG ( "\n" );
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}
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static void rtl_reset(struct nic* nic)
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{
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/**
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* Reset NIC
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*
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* @v rtl RTL8139 NIC
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*
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* Issues a hardware reset and waits for the reset to complete.
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*/
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static void rtl_reset ( struct rtl8139_nic *rtl ) {
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/* Reset chip */
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outb ( CmdReset, rtl->ioaddr + ChipCmd );
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mdelay ( 10 );
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rtl->tx.next = 0;
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rtl->rx.offset = 0;
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}
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/**
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* Open NIC
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*
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* @v netdev Net device
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* @ret rc Return status code
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*/
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static int rtl_open ( struct net_device *netdev ) {
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struct rtl8139_nic *rtl = netdev->priv;
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int i;
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outb(CmdReset, nic->ioaddr + ChipCmd);
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/* Program the MAC address */
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for ( i = 0 ; i < ETH_ALEN ; i++ )
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outb ( netdev->ll_addr[i], rtl->ioaddr + MAC0 + i );
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cur_rx = 0;
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cur_tx = 0;
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/* Set up RX ring */
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rtl->rx.ring = malloc ( RX_BUF_LEN + RX_BUF_PAD );
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if ( ! rtl->rx.ring )
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return -ENOMEM;
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outl ( virt_to_bus ( rtl->rx.ring ), rtl->ioaddr + RxBuf );
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DBG ( "RX ring at %lx\n", virt_to_bus ( rtl->rx.ring ) );
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/* Give the chip 10ms to finish the reset. */
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load_timer2(10*TICKS_PER_MS);
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while ((inb(nic->ioaddr + ChipCmd) & CmdReset) != 0 &&
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timer2_running())
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/* wait */;
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/* Enable TX and RX */
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outb ( ( CmdRxEnb | CmdTxEnb ), rtl->ioaddr + ChipCmd );
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outl ( ( ( RX_FIFO_THRESH << 13 ) | ( RX_BUF_LEN_IDX << 11 ) |
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( RX_DMA_BURST << 8 ) | AcceptBroadcast | AcceptMulticast |
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AcceptMyPhys ), rtl->ioaddr + RxConfig );
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outl ( 0xffffffffUL, rtl->ioaddr + MAR0 + 0 );
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outl ( 0xffffffffUL, rtl->ioaddr + MAR0 + 4 );
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outl ( ( ( TX_DMA_BURST << 8 ) | ( TX_IPG << 24 ) ),
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rtl->ioaddr + TxConfig );
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for (i = 0; i < ETH_ALEN; i++)
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outb(nic->node_addr[i], nic->ioaddr + MAC0 + i);
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/* Must enable Tx/Rx before setting transfer thresholds! */
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outb(CmdRxEnb | CmdTxEnb, nic->ioaddr + ChipCmd);
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outl((RX_FIFO_THRESH<<13) | (RX_BUF_LEN_IDX<<11) | (RX_DMA_BURST<<8),
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nic->ioaddr + RxConfig); /* accept no frames yet! */
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outl((TX_DMA_BURST<<8)|0x03000000, nic->ioaddr + TxConfig);
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/* The Linux driver changes Config1 here to use a different LED pattern
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* for half duplex or full/autodetect duplex (for full/autodetect, the
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* outputs are TX/RX, Link10/100, FULL, while for half duplex it uses
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* TX/RX, Link100, Link10). This is messy, because it doesn't match
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* the inscription on the mounting bracket. It should not be changed
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* from the configuration EEPROM default, because the card manufacturer
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* should have set that to match the card. */
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#ifdef DEBUG_RX
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printf("rx ring address is %X\n",(unsigned long)rx_ring);
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#endif
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outl((unsigned long)virt_to_bus(rx_ring), nic->ioaddr + RxBuf);
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/* If we add multicast support, the MAR0 register would have to be
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* initialized to 0xffffffffffffffff (two 32 bit accesses). Etherboot
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* only needs broadcast (for ARP/RARP/BOOTP/DHCP) and unicast. */
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outb(CmdRxEnb | CmdTxEnb, nic->ioaddr + ChipCmd);
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outl(rtl8139_rx_config, nic->ioaddr + RxConfig);
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/* Start the chip's Tx and Rx process. */
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outl(0, nic->ioaddr + RxMissed);
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/* set_rx_mode */
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set_rx_mode(nic);
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/* Disable all known interrupts by setting the interrupt mask. */
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outw(0, nic->ioaddr + IntrMask);
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return 0;
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}
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static void rtl_transmit(struct nic *nic, const char *destaddr,
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unsigned int type, unsigned int len, const char *data)
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{
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unsigned int status, to, nstype;
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unsigned long txstatus;
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/**
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* Close NIC
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*
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* @v netdev Net device
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*/
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static void rtl_close ( struct net_device *netdev ) {
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struct rtl8139_nic *rtl = netdev->priv;
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int i;
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/* nstype assignment moved up here to avoid gcc 3.0.3 compiler bug */
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nstype = htons(type);
|
||||
memcpy(tx_buffer, destaddr, ETH_ALEN);
|
||||
memcpy(tx_buffer + ETH_ALEN, nic->node_addr, ETH_ALEN);
|
||||
memcpy(tx_buffer + 2 * ETH_ALEN, &nstype, 2);
|
||||
memcpy(tx_buffer + ETH_HLEN, data, len);
|
||||
/* Reset the hardware to disable everything in one go */
|
||||
rtl_reset ( rtl );
|
||||
|
||||
len += ETH_HLEN;
|
||||
#ifdef DEBUG_TX
|
||||
printf("sending %d bytes ethtype %hX\n", len, type);
|
||||
#endif
|
||||
/* Free RX ring */
|
||||
free ( rtl->rx.ring );
|
||||
rtl->rx.ring = NULL;
|
||||
|
||||
/* Note: RTL8139 doesn't auto-pad, send minimum payload (another 4
|
||||
* bytes are sent automatically for the FCS, totalling to 64 bytes). */
|
||||
while (len < ETH_ZLEN) {
|
||||
tx_buffer[len++] = '\0';
|
||||
}
|
||||
|
||||
outl((unsigned long)virt_to_bus(tx_buffer), nic->ioaddr + TxAddr0 + cur_tx*4);
|
||||
outl(((TX_FIFO_THRESH<<11) & 0x003f0000) | len,
|
||||
nic->ioaddr + TxStatus0 + cur_tx*4);
|
||||
|
||||
to = currticks() + RTL_TIMEOUT;
|
||||
|
||||
do {
|
||||
status = inw(nic->ioaddr + IntrStatus);
|
||||
/* Only acknlowledge interrupt sources we can properly handle
|
||||
* here - the RxOverflow/RxFIFOOver MUST be handled in the
|
||||
* rtl_poll() function. */
|
||||
outw(status & (TxOK | TxErr | PCIErr), nic->ioaddr + IntrStatus);
|
||||
if ((status & (TxOK | TxErr | PCIErr)) != 0) break;
|
||||
} while (currticks() < to);
|
||||
|
||||
txstatus = inl(nic->ioaddr+ TxStatus0 + cur_tx*4);
|
||||
|
||||
if (status & TxOK) {
|
||||
cur_tx = (cur_tx + 1) % NUM_TX_DESC;
|
||||
#ifdef DEBUG_TX
|
||||
printf("tx done (%d ticks), status %hX txstatus %X\n",
|
||||
to-currticks(), status, txstatus);
|
||||
#endif
|
||||
} else {
|
||||
#ifdef DEBUG_TX
|
||||
printf("tx timeout/error (%d ticks), status %hX txstatus %X\n",
|
||||
currticks()-to, status, txstatus);
|
||||
#endif
|
||||
rtl_reset(nic);
|
||||
/* Free any old TX buffers that hadn't yet completed */
|
||||
for ( i = 0 ; i < TX_RING_SIZE ; i++ ) {
|
||||
if ( rtl->tx.pkb[i] ) {
|
||||
free_pkb ( rtl->tx.pkb[i] );
|
||||
rtl->tx.pkb[i] = NULL;
|
||||
DBG ( "TX id %d discarded\n", i );
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static int rtl_poll(struct nic *nic, int retrieve)
|
||||
{
|
||||
/**
|
||||
* Transmit packet
|
||||
*
|
||||
* @v netdev Network device
|
||||
* @v pkb Packet buffer
|
||||
* @ret rc Return status code
|
||||
*/
|
||||
static int rtl_transmit ( struct net_device *netdev, struct pk_buff *pkb ) {
|
||||
struct rtl8139_nic *rtl = netdev->priv;
|
||||
int align;
|
||||
int pad_len;
|
||||
|
||||
/* Check for space in TX ring */
|
||||
if ( rtl->tx.pkb[rtl->tx.next] != NULL ) {
|
||||
printf ( "TX overflow\n" );
|
||||
free_pkb ( pkb );
|
||||
return -ENOBUFS;
|
||||
}
|
||||
|
||||
/* Align packet data */
|
||||
align = ( virt_to_bus ( pkb->data ) & 0x3 );
|
||||
pkb_push ( pkb, align );
|
||||
memmove ( pkb->data, pkb->data + align, pkb_len ( pkb ) - align );
|
||||
pkb_unput ( pkb, align );
|
||||
|
||||
/* Pad to minimum packet length */
|
||||
pad_len = ( ETH_ZLEN - pkb_len ( pkb ) );
|
||||
if ( pad_len > 0 )
|
||||
memset ( pkb_put ( pkb, pad_len ), 0, pad_len );
|
||||
|
||||
/* Add to TX ring */
|
||||
DBG ( "TX id %d at %lx+%x\n", rtl->tx.next,
|
||||
virt_to_bus ( pkb->data ), pkb_len ( pkb ) );
|
||||
rtl->tx.pkb[rtl->tx.next] = pkb;
|
||||
outl ( virt_to_bus ( pkb->data ),
|
||||
rtl->ioaddr + TxAddr0 + 4 * rtl->tx.next );
|
||||
outl ( ( ( ( TX_FIFO_THRESH & 0x7e0 ) << 11 ) | pkb_len ( pkb ) ),
|
||||
rtl->ioaddr + TxStatus0 + 4 * rtl->tx.next );
|
||||
rtl->tx.next = ( rtl->tx.next + 1 ) % TX_RING_SIZE;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* Poll for received packets
|
||||
*
|
||||
* @v netdev Network device
|
||||
*/
|
||||
static void rtl_poll ( struct net_device *netdev ) {
|
||||
struct rtl8139_nic *rtl = netdev->priv;
|
||||
unsigned int status;
|
||||
unsigned int ring_offs;
|
||||
unsigned int rx_size, rx_status;
|
||||
unsigned int tsad;
|
||||
unsigned int rx_status;
|
||||
unsigned int rx_len;
|
||||
struct pk_buff *rx_pkb;
|
||||
int wrapped_len;
|
||||
int i;
|
||||
|
||||
if (inb(nic->ioaddr + ChipCmd) & RxBufEmpty) {
|
||||
return 0;
|
||||
/* Acknowledge interrupts */
|
||||
status = inw ( rtl->ioaddr + IntrStatus );
|
||||
if ( ! status )
|
||||
return;
|
||||
outw ( status, rtl->ioaddr + IntrStatus );
|
||||
|
||||
/* Handle TX completions */
|
||||
tsad = inw ( rtl->ioaddr + TxSummary );
|
||||
for ( i = 0 ; i < TX_RING_SIZE ; i++ ) {
|
||||
if ( ( rtl->tx.pkb[i] != NULL ) && ( tsad & ( 1 << i ) ) ) {
|
||||
DBG ( "TX id %d complete\n", i );
|
||||
free_pkb ( rtl->tx.pkb[i] );
|
||||
rtl->tx.pkb[i] = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
/* There is a packet ready */
|
||||
if ( ! retrieve ) return 1;
|
||||
/* Handle received packets */
|
||||
while ( ! ( inw ( rtl->ioaddr + ChipCmd ) & RxBufEmpty ) ) {
|
||||
rx_status = * ( ( uint16_t * )
|
||||
( rtl->rx.ring + rtl->rx.offset ) );
|
||||
rx_len = * ( ( uint16_t * )
|
||||
( rtl->rx.ring + rtl->rx.offset + 2 ) );
|
||||
if ( rx_status & RxOK ) {
|
||||
DBG ( "RX packet at offset %x+%x\n", rtl->rx.offset,
|
||||
rx_len );
|
||||
|
||||
status = inw(nic->ioaddr + IntrStatus);
|
||||
/* See below for the rest of the interrupt acknowledges. */
|
||||
outw(status & ~(RxFIFOOver | RxOverflow | RxOK), nic->ioaddr + IntrStatus);
|
||||
rx_pkb = alloc_pkb ( rx_len );
|
||||
if ( ! rx_pkb ) {
|
||||
/* Leave packet for next call to poll() */
|
||||
break;
|
||||
}
|
||||
|
||||
#ifdef DEBUG_RX
|
||||
printf("rtl_poll: int %hX ", status);
|
||||
#endif
|
||||
wrapped_len = ( ( rtl->rx.offset + 4 + rx_len )
|
||||
- RX_BUF_LEN );
|
||||
if ( wrapped_len < 0 )
|
||||
wrapped_len = 0;
|
||||
|
||||
ring_offs = cur_rx % RX_BUF_LEN;
|
||||
rx_status = *(unsigned int*)(rx_ring + ring_offs);
|
||||
rx_size = rx_status >> 16;
|
||||
rx_status &= 0xffff;
|
||||
memcpy ( pkb_put ( rx_pkb, rx_len - wrapped_len ),
|
||||
rtl->rx.ring + rtl->rx.offset + 4,
|
||||
rx_len - wrapped_len );
|
||||
memcpy ( pkb_put ( rx_pkb, wrapped_len ),
|
||||
rtl->rx.ring, wrapped_len );
|
||||
|
||||
if ((rx_status & (RxBadSymbol|RxRunt|RxTooLong|RxCRCErr|RxBadAlign)) ||
|
||||
(rx_size < ETH_ZLEN) || (rx_size > ETH_FRAME_LEN + 4)) {
|
||||
printf("rx error %hX\n", rx_status);
|
||||
rtl_reset(nic); /* this clears all interrupts still pending */
|
||||
return 0;
|
||||
netdev_rx ( netdev, rx_pkb );
|
||||
} else {
|
||||
DBG ( "RX bad packet (status %#04x len %d)\n",
|
||||
rx_status, rx_len );
|
||||
}
|
||||
rtl->rx.offset = ( ( ( rtl->rx.offset + 4 + rx_len + 3 ) & ~3 )
|
||||
% RX_BUF_LEN );
|
||||
outw ( rtl->rx.offset - 16, rtl->ioaddr + RxBufPtr );
|
||||
}
|
||||
|
||||
/* Received a good packet */
|
||||
nic->packetlen = rx_size - 4; /* no one cares about the FCS */
|
||||
if (ring_offs+4+rx_size-4 > RX_BUF_LEN) {
|
||||
int semi_count = RX_BUF_LEN - ring_offs - 4;
|
||||
|
||||
memcpy(nic->packet, rx_ring + ring_offs + 4, semi_count);
|
||||
memcpy(nic->packet+semi_count, rx_ring, rx_size-4-semi_count);
|
||||
#ifdef DEBUG_RX
|
||||
printf("rx packet %d+%d bytes", semi_count,rx_size-4-semi_count);
|
||||
#endif
|
||||
} else {
|
||||
memcpy(nic->packet, rx_ring + ring_offs + 4, nic->packetlen);
|
||||
#ifdef DEBUG_RX
|
||||
printf("rx packet %d bytes", rx_size-4);
|
||||
#endif
|
||||
}
|
||||
#ifdef DEBUG_RX
|
||||
printf(" at %X type %hhX%hhX rxstatus %hX\n",
|
||||
(unsigned long)(rx_ring+ring_offs+4),
|
||||
nic->packet[12], nic->packet[13], rx_status);
|
||||
#endif
|
||||
cur_rx = (cur_rx + rx_size + 4 + 3) & ~3;
|
||||
outw(cur_rx - 16, nic->ioaddr + RxBufPtr);
|
||||
/* See RTL8139 Programming Guide V0.1 for the official handling of
|
||||
* Rx overflow situations. The document itself contains basically no
|
||||
* usable information, except for a few exception handling rules. */
|
||||
outw(status & (RxFIFOOver | RxOverflow | RxOK), nic->ioaddr + IntrStatus);
|
||||
return 1;
|
||||
}
|
||||
|
||||
#if 0
|
||||
static void rtl_irq(struct nic *nic, irq_action_t action)
|
||||
{
|
||||
unsigned int mask;
|
||||
@ -489,10 +487,10 @@ static void rtl_irq(struct nic *nic, irq_action_t action)
|
||||
switch ( action ) {
|
||||
case DISABLE :
|
||||
case ENABLE :
|
||||
mask = inw(nic->ioaddr + IntrMask);
|
||||
mask = inw(rtl->ioaddr + IntrMask);
|
||||
mask = mask & ~interested;
|
||||
if ( action == ENABLE ) mask = mask | interested;
|
||||
outw(mask, nic->ioaddr + IntrMask);
|
||||
outw(mask, rtl->ioaddr + IntrMask);
|
||||
break;
|
||||
case FORCE :
|
||||
/* Apparently writing a 1 to this read-only bit of a
|
||||
@ -501,32 +499,88 @@ static void rtl_irq(struct nic *nic, irq_action_t action)
|
||||
* not to write a datasheet, read the one for the
|
||||
* RTL8139...
|
||||
*/
|
||||
outb(EROK, nic->ioaddr + RxEarlyStatus);
|
||||
outb(EROK, rtl->ioaddr + RxEarlyStatus);
|
||||
break;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
static void rtl_disable ( struct nic *nic, struct pci_device *pci __unused ) {
|
||||
nic_disable ( nic );
|
||||
/* merge reset and disable */
|
||||
rtl_reset(nic);
|
||||
/**
|
||||
* Probe PCI device
|
||||
*
|
||||
* @v pci PCI device
|
||||
* @v id PCI ID
|
||||
* @ret rc Return status code
|
||||
*/
|
||||
static int rtl_probe ( struct pci_device *pci,
|
||||
const struct pci_device_id *id __unused ) {
|
||||
struct net_device *netdev;
|
||||
struct rtl8139_nic *rtl = NULL;
|
||||
int rc;
|
||||
|
||||
/* reset the chip */
|
||||
outb(CmdReset, nic->ioaddr + ChipCmd);
|
||||
/* Fix up PCI device */
|
||||
adjust_pci_device ( pci );
|
||||
|
||||
/* 10 ms timeout */
|
||||
load_timer2(10*TICKS_PER_MS);
|
||||
while ((inb(nic->ioaddr + ChipCmd) & CmdReset) != 0 && timer2_running())
|
||||
/* wait */;
|
||||
/* Allocate net device */
|
||||
netdev = alloc_etherdev ( sizeof ( *rtl ) );
|
||||
if ( ! netdev ) {
|
||||
rc = -ENOMEM;
|
||||
goto err;
|
||||
}
|
||||
rtl = netdev->priv;
|
||||
pci_set_drvdata ( pci, netdev );
|
||||
memset ( rtl, 0, sizeof ( *rtl ) );
|
||||
rtl->ioaddr = pci->ioaddr;
|
||||
|
||||
/* Reset the NIC, set up EEPROM access and read MAC address */
|
||||
rtl_reset ( rtl );
|
||||
rtl_init_eeprom ( rtl );
|
||||
rtl_read_mac ( rtl, netdev->ll_addr );
|
||||
|
||||
/* Point to NIC specific routines */
|
||||
// netdev->open = rtl_open;
|
||||
// netdev->close = rtl_close;
|
||||
netdev->transmit = rtl_transmit;
|
||||
netdev->poll = rtl_poll;
|
||||
|
||||
/* Register network device */
|
||||
if ( ( rc = register_netdev ( netdev ) ) != 0 )
|
||||
goto err;
|
||||
|
||||
|
||||
#warning "Hack alert"
|
||||
rtl_open ( netdev );
|
||||
|
||||
|
||||
return 0;
|
||||
|
||||
err:
|
||||
/* Disable NIC */
|
||||
if ( rtl )
|
||||
rtl_reset ( rtl );
|
||||
/* Free net device */
|
||||
free_netdev ( netdev );
|
||||
return rc;
|
||||
}
|
||||
|
||||
static struct nic_operations rtl_operations = {
|
||||
.connect = rtl_connect,
|
||||
.poll = rtl_poll,
|
||||
.transmit = rtl_transmit,
|
||||
.irq = rtl_irq,
|
||||
/**
|
||||
* Remove PCI device
|
||||
*
|
||||
* @v pci PCI device
|
||||
*/
|
||||
static void rtl_remove ( struct pci_device *pci ) {
|
||||
struct net_device *netdev = pci_get_drvdata ( pci );
|
||||
struct rtl8139_nic *rtl = netdev->priv;
|
||||
|
||||
};
|
||||
|
||||
#warning "Hack alert"
|
||||
rtl_close ( netdev );
|
||||
|
||||
|
||||
unregister_netdev ( netdev );
|
||||
rtl_reset ( rtl );
|
||||
free_netdev ( netdev );
|
||||
}
|
||||
|
||||
static struct pci_device_id rtl8139_nics[] = {
|
||||
PCI_ROM(0x10ec, 0x8129, "rtl8129", "Realtek 8129"),
|
||||
@ -545,7 +599,9 @@ PCI_ROM(0x14ea, 0xab07, "fnw3800tx", "Planex FNW-3800-TX"),
|
||||
PCI_ROM(0xffff, 0x8139, "clone-rtl8139", "Cloned 8139"),
|
||||
};
|
||||
|
||||
PCI_DRIVER ( rtl8139_driver, rtl8139_nics, PCI_NO_CLASS );
|
||||
|
||||
DRIVER ( "RTL8139", nic_driver, pci_driver, rtl8139_driver,
|
||||
rtl8139_probe, rtl_disable );
|
||||
struct pci_driver rtl8139_driver __pci_driver = {
|
||||
.ids = rtl8139_nics,
|
||||
.id_count = ( sizeof ( rtl8139_nics ) / sizeof ( rtl8139_nics[0] ) ),
|
||||
.probe = rtl_probe,
|
||||
.remove = rtl_remove,
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user