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[realtek] Force EEPROM CS low before disabling EEPROM access mode

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Some RTL8169 cards seem to drive the EEPROM CS line high (i.e. active)
when 9346CR.EEM is set to "normal operating mode", with the result
that the CS line is never deasserted.  The symptom of this is that the
first read from the EEPROM will work, while all subsequent reads will
return garbage data.

Reported-by: Thomas Miletich <thomas.miletich@gmail.com>
Debugged-by: Thomas Miletich <thomas.miletich@gmail.com>
Tested-by: Thomas Miletich <thomas.miletich@gmail.com>
Signed-off-by: Michael Brown <mcb30@ipxe.org>
This commit is contained in:
Michael Brown 2012-08-24 16:44:29 +01:00
parent d1949f2737
commit 70618161ad
2 changed files with 32 additions and 3 deletions
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30
src/drivers/net/realtek.c
View File

@ -60,9 +60,35 @@ static const uint8_t realtek_eeprom_bits[] = {
[SPI_BIT_SCLK] = RTL_9346CR_EESK,
[SPI_BIT_MOSI] = RTL_9346CR_EEDI,
[SPI_BIT_MISO] = RTL_9346CR_EEDO,
[SPI_BIT_SS(0)] = ( RTL_9346CR_EECS | RTL_9346CR_EEM1 ),
[SPI_BIT_SS(0)] = RTL_9346CR_EECS,
};
/**
* Open bit-bashing interface
*
* @v basher Bit-bashing interface
*/
static void realtek_spi_open_bit ( struct bit_basher *basher ) {
struct realtek_nic *rtl = container_of ( basher, struct realtek_nic,
spibit.basher );
/* Enable EEPROM access */
writeb ( RTL_9346CR_EEM_EEPROM, rtl->regs + RTL_9346CR );
}
/**
* Close bit-bashing interface
*
* @v basher Bit-bashing interface
*/
static void realtek_spi_close_bit ( struct bit_basher *basher ) {
struct realtek_nic *rtl = container_of ( basher, struct realtek_nic,
spibit.basher );
/* Disable EEPROM access */
writeb ( RTL_9346CR_EEM_NORMAL, rtl->regs + RTL_9346CR );
}
/**
* Read input bit
*
@ -108,6 +134,8 @@ static void realtek_spi_write_bit ( struct bit_basher *basher,
/** SPI bit-bashing interface */
static struct bit_basher_operations realtek_basher_ops = {
.open = realtek_spi_open_bit,
.close = realtek_spi_close_bit,
.read = realtek_spi_read_bit,
.write = realtek_spi_write_bit,
};

5
src/drivers/net/realtek.h
View File

@ -158,8 +158,9 @@ enum realtek_legacy_status {
/** 93C46 (93C56) Command Register (byte) */
#define RTL_9346CR 0x50
#define RTL_9346CR_EEM1 0x80 /**< Mode select bit 1 */
#define RTL_9346CR_EEM0 0x40 /**< Mode select bit 0 */
#define RTL_9346CR_EEM(x) ( (x) << 6 ) /**< Mode select */
#define RTL_9346CR_EEM_EEPROM RTL_9346CR_EEM ( 0x2 ) /**< EEPROM mode */
#define RTL_9346CR_EEM_NORMAL RTL_9346CR_EEM ( 0x0 ) /**< Normal mode */
#define RTL_9346CR_EECS 0x08 /**< Chip select */
#define RTL_9346CR_EESK 0x04 /**< Clock */
#define RTL_9346CR_EEDI 0x02 /**< Data in */