mirror of
https://github.com/xcat2/xNBA.git
synced 2025-01-18 21:43:14 +00:00
eth_ntoa and warnings cleanup
This commit is contained in:
Marty Connor
parent
859cc71158
commit
0d1087a5de
@ -38,12 +38,10 @@
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* Indent Options: indent -kr -i8
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***************************************************************************/
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/* to get some global routines like printf */
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#include "etherboot.h"
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/* to get the interface to the body of the program */
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#include "nic.h"
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/* to get the PCI support functions, if this is a PCI NIC */
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#include <gpxe/pci.h>
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#include <gpxe/ethernet.h>
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#include "timer.h"
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#include "tlan.h"
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@ -58,13 +56,6 @@
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#define virt_to_le32desc(addr) cpu_to_le32(virt_to_bus(addr))
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#define le32desc_to_virt(addr) bus_to_virt(le32_to_cpu(addr))
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//#define EDEBUG
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#ifdef EDEBUG
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#define dprintf(x) printf x
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#else
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#define dprintf(x)
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#endif
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static void TLan_ResetLists(struct nic *nic __unused);
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static void TLan_ResetAdapter(struct nic *nic __unused);
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static void TLan_FinishReset(struct nic *nic __unused);
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@ -414,7 +405,7 @@ void TLan_FinishReset(struct nic *nic)
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if ((tlan_pci_tbl[chip_idx].flags & TLAN_ADAPTER_UNMANAGED_PHY)
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|| (priv->aui)) {
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status = MII_GS_LINK;
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dprintf(("TLAN: %s: Link forced.\n", priv->nic_name));
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DBG ( "TLAN: %s: Link forced.\n", priv->nic_name );
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} else {
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TLan_MiiReadReg(nic, phy, MII_GEN_STS, &status);
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udelay(1000);
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@ -426,27 +417,27 @@ void TLan_FinishReset(struct nic *nic)
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TLan_MiiReadReg(nic, phy, TLAN_TLPHY_PAR,
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&tlphy_par);
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dprintf(("TLAN: %s: Link active with ",
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priv->nic_name));
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DBG ( "TLAN: %s: Link active with ",
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priv->nic_name );
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if (!(tlphy_par & TLAN_PHY_AN_EN_STAT)) {
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dprintf(("forced 10%sMbps %s-Duplex\n",
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DBG ( "forced 10%sMbps %s-Duplex\n",
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tlphy_par & TLAN_PHY_SPEED_100 ? ""
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: "0",
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tlphy_par & TLAN_PHY_DUPLEX_FULL ?
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"Full" : "Half"));
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"Full" : "Half" );
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} else {
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dprintf
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(("AutoNegotiation enabled, at 10%sMbps %s-Duplex\n",
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DBG
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( "AutoNegotiation enabled, at 10%sMbps %s-Duplex\n",
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tlphy_par & TLAN_PHY_SPEED_100 ? "" :
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"0",
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tlphy_par & TLAN_PHY_DUPLEX_FULL ?
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"Full" : "Half"));
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dprintf(("TLAN: Partner capability: "));
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"Full" : "Half" );
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DBG ( "TLAN: Partner capability: " );
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for (i = 5; i <= 10; i++)
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if (partner & (1 << i)) {
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dprintf(("%s", media[i - 5]));
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DBG ( "%s", media[i - 5] );
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}
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dprintf(("\n"));
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DBG ( "\n" );
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}
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TLan_DioWrite8(BASE, TLAN_LED_REG, TLAN_LED_LINK);
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@ -459,7 +450,7 @@ void TLan_FinishReset(struct nic *nic)
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TLan_PhyMonitor(nic);
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#endif
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} else if (status & MII_GS_LINK) {
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dprintf(("TLAN: %s: Link active\n", priv->nic_name));
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DBG ( "TLAN: %s: Link active\n", priv->nic_name );
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TLan_DioWrite8(BASE, TLAN_LED_REG, TLAN_LED_LINK);
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}
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}
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@ -480,9 +471,9 @@ void TLan_FinishReset(struct nic *nic)
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outl(virt_to_bus(&rx_ring), BASE + TLAN_CH_PARM);
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outl(TLAN_HC_GO | TLAN_HC_RT, BASE + TLAN_HOST_CMD);
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} else {
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dprintf
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(("TLAN: %s: Link inactive, will retry in 10 secs...\n",
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priv->nic_name));
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DBG
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( "TLAN: %s: Link inactive, will retry in 10 secs...\n",
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priv->nic_name );
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/* TLan_SetTimer( nic, (10*HZ), TLAN_TIMER_FINISH_RESET ); */
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mdelay(10000);
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TLan_FinishReset(nic);
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@ -524,14 +515,14 @@ static int tlan_poll(struct nic *nic, int retrieve)
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nic->packetlen = framesize;
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dprintf((".%d.", framesize));
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DBG ( ".%d.", framesize );
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memcpy(nic->packet, rxb +
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(priv->cur_rx * TLAN_MAX_FRAME_SIZE), nic->packetlen);
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rx_ring[entry].cStat = 0;
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dprintf(("%d", entry));
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DBG ( "%d", entry );
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entry = (entry + 1) % TLAN_NUM_RX_LISTS;
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priv->cur_rx = entry;
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@ -546,8 +537,8 @@ static int tlan_poll(struct nic *nic, int retrieve)
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host_cmd = TLAN_HC_ACK | ack | (0x000C0000);
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outl(host_cmd, BASE + TLAN_HOST_CMD);
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dprintf(("AC: 0x%hX\n", inw(BASE + TLAN_CH_PARM)));
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dprintf(("PI-2: 0x%hX\n", inw(BASE + TLAN_HOST_INT)));
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DBG ( "AC: 0x%hX\n", inw(BASE + TLAN_CH_PARM) );
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DBG ( "PI-2: 0x%hX\n", inw(BASE + TLAN_HOST_INT) );
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}
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refill_rx(nic);
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return (1); /* initially as this is called to flush the input */
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@ -585,12 +576,11 @@ static void tlan_transmit(struct nic *nic, const char *d, /* Destination */
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u32 host_cmd;
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int eoc = 0;
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u16 tmpCStat;
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#ifdef EBDEBUG
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u16 host_int = inw(BASE + TLAN_HOST_INT);
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#endif
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int entry = 0;
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dprintf(("INT0-0x%hX\n", host_int));
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DBG ( "INT0-0x%hX\n", host_int );
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if (!priv->phyOnline) {
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printf("TRANSMIT: %s PHY is not ready\n", priv->nic_name);
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@ -600,7 +590,7 @@ static void tlan_transmit(struct nic *nic, const char *d, /* Destination */
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tail_list = priv->txList + priv->txTail;
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if (tail_list->cStat != TLAN_CSTAT_UNUSED) {
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printf("TRANSMIT: %s is busy (Head=%d Tail=%d)\n",
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printf("TRANSMIT: %s is busy (Head=%p Tail=%x)\n",
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priv->nic_name, priv->txList, priv->txTail);
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tx_ring[entry].cStat = TLAN_CSTAT_UNUSED;
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// priv->txBusyCount++;
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@ -649,7 +639,7 @@ static void tlan_transmit(struct nic *nic, const char *d, /* Destination */
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tail_list->cStat = TLAN_CSTAT_READY;
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dprintf(("INT1-0x%hX\n", inw(BASE + TLAN_HOST_INT)));
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DBG ( "INT1-0x%hX\n", inw(BASE + TLAN_HOST_INT) );
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if (!priv->txInProgress) {
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priv->txInProgress = 1;
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@ -657,11 +647,11 @@ static void tlan_transmit(struct nic *nic, const char *d, /* Destination */
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outl(TLAN_HC_GO, BASE + TLAN_HOST_CMD);
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} else {
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if (priv->txTail == 0) {
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dprintf(("Out buffer\n"));
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DBG ( "Out buffer\n" );
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(priv->txList + (TLAN_NUM_TX_LISTS - 1))->forward =
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virt_to_le32desc(tail_list);
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} else {
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dprintf(("Fix this \n"));
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DBG ( "Fix this \n" );
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(priv->txList + (priv->txTail - 1))->forward =
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virt_to_le32desc(tail_list);
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}
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@ -669,7 +659,7 @@ static void tlan_transmit(struct nic *nic, const char *d, /* Destination */
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CIRC_INC(priv->txTail, TLAN_NUM_TX_LISTS);
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dprintf(("INT2-0x%hX\n", inw(BASE + TLAN_HOST_INT)));
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DBG ( "INT2-0x%hX\n", inw(BASE + TLAN_HOST_INT) );
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to = currticks() + TX_TIME_OUT;
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while ((tail_list->cStat == TLAN_CSTAT_READY) && currticks() < to);
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@ -829,12 +819,12 @@ static int tlan_probe ( struct nic *nic, struct pci_device *pci ) {
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addrOfs + i,
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(u8 *) & nic->node_addr[i]);
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if (err) {
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printf("TLAN: %s: Error reading MAC from eeprom: %d\n",
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pci->name, err);
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} else
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/* Print out some hardware info */
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printf("%s: %! at ioaddr %hX, ",
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pci->name, nic->node_addr, pci->ioaddr);
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printf ( "TLAN: %s: Error reading MAC from eeprom: %d\n",
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pci->name, err);
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} else {
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DBG ( "%s: %s at ioaddr %#lX, ",
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pci->name, eth_ntoa ( nic->node_addr ), pci->ioaddr );
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}
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priv->tlanRev = TLan_DioRead8(BASE, TLAN_DEF_REVISION);
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printf("revision: 0x%hX\n", priv->tlanRev);
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@ -1395,7 +1385,7 @@ void TLan_PhyPowerDown(struct nic *nic)
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{
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u16 value;
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dprintf(("%s: Powering down PHY(s).\n", priv->nic_name));
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DBG ( "%s: Powering down PHY(s).\n", priv->nic_name );
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value = MII_GC_PDOWN | MII_GC_LOOPBK | MII_GC_ISOLATE;
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TLan_MiiSync(BASE);
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TLan_MiiWriteReg(nic, priv->phy[priv->phyNum], MII_GEN_CTL, value);
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@ -1422,7 +1412,7 @@ void TLan_PhyPowerUp(struct nic *nic)
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{
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u16 value;
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dprintf(("%s: Powering up PHY.\n", priv->nic_name));
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DBG ( "%s: Powering up PHY.\n", priv->nic_name );
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TLan_MiiSync(BASE);
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value = MII_GC_LOOPBK;
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TLan_MiiWriteReg(nic, priv->phy[priv->phyNum], MII_GEN_CTL, value);
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@ -1444,7 +1434,7 @@ void TLan_PhyReset(struct nic *nic)
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phy = priv->phy[priv->phyNum];
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dprintf(("%s: Reseting PHY.\n", priv->nic_name));
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DBG ( "%s: Reseting PHY.\n", priv->nic_name );
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TLan_MiiSync(BASE);
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value = MII_GC_LOOPBK | MII_GC_RESET;
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TLan_MiiWriteReg(nic, phy, MII_GEN_CTL, value);
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@ -1475,7 +1465,7 @@ void TLan_PhyStartLink(struct nic *nic)
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u16 tctl;
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phy = priv->phy[priv->phyNum];
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dprintf(("%s: Trying to activate link.\n", priv->nic_name));
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DBG ( "%s: Trying to activate link.\n", priv->nic_name );
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TLan_MiiReadReg(nic, phy, MII_GEN_STS, &status);
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TLan_MiiReadReg(nic, phy, MII_GEN_STS, &ability);
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@ -1509,8 +1499,8 @@ void TLan_PhyStartLink(struct nic *nic)
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* but the card need additional time to start AN.
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* .5 sec should be plenty extra.
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*/
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dprintf(("TLAN: %s: Starting autonegotiation.\n",
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priv->nic_name));
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DBG ( "TLAN: %s: Starting autonegotiation.\n",
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priv->nic_name );
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mdelay(4000);
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TLan_PhyFinishAutoNeg(nic);
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/* TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_PHY_FINISH_AN ); */
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@ -1593,7 +1583,7 @@ void TLan_PhyFinishAutoNeg(struct nic *nic)
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return;
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}
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dprintf(("TLAN: %s: Autonegotiation complete.\n", priv->nic_name));
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DBG ( "TLAN: %s: Autonegotiation complete.\n", priv->nic_name );
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TLan_MiiReadReg(nic, phy, MII_AN_ADV, &an_adv);
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TLan_MiiReadReg(nic, phy, MII_AN_LPA, &an_lpa);
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mode = an_adv & an_lpa & 0x03E0;
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@ -1624,13 +1614,13 @@ void TLan_PhyFinishAutoNeg(struct nic *nic)
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|| (an_adv & an_lpa & 0x0040)) {
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TLan_MiiWriteReg(nic, phy, MII_GEN_CTL,
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MII_GC_AUTOENB | MII_GC_DUPLEX);
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dprintf
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(("TLAN: Starting internal PHY with FULL-DUPLEX\n"));
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DBG
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( "TLAN: Starting internal PHY with FULL-DUPLEX\n" );
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} else {
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TLan_MiiWriteReg(nic, phy, MII_GEN_CTL,
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MII_GC_AUTOENB);
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dprintf
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(("TLAN: Starting internal PHY with HALF-DUPLEX\n"));
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DBG
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( "TLAN: Starting internal PHY with HALF-DUPLEX\n" );
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}
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}
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