736 lines
		
	
	
		
			18 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			736 lines
		
	
	
		
			18 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright 2004-2009 Analog Devices Inc.
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|  *                2005 National ICT Australia (NICTA)
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|  *                      Aidan Williams <aidan@nicta.com.au>
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|  *
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|  * Licensed under the GPL-2 or later.
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|  */
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| 
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| #include <linux/device.h>
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| #include <linux/platform_device.h>
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| #include <linux/mtd/mtd.h>
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| #include <linux/mtd/partitions.h>
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| #include <linux/mtd/physmap.h>
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| #include <linux/spi/spi.h>
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| #include <linux/spi/flash.h>
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| 
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| #include <linux/i2c.h>
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| #include <linux/irq.h>
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| #include <linux/interrupt.h>
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| #include <linux/usb/musb.h>
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| #include <asm/dma.h>
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| #include <asm/bfin5xx_spi.h>
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| #include <asm/reboot.h>
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| #include <asm/nand.h>
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| #include <asm/portmux.h>
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| #include <asm/dpmc.h>
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| #include <linux/spi/ad7877.h>
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| 
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| /*
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|  * Name the Board for the /proc/cpuinfo
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|  */
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| const char bfin_board_name[] = "ADI BF526-EZBRD";
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| 
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| /*
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|  *  Driver needs to know address, irq and flag pin.
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|  */
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| 
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| #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
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| static struct resource musb_resources[] = {
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| 	[0] = {
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| 		.start	= 0xffc03800,
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| 		.end	= 0xffc03cff,
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| 		.flags	= IORESOURCE_MEM,
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| 	},
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| 	[1] = {	/* general IRQ */
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| 		.start	= IRQ_USB_INT0,
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| 		.end	= IRQ_USB_INT0,
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| 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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| 	},
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| 	[2] = {	/* DMA IRQ */
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| 		.start	= IRQ_USB_DMA,
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| 		.end	= IRQ_USB_DMA,
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| 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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| 	},
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| };
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| 
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| static struct musb_hdrc_config musb_config = {
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| 	.multipoint	= 0,
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| 	.dyn_fifo	= 0,
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| 	.soft_con	= 1,
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| 	.dma		= 1,
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| 	.num_eps	= 8,
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| 	.dma_channels	= 8,
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| 	.gpio_vrsel	= GPIO_PG13,
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| };
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| 
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| static struct musb_hdrc_platform_data musb_plat = {
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| #if defined(CONFIG_USB_MUSB_OTG)
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| 	.mode		= MUSB_OTG,
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| #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
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| 	.mode		= MUSB_HOST,
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| #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
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| 	.mode		= MUSB_PERIPHERAL,
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| #endif
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| 	.config		= &musb_config,
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| };
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| 
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| static u64 musb_dmamask = ~(u32)0;
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| 
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| static struct platform_device musb_device = {
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| 	.name		= "musb_hdrc",
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| 	.id		= 0,
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| 	.dev = {
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| 		.dma_mask		= &musb_dmamask,
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| 		.coherent_dma_mask	= 0xffffffff,
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| 		.platform_data		= &musb_plat,
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| 	},
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| 	.num_resources	= ARRAY_SIZE(musb_resources),
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| 	.resource	= musb_resources,
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| };
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| #endif
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| 
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| #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
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| static struct mtd_partition ezbrd_partitions[] = {
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| 	{
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| 		.name       = "bootloader(nor)",
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| 		.size       = 0x40000,
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| 		.offset     = 0,
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| 	}, {
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| 		.name       = "linux kernel(nor)",
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| 		.size       = 0x1C0000,
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| 		.offset     = MTDPART_OFS_APPEND,
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| 	}, {
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| 		.name       = "file system(nor)",
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| 		.size       = MTDPART_SIZ_FULL,
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| 		.offset     = MTDPART_OFS_APPEND,
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| 	}
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| };
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| 
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| static struct physmap_flash_data ezbrd_flash_data = {
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| 	.width      = 2,
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| 	.parts      = ezbrd_partitions,
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| 	.nr_parts   = ARRAY_SIZE(ezbrd_partitions),
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| };
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| 
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| static struct resource ezbrd_flash_resource = {
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| 	.start = 0x20000000,
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| 	.end   = 0x203fffff,
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| 	.flags = IORESOURCE_MEM,
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| };
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| 
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| static struct platform_device ezbrd_flash_device = {
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| 	.name          = "physmap-flash",
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| 	.id            = 0,
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| 	.dev = {
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| 		.platform_data = &ezbrd_flash_data,
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| 	},
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| 	.num_resources = 1,
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| 	.resource      = &ezbrd_flash_resource,
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| };
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| #endif
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| 
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| #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
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| static struct mtd_partition partition_info[] = {
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| 	{
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| 		.name = "linux kernel(nand)",
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| 		.offset = 0,
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| 		.size = 4 * 1024 * 1024,
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| 	},
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| 	{
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| 		.name = "file system(nand)",
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| 		.offset = MTDPART_OFS_APPEND,
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| 		.size = MTDPART_SIZ_FULL,
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| 	},
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| };
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| 
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| static struct bf5xx_nand_platform bf5xx_nand_platform = {
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| 	.page_size = NFC_PG_SIZE_256,
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| 	.data_width = NFC_NWIDTH_8,
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| 	.partitions = partition_info,
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| 	.nr_partitions = ARRAY_SIZE(partition_info),
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| 	.rd_dly = 3,
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| 	.wr_dly = 3,
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| };
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| 
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| static struct resource bf5xx_nand_resources[] = {
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| 	{
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| 		.start = NFC_CTL,
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| 		.end = NFC_DATA_RD + 2,
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| 		.flags = IORESOURCE_MEM,
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| 	},
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| 	{
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| 		.start = CH_NFC,
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| 		.end = CH_NFC,
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| 		.flags = IORESOURCE_IRQ,
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| 	},
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| };
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| 
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| static struct platform_device bf5xx_nand_device = {
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| 	.name = "bf5xx-nand",
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| 	.id = 0,
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| 	.num_resources = ARRAY_SIZE(bf5xx_nand_resources),
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| 	.resource = bf5xx_nand_resources,
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| 	.dev = {
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| 		.platform_data = &bf5xx_nand_platform,
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| 	},
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| };
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| #endif
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| 
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| #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
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| static struct platform_device rtc_device = {
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| 	.name = "rtc-bfin",
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| 	.id   = -1,
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| };
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| #endif
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| 
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| 
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| #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
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| static struct platform_device bfin_mii_bus = {
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| 	.name = "bfin_mii_bus",
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| };
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| 
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| static struct platform_device bfin_mac_device = {
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| 	.name = "bfin_mac",
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| 	.dev.platform_data = &bfin_mii_bus,
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| };
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| #endif
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| 
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| #if defined(CONFIG_MTD_M25P80) \
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| 	|| defined(CONFIG_MTD_M25P80_MODULE)
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| static struct mtd_partition bfin_spi_flash_partitions[] = {
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| 	{
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| 		.name = "bootloader(spi)",
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| 		.size = 0x00040000,
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| 		.offset = 0,
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| 		.mask_flags = MTD_CAP_ROM
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| 	}, {
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| 		.name = "linux kernel(spi)",
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| 		.size = MTDPART_SIZ_FULL,
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| 		.offset = MTDPART_OFS_APPEND,
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| 	}
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| };
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| 
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| static struct flash_platform_data bfin_spi_flash_data = {
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| 	.name = "m25p80",
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| 	.parts = bfin_spi_flash_partitions,
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| 	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
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| 	.type = "sst25wf040",
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| };
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| 
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| /* SPI flash chip (sst25wf040) */
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| static struct bfin5xx_spi_chip spi_flash_chip_info = {
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| 	.enable_dma = 0,         /* use dma transfer with this chip*/
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| 	.bits_per_word = 8,
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| };
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| #endif
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| 
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| #if defined(CONFIG_BFIN_SPI_ADC) \
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| 	|| defined(CONFIG_BFIN_SPI_ADC_MODULE)
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| /* SPI ADC chip */
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| static struct bfin5xx_spi_chip spi_adc_chip_info = {
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| 	.enable_dma = 1,         /* use dma transfer with this chip*/
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| 	.bits_per_word = 16,
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| };
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| #endif
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| 
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| #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
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| static struct bfin5xx_spi_chip mmc_spi_chip_info = {
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| 	.enable_dma = 0,
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| 	.bits_per_word = 8,
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| };
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| #endif
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| 
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| #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
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| static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
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| 	.enable_dma = 0,
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| 	.bits_per_word = 16,
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| };
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| 
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| static const struct ad7877_platform_data bfin_ad7877_ts_info = {
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| 	.model			= 7877,
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| 	.vref_delay_usecs	= 50,	/* internal, no capacitor */
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| 	.x_plate_ohms		= 419,
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| 	.y_plate_ohms		= 486,
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| 	.pressure_max		= 1000,
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| 	.pressure_min		= 0,
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| 	.stopacq_polarity 	= 1,
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| 	.first_conversion_delay = 3,
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| 	.acquisition_time 	= 1,
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| 	.averaging 		= 1,
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| 	.pen_down_acc_interval 	= 1,
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| };
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| #endif
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| 
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| #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
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| #include <linux/spi/ad7879.h>
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| static const struct ad7879_platform_data bfin_ad7879_ts_info = {
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| 	.model			= 7879,	/* Model = AD7879 */
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| 	.x_plate_ohms		= 620,	/* 620 Ohm from the touch datasheet */
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| 	.pressure_max		= 10000,
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| 	.pressure_min		= 0,
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| 	.first_conversion_delay = 3,	/* wait 512us before do a first conversion */
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| 	.acquisition_time 	= 1,	/* 4us acquisition time per sample */
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| 	.median			= 2,	/* do 8 measurements */
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| 	.averaging 		= 1,	/* take the average of 4 middle samples */
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| 	.pen_down_acc_interval 	= 255,	/* 9.4 ms */
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| 	.gpio_output		= 1,	/* configure AUX/VBAT/GPIO as GPIO output */
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| 	.gpio_default 		= 1,	/* During initialization set GPIO = HIGH */
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| };
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| #endif
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| 
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| #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
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| static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
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| 	.enable_dma = 0,
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| 	.bits_per_word = 16,
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| };
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| #endif
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| 
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| #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
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| 	 && defined(CONFIG_SND_SOC_WM8731_SPI)
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| static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
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| 	.enable_dma = 0,
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| 	.bits_per_word = 16,
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| };
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| #endif
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| 
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| #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
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| static struct bfin5xx_spi_chip spidev_chip_info = {
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| 	.enable_dma = 0,
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| 	.bits_per_word = 8,
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| };
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| #endif
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| 
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| #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
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| static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
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| 	.enable_dma = 0,
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| 	.bits_per_word = 8,
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| };
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| #endif
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| 
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| static struct spi_board_info bfin_spi_board_info[] __initdata = {
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| #if defined(CONFIG_MTD_M25P80) \
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| 	|| defined(CONFIG_MTD_M25P80_MODULE)
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| 	{
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| 		/* the modalias must be the same as spi device driver name */
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| 		.modalias = "m25p80", /* Name of spi_driver for this device */
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| 		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
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| 		.bus_num = 0, /* Framework bus number */
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| 		.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
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| 		.platform_data = &bfin_spi_flash_data,
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| 		.controller_data = &spi_flash_chip_info,
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| 		.mode = SPI_MODE_3,
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| 	},
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| #endif
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| 
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| #if defined(CONFIG_BFIN_SPI_ADC) \
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| 	|| defined(CONFIG_BFIN_SPI_ADC_MODULE)
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| 	{
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| 		.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
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| 		.max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
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| 		.bus_num = 0, /* Framework bus number */
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| 		.chip_select = 1, /* Framework chip select. */
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| 		.platform_data = NULL, /* No spi_driver specific config */
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| 		.controller_data = &spi_adc_chip_info,
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| 	},
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| #endif
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| 
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| #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
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| 	{
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| 		.modalias = "mmc_spi",
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| 		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
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| 		.bus_num = 0,
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| 		.chip_select = 5,
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| 		.controller_data = &mmc_spi_chip_info,
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| 		.mode = SPI_MODE_3,
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| 	},
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| #endif
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| #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
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| 	{
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| 		.modalias		= "ad7877",
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| 		.platform_data		= &bfin_ad7877_ts_info,
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| 		.irq			= IRQ_PF8,
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| 		.max_speed_hz	= 12500000,     /* max spi clock (SCK) speed in HZ */
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| 		.bus_num	= 0,
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| 		.chip_select  = 2,
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| 		.controller_data = &spi_ad7877_chip_info,
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| 	},
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| #endif
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| #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
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| 	{
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| 		.modalias = "ad7879",
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| 		.platform_data = &bfin_ad7879_ts_info,
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| 		.irq = IRQ_PG0,
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| 		.max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
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| 		.bus_num = 0,
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| 		.chip_select = 5,
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| 		.controller_data = &spi_ad7879_chip_info,
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| 		.mode = SPI_CPHA | SPI_CPOL,
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| 	},
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| #endif
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| #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
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| 	 && defined(CONFIG_SND_SOC_WM8731_SPI)
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| 	{
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| 		.modalias	= "wm8731",
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| 		.max_speed_hz	= 3125000,     /* max spi clock (SCK) speed in HZ */
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| 		.bus_num	= 0,
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| 		.chip_select    = 5,
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| 		.controller_data = &spi_wm8731_chip_info,
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| 		.mode = SPI_MODE_0,
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| 	},
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| #endif
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| #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
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| 	{
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| 		.modalias = "spidev",
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| 		.max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
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| 		.bus_num = 0,
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| 		.chip_select = 1,
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| 		.controller_data = &spidev_chip_info,
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| 	},
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| #endif
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| #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
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| 	{
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| 		.modalias = "bfin-lq035q1-spi",
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| 		.max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
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| 		.bus_num = 0,
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| 		.chip_select = 1,
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| 		.controller_data = &lq035q1_spi_chip_info,
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| 		.mode = SPI_CPHA | SPI_CPOL,
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| 	},
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| #endif
 | |
| };
 | |
| 
 | |
| #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 | |
| /* SPI controller data */
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| static struct bfin5xx_spi_master bfin_spi0_info = {
 | |
| 	.num_chipselect = 8,
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| 	.enable_dma = 1,  /* master has the ability to do dma transfer */
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| 	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 | |
| };
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| 
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| /* SPI (0) */
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| static struct resource bfin_spi0_resource[] = {
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| 	[0] = {
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| 		.start = SPI0_REGBASE,
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| 		.end   = SPI0_REGBASE + 0xFF,
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| 		.flags = IORESOURCE_MEM,
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| 		},
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| 	[1] = {
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| 		.start = CH_SPI,
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| 		.end   = CH_SPI,
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| 		.flags = IORESOURCE_DMA,
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| 	},
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| 	[2] = {
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| 		.start = IRQ_SPI,
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| 		.end   = IRQ_SPI,
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| 		.flags = IORESOURCE_IRQ,
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| 	},
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| };
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| 
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| static struct platform_device bfin_spi0_device = {
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| 	.name = "bfin-spi",
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| 	.id = 0, /* Bus number */
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| 	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
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| 	.resource = bfin_spi0_resource,
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| 	.dev = {
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| 		.platform_data = &bfin_spi0_info, /* Passed to driver */
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| 	},
 | |
| };
 | |
| #endif  /* spi master and devices */
 | |
| 
 | |
| #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 | |
| static struct resource bfin_uart_resources[] = {
 | |
| #ifdef CONFIG_SERIAL_BFIN_UART0
 | |
| 	{
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| 		.start = 0xFFC00400,
 | |
| 		.end = 0xFFC004FF,
 | |
| 		.flags = IORESOURCE_MEM,
 | |
| 	},
 | |
| #endif
 | |
| #ifdef CONFIG_SERIAL_BFIN_UART1
 | |
| 	{
 | |
| 		.start = 0xFFC02000,
 | |
| 		.end = 0xFFC020FF,
 | |
| 		.flags = IORESOURCE_MEM,
 | |
| 	},
 | |
| #endif
 | |
| };
 | |
| 
 | |
| static struct platform_device bfin_uart_device = {
 | |
| 	.name = "bfin-uart",
 | |
| 	.id = 1,
 | |
| 	.num_resources = ARRAY_SIZE(bfin_uart_resources),
 | |
| 	.resource = bfin_uart_resources,
 | |
| };
 | |
| #endif
 | |
| 
 | |
| #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 | |
| #ifdef CONFIG_BFIN_SIR0
 | |
| static struct resource bfin_sir0_resources[] = {
 | |
| 	{
 | |
| 		.start = 0xFFC00400,
 | |
| 		.end = 0xFFC004FF,
 | |
| 		.flags = IORESOURCE_MEM,
 | |
| 	},
 | |
| 	{
 | |
| 		.start = IRQ_UART0_RX,
 | |
| 		.end = IRQ_UART0_RX+1,
 | |
| 		.flags = IORESOURCE_IRQ,
 | |
| 	},
 | |
| 	{
 | |
| 		.start = CH_UART0_RX,
 | |
| 		.end = CH_UART0_RX+1,
 | |
| 		.flags = IORESOURCE_DMA,
 | |
| 	},
 | |
| };
 | |
| 
 | |
| static struct platform_device bfin_sir0_device = {
 | |
| 	.name = "bfin_sir",
 | |
| 	.id = 0,
 | |
| 	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
 | |
| 	.resource = bfin_sir0_resources,
 | |
| };
 | |
| #endif
 | |
| #ifdef CONFIG_BFIN_SIR1
 | |
| static struct resource bfin_sir1_resources[] = {
 | |
| 	{
 | |
| 		.start = 0xFFC02000,
 | |
| 		.end = 0xFFC020FF,
 | |
| 		.flags = IORESOURCE_MEM,
 | |
| 	},
 | |
| 	{
 | |
| 		.start = IRQ_UART1_RX,
 | |
| 		.end = IRQ_UART1_RX+1,
 | |
| 		.flags = IORESOURCE_IRQ,
 | |
| 	},
 | |
| 	{
 | |
| 		.start = CH_UART1_RX,
 | |
| 		.end = CH_UART1_RX+1,
 | |
| 		.flags = IORESOURCE_DMA,
 | |
| 	},
 | |
| };
 | |
| 
 | |
| static struct platform_device bfin_sir1_device = {
 | |
| 	.name = "bfin_sir",
 | |
| 	.id = 1,
 | |
| 	.num_resources = ARRAY_SIZE(bfin_sir1_resources),
 | |
| 	.resource = bfin_sir1_resources,
 | |
| };
 | |
| #endif
 | |
| #endif
 | |
| 
 | |
| #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 | |
| static struct resource bfin_twi0_resource[] = {
 | |
| 	[0] = {
 | |
| 		.start = TWI0_REGBASE,
 | |
| 		.end   = TWI0_REGBASE,
 | |
| 		.flags = IORESOURCE_MEM,
 | |
| 	},
 | |
| 	[1] = {
 | |
| 		.start = IRQ_TWI,
 | |
| 		.end   = IRQ_TWI,
 | |
| 		.flags = IORESOURCE_IRQ,
 | |
| 	},
 | |
| };
 | |
| 
 | |
| static struct platform_device i2c_bfin_twi_device = {
 | |
| 	.name = "i2c-bfin-twi",
 | |
| 	.id = 0,
 | |
| 	.num_resources = ARRAY_SIZE(bfin_twi0_resource),
 | |
| 	.resource = bfin_twi0_resource,
 | |
| };
 | |
| #endif
 | |
| 
 | |
| static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 | |
| #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
 | |
| 	{
 | |
| 		I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 | |
| 	},
 | |
| #endif
 | |
| #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
 | |
| 	{
 | |
| 		I2C_BOARD_INFO("pcf8574_keypad", 0x27),
 | |
| 		.irq = IRQ_PF8,
 | |
| 	},
 | |
| #endif
 | |
| };
 | |
| 
 | |
| #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 | |
| static struct platform_device bfin_sport0_uart_device = {
 | |
| 	.name = "bfin-sport-uart",
 | |
| 	.id = 0,
 | |
| };
 | |
| 
 | |
| static struct platform_device bfin_sport1_uart_device = {
 | |
| 	.name = "bfin-sport-uart",
 | |
| 	.id = 1,
 | |
| };
 | |
| #endif
 | |
| 
 | |
| #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 | |
| #include <linux/input.h>
 | |
| #include <linux/gpio_keys.h>
 | |
| 
 | |
| static struct gpio_keys_button bfin_gpio_keys_table[] = {
 | |
| 	{BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
 | |
| 	{BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
 | |
| };
 | |
| 
 | |
| static struct gpio_keys_platform_data bfin_gpio_keys_data = {
 | |
| 	.buttons        = bfin_gpio_keys_table,
 | |
| 	.nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
 | |
| };
 | |
| 
 | |
| static struct platform_device bfin_device_gpiokeys = {
 | |
| 	.name      = "gpio-keys",
 | |
| 	.dev = {
 | |
| 		.platform_data = &bfin_gpio_keys_data,
 | |
| 	},
 | |
| };
 | |
| #endif
 | |
| 
 | |
| static const unsigned int cclk_vlev_datasheet[] =
 | |
| {
 | |
| 	VRPAIR(VLEV_100, 400000000),
 | |
| 	VRPAIR(VLEV_105, 426000000),
 | |
| 	VRPAIR(VLEV_110, 500000000),
 | |
| 	VRPAIR(VLEV_115, 533000000),
 | |
| 	VRPAIR(VLEV_120, 600000000),
 | |
| };
 | |
| 
 | |
| static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 | |
| 	.tuple_tab = cclk_vlev_datasheet,
 | |
| 	.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 | |
| 	.vr_settling_time = 25 /* us */,
 | |
| };
 | |
| 
 | |
| static struct platform_device bfin_dpmc = {
 | |
| 	.name = "bfin dpmc",
 | |
| 	.dev = {
 | |
| 		.platform_data = &bfin_dmpc_vreg_data,
 | |
| 	},
 | |
| };
 | |
| 
 | |
| #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 | |
| #include <asm/bfin-lq035q1.h>
 | |
| 
 | |
| static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
 | |
| 	.mode = 	LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
 | |
| 	.use_bl = 	1,
 | |
| 	.gpio_bl =	GPIO_PG12,
 | |
| };
 | |
| 
 | |
| static struct resource bfin_lq035q1_resources[] = {
 | |
| 	{
 | |
| 		.start = IRQ_PPI_ERROR,
 | |
| 		.end = IRQ_PPI_ERROR,
 | |
| 		.flags = IORESOURCE_IRQ,
 | |
| 	},
 | |
| };
 | |
| 
 | |
| static struct platform_device bfin_lq035q1_device = {
 | |
| 	.name		= "bfin-lq035q1",
 | |
| 	.id		= -1,
 | |
| 	.num_resources 	= ARRAY_SIZE(bfin_lq035q1_resources),
 | |
| 	.resource 	= bfin_lq035q1_resources,
 | |
| 	.dev		= {
 | |
| 		.platform_data = &bfin_lq035q1_data,
 | |
| 	},
 | |
| };
 | |
| #endif
 | |
| 
 | |
| static struct platform_device *stamp_devices[] __initdata = {
 | |
| 
 | |
| 	&bfin_dpmc,
 | |
| 
 | |
| #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 | |
| 	&bf5xx_nand_device,
 | |
| #endif
 | |
| 
 | |
| #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 | |
| 	&rtc_device,
 | |
| #endif
 | |
| 
 | |
| #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
 | |
| 	&musb_device,
 | |
| #endif
 | |
| 
 | |
| #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 | |
| 	&bfin_mii_bus,
 | |
| 	&bfin_mac_device,
 | |
| #endif
 | |
| 
 | |
| #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 | |
| 	&bfin_spi0_device,
 | |
| #endif
 | |
| 
 | |
| #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 | |
| 	&bfin_uart_device,
 | |
| #endif
 | |
| 
 | |
| #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 | |
| 	&bfin_lq035q1_device,
 | |
| #endif
 | |
| 
 | |
| #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 | |
| #ifdef CONFIG_BFIN_SIR0
 | |
| 	&bfin_sir0_device,
 | |
| #endif
 | |
| #ifdef CONFIG_BFIN_SIR1
 | |
| 	&bfin_sir1_device,
 | |
| #endif
 | |
| #endif
 | |
| 
 | |
| #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 | |
| 	&i2c_bfin_twi_device,
 | |
| #endif
 | |
| 
 | |
| #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 | |
| 	&bfin_sport0_uart_device,
 | |
| 	&bfin_sport1_uart_device,
 | |
| #endif
 | |
| 
 | |
| #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 | |
| 	&bfin_device_gpiokeys,
 | |
| #endif
 | |
| 
 | |
| #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 | |
| 	&ezbrd_flash_device,
 | |
| #endif
 | |
| };
 | |
| 
 | |
| static int __init ezbrd_init(void)
 | |
| {
 | |
| 	printk(KERN_INFO "%s(): registering device resources\n", __func__);
 | |
| 	i2c_register_board_info(0, bfin_i2c_board_info,
 | |
| 				ARRAY_SIZE(bfin_i2c_board_info));
 | |
| 	platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 | |
| 	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 | |
| 	return 0;
 | |
| }
 | |
| 
 | |
| arch_initcall(ezbrd_init);
 | |
| 
 | |
| void native_machine_restart(char *cmd)
 | |
| {
 | |
| 	/* workaround reboot hang when booting from SPI */
 | |
| 	if ((bfin_read_SYSCR() & 0x7) == 0x3)
 | |
| 		bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 | |
| }
 | |
| 
 | |
| void bfin_get_ether_addr(char *addr)
 | |
| {
 | |
| 	/* the MAC is stored in OTP memory page 0xDF */
 | |
| 	u32 ret;
 | |
| 	u64 otp_mac;
 | |
| 	u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
 | |
| 
 | |
| 	ret = otp_read(0xDF, 0x00, &otp_mac);
 | |
| 	if (!(ret & 0x1)) {
 | |
| 		char *otp_mac_p = (char *)&otp_mac;
 | |
| 		for (ret = 0; ret < 6; ++ret)
 | |
| 			addr[ret] = otp_mac_p[5 - ret];
 | |
| 	}
 | |
| }
 | |
| EXPORT_SYMBOL(bfin_get_ether_addr);
 |