163 lines
		
	
	
		
			4.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			163 lines
		
	
	
		
			4.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/* linux/arch/arm/mach-s3c2410/pm.c
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 *
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 * Copyright (c) 2006 Simtec Electronics
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 *	Ben Dooks <ben@simtec.co.uk>
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 *
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 * S3C2410 (and compatible) Power Manager (Suspend-To-RAM) support
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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*/
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#include <linux/init.h>
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#include <linux/suspend.h>
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#include <linux/errno.h>
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#include <linux/time.h>
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#include <linux/sysdev.h>
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#include <linux/gpio.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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#include <mach/regs-gpio.h>
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#include <mach/h1940.h>
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#include <plat/cpu.h>
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#include <plat/pm.h>
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static void s3c2410_pm_prepare(void)
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{
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	/* ensure at least GSTATUS3 has the resume address */
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	__raw_writel(virt_to_phys(s3c_cpu_resume), S3C2410_GSTATUS3);
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	S3C_PMDBG("GSTATUS3 0x%08x\n", __raw_readl(S3C2410_GSTATUS3));
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	S3C_PMDBG("GSTATUS4 0x%08x\n", __raw_readl(S3C2410_GSTATUS4));
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	if (machine_is_h1940()) {
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		void *base = phys_to_virt(H1940_SUSPEND_CHECK);
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		unsigned long ptr;
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		unsigned long calc = 0;
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		/* generate check for the bootloader to check on resume */
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		for (ptr = 0; ptr < 0x40000; ptr += 0x400)
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			calc += __raw_readl(base+ptr);
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		__raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
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	}
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	/* the RX3715 uses similar code and the same H1940 and the
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	 * same offsets for resume and checksum pointers */
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	if (machine_is_rx3715()) {
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		void *base = phys_to_virt(H1940_SUSPEND_CHECK);
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		unsigned long ptr;
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		unsigned long calc = 0;
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		/* generate check for the bootloader to check on resume */
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		for (ptr = 0; ptr < 0x40000; ptr += 0x4)
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			calc += __raw_readl(base+ptr);
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		__raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
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	}
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	if ( machine_is_aml_m5900() )
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		s3c2410_gpio_setpin(S3C2410_GPF(2), 1);
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}
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static int s3c2410_pm_resume(struct sys_device *dev)
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{
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	unsigned long tmp;
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	/* unset the return-from-sleep flag, to ensure reset */
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	tmp = __raw_readl(S3C2410_GSTATUS2);
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	tmp &= S3C2410_GSTATUS2_OFFRESET;
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	__raw_writel(tmp, S3C2410_GSTATUS2);
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	if ( machine_is_aml_m5900() )
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		s3c2410_gpio_setpin(S3C2410_GPF(2), 0);
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	return 0;
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}
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static int s3c2410_pm_add(struct sys_device *dev)
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{
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	pm_cpu_prep = s3c2410_pm_prepare;
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	pm_cpu_sleep = s3c2410_cpu_suspend;
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	return 0;
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}
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#if defined(CONFIG_CPU_S3C2410)
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static struct sysdev_driver s3c2410_pm_driver = {
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	.add		= s3c2410_pm_add,
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	.resume		= s3c2410_pm_resume,
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};
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/* register ourselves */
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static int __init s3c2410_pm_drvinit(void)
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{
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	return sysdev_driver_register(&s3c2410_sysclass, &s3c2410_pm_driver);
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}
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arch_initcall(s3c2410_pm_drvinit);
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static struct sysdev_driver s3c2410a_pm_driver = {
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	.add		= s3c2410_pm_add,
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	.resume		= s3c2410_pm_resume,
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};
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static int __init s3c2410a_pm_drvinit(void)
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{
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	return sysdev_driver_register(&s3c2410a_sysclass, &s3c2410a_pm_driver);
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}
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arch_initcall(s3c2410a_pm_drvinit);
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#endif
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#if defined(CONFIG_CPU_S3C2440)
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static struct sysdev_driver s3c2440_pm_driver = {
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	.add		= s3c2410_pm_add,
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	.resume		= s3c2410_pm_resume,
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};
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static int __init s3c2440_pm_drvinit(void)
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{
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	return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_pm_driver);
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}
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arch_initcall(s3c2440_pm_drvinit);
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#endif
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#if defined(CONFIG_CPU_S3C2442)
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static struct sysdev_driver s3c2442_pm_driver = {
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	.add		= s3c2410_pm_add,
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	.resume		= s3c2410_pm_resume,
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};
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static int __init s3c2442_pm_drvinit(void)
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{
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	return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_pm_driver);
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}
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arch_initcall(s3c2442_pm_drvinit);
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#endif
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