681 lines
19 KiB
C
681 lines
19 KiB
C
/*
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* SuperH Mobile I2C Controller
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*
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* Copyright (C) 2008 Magnus Damm
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*
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* Portions of the code based on out-of-tree driver i2c-sh7343.c
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* Copyright (c) 2006 Carlos Munoz <carlos@kenati.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/i2c.h>
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#include <linux/err.h>
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#include <linux/pm_runtime.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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/* Transmit operation: */
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/* */
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/* 0 byte transmit */
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/* BUS: S A8 ACK P */
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/* IRQ: DTE WAIT */
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/* ICIC: */
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/* ICCR: 0x94 0x90 */
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/* ICDR: A8 */
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/* */
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/* 1 byte transmit */
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/* BUS: S A8 ACK D8(1) ACK P */
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/* IRQ: DTE WAIT WAIT */
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/* ICIC: -DTE */
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/* ICCR: 0x94 0x90 */
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/* ICDR: A8 D8(1) */
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/* */
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/* 2 byte transmit */
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/* BUS: S A8 ACK D8(1) ACK D8(2) ACK P */
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/* IRQ: DTE WAIT WAIT WAIT */
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/* ICIC: -DTE */
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/* ICCR: 0x94 0x90 */
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/* ICDR: A8 D8(1) D8(2) */
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/* */
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/* 3 bytes or more, +---------+ gets repeated */
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/* */
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/* */
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/* Receive operation: */
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/* */
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/* 0 byte receive - not supported since slave may hold SDA low */
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/* */
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/* 1 byte receive [TX] | [RX] */
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/* BUS: S A8 ACK | D8(1) ACK P */
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/* IRQ: DTE WAIT | WAIT DTE */
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/* ICIC: -DTE | +DTE */
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/* ICCR: 0x94 0x81 | 0xc0 */
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/* ICDR: A8 | D8(1) */
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/* */
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/* 2 byte receive [TX]| [RX] */
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/* BUS: S A8 ACK | D8(1) ACK D8(2) ACK P */
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/* IRQ: DTE WAIT | WAIT WAIT DTE */
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/* ICIC: -DTE | +DTE */
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/* ICCR: 0x94 0x81 | 0xc0 */
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/* ICDR: A8 | D8(1) D8(2) */
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/* */
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/* 3 byte receive [TX] | [RX] */
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/* BUS: S A8 ACK | D8(1) ACK D8(2) ACK D8(3) ACK P */
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/* IRQ: DTE WAIT | WAIT WAIT WAIT DTE */
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/* ICIC: -DTE | +DTE */
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/* ICCR: 0x94 0x81 | 0xc0 */
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/* ICDR: A8 | D8(1) D8(2) D8(3) */
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/* */
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/* 4 bytes or more, this part is repeated +---------+ */
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/* */
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/* */
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/* Interrupt order and BUSY flag */
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/* ___ _ */
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/* SDA ___\___XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXAAAAAAAAA___/ */
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/* SCL \_/1\_/2\_/3\_/4\_/5\_/6\_/7\_/8\___/9\_____/ */
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/* */
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/* S D7 D6 D5 D4 D3 D2 D1 D0 P */
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/* ___ */
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/* WAIT IRQ ________________________________/ \___________ */
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/* TACK IRQ ____________________________________/ \_______ */
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/* DTE IRQ __________________________________________/ \_ */
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/* AL IRQ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
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/* _______________________________________________ */
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/* BUSY __/ \_ */
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/* */
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enum sh_mobile_i2c_op {
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OP_START = 0,
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OP_TX_FIRST,
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OP_TX,
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OP_TX_STOP,
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OP_TX_TO_RX,
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OP_RX,
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OP_RX_STOP,
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OP_RX_STOP_DATA,
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};
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struct sh_mobile_i2c_data {
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struct device *dev;
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void __iomem *reg;
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struct i2c_adapter adap;
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struct clk *clk;
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u_int8_t iccl;
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u_int8_t icch;
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spinlock_t lock;
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wait_queue_head_t wait;
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struct i2c_msg *msg;
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int pos;
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int sr;
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};
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#define NORMAL_SPEED 100000 /* FAST_SPEED 400000 */
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/* Register offsets */
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#define ICDR(pd) (pd->reg + 0x00)
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#define ICCR(pd) (pd->reg + 0x04)
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#define ICSR(pd) (pd->reg + 0x08)
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#define ICIC(pd) (pd->reg + 0x0c)
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#define ICCL(pd) (pd->reg + 0x10)
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#define ICCH(pd) (pd->reg + 0x14)
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/* Register bits */
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#define ICCR_ICE 0x80
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#define ICCR_RACK 0x40
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#define ICCR_TRS 0x10
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#define ICCR_BBSY 0x04
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#define ICCR_SCP 0x01
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#define ICSR_SCLM 0x80
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#define ICSR_SDAM 0x40
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#define SW_DONE 0x20
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#define ICSR_BUSY 0x10
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#define ICSR_AL 0x08
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#define ICSR_TACK 0x04
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#define ICSR_WAIT 0x02
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#define ICSR_DTE 0x01
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#define ICIC_ALE 0x08
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#define ICIC_TACKE 0x04
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#define ICIC_WAITE 0x02
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#define ICIC_DTEE 0x01
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static void activate_ch(struct sh_mobile_i2c_data *pd)
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{
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unsigned long i2c_clk;
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u_int32_t num;
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u_int32_t denom;
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u_int32_t tmp;
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/* Wake up device and enable clock */
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pm_runtime_get_sync(pd->dev);
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clk_enable(pd->clk);
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/* Get clock rate after clock is enabled */
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i2c_clk = clk_get_rate(pd->clk);
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/* Calculate the value for iccl. From the data sheet:
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* iccl = (p clock / transfer rate) * (L / (L + H))
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* where L and H are the SCL low/high ratio (5/4 in this case).
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* We also round off the result.
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*/
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num = i2c_clk * 5;
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denom = NORMAL_SPEED * 9;
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tmp = num * 10 / denom;
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if (tmp % 10 >= 5)
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pd->iccl = (u_int8_t)((num/denom) + 1);
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else
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pd->iccl = (u_int8_t)(num/denom);
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/* Calculate the value for icch. From the data sheet:
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icch = (p clock / transfer rate) * (H / (L + H)) */
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num = i2c_clk * 4;
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tmp = num * 10 / denom;
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if (tmp % 10 >= 5)
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pd->icch = (u_int8_t)((num/denom) + 1);
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else
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pd->icch = (u_int8_t)(num/denom);
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/* Enable channel and configure rx ack */
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iowrite8(ioread8(ICCR(pd)) | ICCR_ICE, ICCR(pd));
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/* Mask all interrupts */
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iowrite8(0, ICIC(pd));
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/* Set the clock */
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iowrite8(pd->iccl, ICCL(pd));
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iowrite8(pd->icch, ICCH(pd));
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}
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static void deactivate_ch(struct sh_mobile_i2c_data *pd)
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{
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/* Clear/disable interrupts */
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iowrite8(0, ICSR(pd));
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iowrite8(0, ICIC(pd));
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/* Disable channel */
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iowrite8(ioread8(ICCR(pd)) & ~ICCR_ICE, ICCR(pd));
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/* Disable clock and mark device as idle */
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clk_disable(pd->clk);
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pm_runtime_put_sync(pd->dev);
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}
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static unsigned char i2c_op(struct sh_mobile_i2c_data *pd,
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enum sh_mobile_i2c_op op, unsigned char data)
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{
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unsigned char ret = 0;
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unsigned long flags;
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dev_dbg(pd->dev, "op %d, data in 0x%02x\n", op, data);
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spin_lock_irqsave(&pd->lock, flags);
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switch (op) {
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case OP_START: /* issue start and trigger DTE interrupt */
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iowrite8(0x94, ICCR(pd));
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break;
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case OP_TX_FIRST: /* disable DTE interrupt and write data */
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iowrite8(ICIC_WAITE | ICIC_ALE | ICIC_TACKE, ICIC(pd));
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iowrite8(data, ICDR(pd));
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break;
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case OP_TX: /* write data */
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iowrite8(data, ICDR(pd));
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break;
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case OP_TX_STOP: /* write data and issue a stop afterwards */
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iowrite8(data, ICDR(pd));
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iowrite8(0x90, ICCR(pd));
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break;
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case OP_TX_TO_RX: /* select read mode */
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iowrite8(0x81, ICCR(pd));
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break;
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case OP_RX: /* just read data */
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ret = ioread8(ICDR(pd));
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break;
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case OP_RX_STOP: /* enable DTE interrupt, issue stop */
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iowrite8(ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE,
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ICIC(pd));
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iowrite8(0xc0, ICCR(pd));
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break;
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case OP_RX_STOP_DATA: /* enable DTE interrupt, read data, issue stop */
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iowrite8(ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE,
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ICIC(pd));
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ret = ioread8(ICDR(pd));
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iowrite8(0xc0, ICCR(pd));
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break;
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}
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spin_unlock_irqrestore(&pd->lock, flags);
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dev_dbg(pd->dev, "op %d, data out 0x%02x\n", op, ret);
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return ret;
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}
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static int sh_mobile_i2c_is_first_byte(struct sh_mobile_i2c_data *pd)
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{
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if (pd->pos == -1)
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return 1;
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return 0;
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}
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static int sh_mobile_i2c_is_last_byte(struct sh_mobile_i2c_data *pd)
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{
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if (pd->pos == (pd->msg->len - 1))
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return 1;
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return 0;
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}
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static void sh_mobile_i2c_get_data(struct sh_mobile_i2c_data *pd,
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unsigned char *buf)
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{
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switch (pd->pos) {
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case -1:
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*buf = (pd->msg->addr & 0x7f) << 1;
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*buf |= (pd->msg->flags & I2C_M_RD) ? 1 : 0;
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break;
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default:
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*buf = pd->msg->buf[pd->pos];
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}
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}
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static int sh_mobile_i2c_isr_tx(struct sh_mobile_i2c_data *pd)
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{
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unsigned char data;
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if (pd->pos == pd->msg->len)
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return 1;
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sh_mobile_i2c_get_data(pd, &data);
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if (sh_mobile_i2c_is_last_byte(pd))
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i2c_op(pd, OP_TX_STOP, data);
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else if (sh_mobile_i2c_is_first_byte(pd))
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i2c_op(pd, OP_TX_FIRST, data);
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else
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i2c_op(pd, OP_TX, data);
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pd->pos++;
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return 0;
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}
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static int sh_mobile_i2c_isr_rx(struct sh_mobile_i2c_data *pd)
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{
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unsigned char data;
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int real_pos;
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do {
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if (pd->pos <= -1) {
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sh_mobile_i2c_get_data(pd, &data);
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if (sh_mobile_i2c_is_first_byte(pd))
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i2c_op(pd, OP_TX_FIRST, data);
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else
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i2c_op(pd, OP_TX, data);
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break;
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}
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if (pd->pos == 0) {
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i2c_op(pd, OP_TX_TO_RX, 0);
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break;
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}
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real_pos = pd->pos - 2;
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if (pd->pos == pd->msg->len) {
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if (real_pos < 0) {
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i2c_op(pd, OP_RX_STOP, 0);
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break;
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}
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data = i2c_op(pd, OP_RX_STOP_DATA, 0);
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} else
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data = i2c_op(pd, OP_RX, 0);
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if (real_pos >= 0)
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pd->msg->buf[real_pos] = data;
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} while (0);
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pd->pos++;
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return pd->pos == (pd->msg->len + 2);
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}
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static irqreturn_t sh_mobile_i2c_isr(int irq, void *dev_id)
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{
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struct platform_device *dev = dev_id;
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struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
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unsigned char sr;
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int wakeup;
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sr = ioread8(ICSR(pd));
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pd->sr |= sr; /* remember state */
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dev_dbg(pd->dev, "i2c_isr 0x%02x 0x%02x %s %d %d!\n", sr, pd->sr,
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(pd->msg->flags & I2C_M_RD) ? "read" : "write",
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pd->pos, pd->msg->len);
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if (sr & (ICSR_AL | ICSR_TACK)) {
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/* don't interrupt transaction - continue to issue stop */
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iowrite8(sr & ~(ICSR_AL | ICSR_TACK), ICSR(pd));
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wakeup = 0;
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} else if (pd->msg->flags & I2C_M_RD)
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wakeup = sh_mobile_i2c_isr_rx(pd);
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else
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wakeup = sh_mobile_i2c_isr_tx(pd);
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if (sr & ICSR_WAIT) /* TODO: add delay here to support slow acks */
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iowrite8(sr & ~ICSR_WAIT, ICSR(pd));
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if (wakeup) {
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pd->sr |= SW_DONE;
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wake_up(&pd->wait);
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}
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return IRQ_HANDLED;
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}
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static int start_ch(struct sh_mobile_i2c_data *pd, struct i2c_msg *usr_msg)
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{
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if (usr_msg->len == 0 && (usr_msg->flags & I2C_M_RD)) {
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dev_err(pd->dev, "Unsupported zero length i2c read\n");
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return -EIO;
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}
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/* Initialize channel registers */
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iowrite8(ioread8(ICCR(pd)) & ~ICCR_ICE, ICCR(pd));
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/* Enable channel and configure rx ack */
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iowrite8(ioread8(ICCR(pd)) | ICCR_ICE, ICCR(pd));
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/* Set the clock */
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iowrite8(pd->iccl, ICCL(pd));
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iowrite8(pd->icch, ICCH(pd));
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pd->msg = usr_msg;
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pd->pos = -1;
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pd->sr = 0;
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/* Enable all interrupts to begin with */
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iowrite8(ICIC_WAITE | ICIC_ALE | ICIC_TACKE | ICIC_DTEE, ICIC(pd));
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return 0;
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}
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static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter,
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struct i2c_msg *msgs,
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int num)
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{
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struct sh_mobile_i2c_data *pd = i2c_get_adapdata(adapter);
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struct i2c_msg *msg;
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int err = 0;
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u_int8_t val;
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int i, k, retry_count;
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activate_ch(pd);
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/* Process all messages */
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for (i = 0; i < num; i++) {
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msg = &msgs[i];
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err = start_ch(pd, msg);
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if (err)
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break;
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i2c_op(pd, OP_START, 0);
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/* The interrupt handler takes care of the rest... */
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k = wait_event_timeout(pd->wait,
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pd->sr & (ICSR_TACK | SW_DONE),
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5 * HZ);
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if (!k)
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dev_err(pd->dev, "Transfer request timed out\n");
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retry_count = 1000;
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again:
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val = ioread8(ICSR(pd));
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dev_dbg(pd->dev, "val 0x%02x pd->sr 0x%02x\n", val, pd->sr);
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/* the interrupt handler may wake us up before the
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* transfer is finished, so poll the hardware
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* until we're done.
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*/
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if (val & ICSR_BUSY) {
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udelay(10);
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if (retry_count--)
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goto again;
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err = -EIO;
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dev_err(pd->dev, "Polling timed out\n");
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break;
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}
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/* handle missing acknowledge and arbitration lost */
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if ((val | pd->sr) & (ICSR_TACK | ICSR_AL)) {
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err = -EIO;
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break;
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}
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}
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deactivate_ch(pd);
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if (!err)
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err = num;
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return err;
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}
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static u32 sh_mobile_i2c_func(struct i2c_adapter *adapter)
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{
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return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
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}
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static struct i2c_algorithm sh_mobile_i2c_algorithm = {
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.functionality = sh_mobile_i2c_func,
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.master_xfer = sh_mobile_i2c_xfer,
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};
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static int sh_mobile_i2c_hook_irqs(struct platform_device *dev, int hook)
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{
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struct resource *res;
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int ret = -ENXIO;
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int q, m;
|
|
int k = 0;
|
|
int n = 0;
|
|
|
|
while ((res = platform_get_resource(dev, IORESOURCE_IRQ, k))) {
|
|
for (n = res->start; hook && n <= res->end; n++) {
|
|
if (request_irq(n, sh_mobile_i2c_isr, IRQF_DISABLED,
|
|
dev_name(&dev->dev), dev))
|
|
goto rollback;
|
|
}
|
|
k++;
|
|
}
|
|
|
|
if (hook)
|
|
return k > 0 ? 0 : -ENOENT;
|
|
|
|
k--;
|
|
ret = 0;
|
|
|
|
rollback:
|
|
for (q = k; k >= 0; k--) {
|
|
for (m = n; m >= res->start; m--)
|
|
free_irq(m, dev);
|
|
|
|
res = platform_get_resource(dev, IORESOURCE_IRQ, k - 1);
|
|
m = res->end;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int sh_mobile_i2c_probe(struct platform_device *dev)
|
|
{
|
|
struct sh_mobile_i2c_data *pd;
|
|
struct i2c_adapter *adap;
|
|
struct resource *res;
|
|
char clk_name[8];
|
|
int size;
|
|
int ret;
|
|
|
|
pd = kzalloc(sizeof(struct sh_mobile_i2c_data), GFP_KERNEL);
|
|
if (pd == NULL) {
|
|
dev_err(&dev->dev, "cannot allocate private data\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
snprintf(clk_name, sizeof(clk_name), "i2c%d", dev->id);
|
|
pd->clk = clk_get(&dev->dev, clk_name);
|
|
if (IS_ERR(pd->clk)) {
|
|
dev_err(&dev->dev, "cannot get clock \"%s\"\n", clk_name);
|
|
ret = PTR_ERR(pd->clk);
|
|
goto err;
|
|
}
|
|
|
|
ret = sh_mobile_i2c_hook_irqs(dev, 1);
|
|
if (ret) {
|
|
dev_err(&dev->dev, "cannot request IRQ\n");
|
|
goto err_clk;
|
|
}
|
|
|
|
pd->dev = &dev->dev;
|
|
platform_set_drvdata(dev, pd);
|
|
|
|
res = platform_get_resource(dev, IORESOURCE_MEM, 0);
|
|
if (res == NULL) {
|
|
dev_err(&dev->dev, "cannot find IO resource\n");
|
|
ret = -ENOENT;
|
|
goto err_irq;
|
|
}
|
|
|
|
size = resource_size(res);
|
|
|
|
pd->reg = ioremap(res->start, size);
|
|
if (pd->reg == NULL) {
|
|
dev_err(&dev->dev, "cannot map IO\n");
|
|
ret = -ENXIO;
|
|
goto err_irq;
|
|
}
|
|
|
|
/* Enable Runtime PM for this device.
|
|
*
|
|
* Also tell the Runtime PM core to ignore children
|
|
* for this device since it is valid for us to suspend
|
|
* this I2C master driver even though the slave devices
|
|
* on the I2C bus may not be suspended.
|
|
*
|
|
* The state of the I2C hardware bus is unaffected by
|
|
* the Runtime PM state.
|
|
*/
|
|
pm_suspend_ignore_children(&dev->dev, true);
|
|
pm_runtime_enable(&dev->dev);
|
|
|
|
/* setup the private data */
|
|
adap = &pd->adap;
|
|
i2c_set_adapdata(adap, pd);
|
|
|
|
adap->owner = THIS_MODULE;
|
|
adap->algo = &sh_mobile_i2c_algorithm;
|
|
adap->dev.parent = &dev->dev;
|
|
adap->retries = 5;
|
|
adap->nr = dev->id;
|
|
|
|
strlcpy(adap->name, dev->name, sizeof(adap->name));
|
|
|
|
spin_lock_init(&pd->lock);
|
|
init_waitqueue_head(&pd->wait);
|
|
|
|
ret = i2c_add_numbered_adapter(adap);
|
|
if (ret < 0) {
|
|
dev_err(&dev->dev, "cannot add numbered adapter\n");
|
|
goto err_all;
|
|
}
|
|
|
|
return 0;
|
|
|
|
err_all:
|
|
iounmap(pd->reg);
|
|
err_irq:
|
|
sh_mobile_i2c_hook_irqs(dev, 0);
|
|
err_clk:
|
|
clk_put(pd->clk);
|
|
err:
|
|
kfree(pd);
|
|
return ret;
|
|
}
|
|
|
|
static int sh_mobile_i2c_remove(struct platform_device *dev)
|
|
{
|
|
struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
|
|
|
|
i2c_del_adapter(&pd->adap);
|
|
iounmap(pd->reg);
|
|
sh_mobile_i2c_hook_irqs(dev, 0);
|
|
clk_put(pd->clk);
|
|
pm_runtime_disable(&dev->dev);
|
|
kfree(pd);
|
|
return 0;
|
|
}
|
|
|
|
static int sh_mobile_i2c_runtime_nop(struct device *dev)
|
|
{
|
|
/* Runtime PM callback shared between ->runtime_suspend()
|
|
* and ->runtime_resume(). Simply returns success.
|
|
*
|
|
* This driver re-initializes all registers after
|
|
* pm_runtime_get_sync() anyway so there is no need
|
|
* to save and restore registers here.
|
|
*/
|
|
return 0;
|
|
}
|
|
|
|
static struct dev_pm_ops sh_mobile_i2c_dev_pm_ops = {
|
|
.runtime_suspend = sh_mobile_i2c_runtime_nop,
|
|
.runtime_resume = sh_mobile_i2c_runtime_nop,
|
|
};
|
|
|
|
static struct platform_driver sh_mobile_i2c_driver = {
|
|
.driver = {
|
|
.name = "i2c-sh_mobile",
|
|
.owner = THIS_MODULE,
|
|
.pm = &sh_mobile_i2c_dev_pm_ops,
|
|
},
|
|
.probe = sh_mobile_i2c_probe,
|
|
.remove = sh_mobile_i2c_remove,
|
|
};
|
|
|
|
static int __init sh_mobile_i2c_adap_init(void)
|
|
{
|
|
return platform_driver_register(&sh_mobile_i2c_driver);
|
|
}
|
|
|
|
static void __exit sh_mobile_i2c_adap_exit(void)
|
|
{
|
|
platform_driver_unregister(&sh_mobile_i2c_driver);
|
|
}
|
|
|
|
subsys_initcall(sh_mobile_i2c_adap_init);
|
|
module_exit(sh_mobile_i2c_adap_exit);
|
|
|
|
MODULE_DESCRIPTION("SuperH Mobile I2C Bus Controller driver");
|
|
MODULE_AUTHOR("Magnus Damm");
|
|
MODULE_LICENSE("GPL v2");
|