161 lines
		
	
	
		
			4.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			161 lines
		
	
	
		
			4.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| #ifndef _H8300_SYSTEM_H
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| #define _H8300_SYSTEM_H
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| 
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| #include <linux/linkage.h>
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| 
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| /*
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|  * switch_to(n) should switch tasks to task ptr, first checking that
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|  * ptr isn't the current task, in which case it does nothing.  This
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|  * also clears the TS-flag if the task we switched to has used the
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|  * math co-processor latest.
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|  */
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| /*
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|  * switch_to() saves the extra registers, that are not saved
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|  * automatically by SAVE_SWITCH_STACK in resume(), ie. d0-d5 and
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|  * a0-a1. Some of these are used by schedule() and its predecessors
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|  * and so we might get see unexpected behaviors when a task returns
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|  * with unexpected register values.
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|  *
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|  * syscall stores these registers itself and none of them are used
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|  * by syscall after the function in the syscall has been called.
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|  *
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|  * Beware that resume now expects *next to be in d1 and the offset of
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|  * tss to be in a1. This saves a few instructions as we no longer have
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|  * to push them onto the stack and read them back right after.
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|  *
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|  * 02/17/96 - Jes Sorensen (jds@kom.auc.dk)
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|  *
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|  * Changed 96/09/19 by Andreas Schwab
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|  * pass prev in a0, next in a1, offset of tss in d1, and whether
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|  * the mm structures are shared in d2 (to avoid atc flushing).
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|  *
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|  * H8/300 Porting 2002/09/04 Yoshinori Sato
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|  */
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| 
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| asmlinkage void resume(void);
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| #define switch_to(prev,next,last) {                         \
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|   void *_last;						    \
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|   __asm__ __volatile__(					    \
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|   			"mov.l	%1, er0\n\t"		    \
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| 			"mov.l	%2, er1\n\t"		    \
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|                         "mov.l  %3, er2\n\t"                \
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| 			"jsr @_resume\n\t"                  \
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|                         "mov.l  er2,%0\n\t"                 \
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| 		       : "=r" (_last)			    \
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| 		       : "r" (&(prev->thread)),		    \
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| 			 "r" (&(next->thread)),		    \
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|                          "g" (prev)                         \
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| 		       : "cc", "er0", "er1", "er2", "er3"); \
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|   (last) = _last; 					    \
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| }
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| 
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| #define __sti() asm volatile ("andc #0x7f,ccr")
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| #define __cli() asm volatile ("orc  #0x80,ccr")
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| 
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| #define __save_flags(x) \
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|        asm volatile ("stc ccr,%w0":"=r" (x))
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| 
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| #define __restore_flags(x) \
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|        asm volatile ("ldc %w0,ccr": :"r" (x))
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| 
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| #define	irqs_disabled()			\
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| ({					\
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| 	unsigned char flags;		\
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| 	__save_flags(flags);	        \
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| 	((flags & 0x80) == 0x80);	\
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| })
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| 
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| #define iret() __asm__ __volatile__ ("rte": : :"memory", "sp", "cc")
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| 
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| /* For spinlocks etc */
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| #define local_irq_disable()	__cli()
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| #define local_irq_enable()      __sti()
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| #define local_irq_save(x)	({ __save_flags(x); local_irq_disable(); })
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| #define local_irq_restore(x)	__restore_flags(x)
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| #define local_save_flags(x)     __save_flags(x)
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| 
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| /*
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|  * Force strict CPU ordering.
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|  * Not really required on H8...
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|  */
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| #define nop()  asm volatile ("nop"::)
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| #define mb()   asm volatile (""   : : :"memory")
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| #define rmb()  asm volatile (""   : : :"memory")
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| #define wmb()  asm volatile (""   : : :"memory")
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| #define set_mb(var, value) do { xchg(&var, value); } while (0)
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| 
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| #ifdef CONFIG_SMP
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| #define smp_mb()	mb()
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| #define smp_rmb()	rmb()
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| #define smp_wmb()	wmb()
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| #define smp_read_barrier_depends()	read_barrier_depends()
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| #else
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| #define smp_mb()	barrier()
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| #define smp_rmb()	barrier()
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| #define smp_wmb()	barrier()
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| #define smp_read_barrier_depends()	do { } while(0)
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| #endif
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| 
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| #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
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| 
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| struct __xchg_dummy { unsigned long a[100]; };
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| #define __xg(x) ((volatile struct __xchg_dummy *)(x))
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| 
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| static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
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| {
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|   unsigned long tmp, flags;
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| 
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|   local_irq_save(flags);
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| 
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|   switch (size) {
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|   case 1:
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|     __asm__ __volatile__
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|     ("mov.b %2,%0\n\t"
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|      "mov.b %1,%2"
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|     : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
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|     break;
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|   case 2:
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|     __asm__ __volatile__
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|     ("mov.w %2,%0\n\t"
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|      "mov.w %1,%2"
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|     : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
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|     break;
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|   case 4:
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|     __asm__ __volatile__
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|     ("mov.l %2,%0\n\t"
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|      "mov.l %1,%2"
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|     : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
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|     break;
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|   default:
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|     tmp = 0;	  
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|   }
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|   local_irq_restore(flags);
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|   return tmp;
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| }
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| 
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| #define HARD_RESET_NOW() ({		\
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|         local_irq_disable();		\
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|         asm("jmp @@0");			\
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| })
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| 
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| #include <asm-generic/cmpxchg-local.h>
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| 
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| /*
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|  * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
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|  * them available.
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|  */
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| #define cmpxchg_local(ptr, o, n)				  	       \
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| 	((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
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| 			(unsigned long)(n), sizeof(*(ptr))))
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| #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
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| 
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| #ifndef CONFIG_SMP
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| #include <asm-generic/cmpxchg.h>
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| #endif
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| 
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| #define arch_align_stack(x) (x)
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| 
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| void die(char *str, struct pt_regs *fp, unsigned long err);
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| 
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| #endif /* _H8300_SYSTEM_H */
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