167 lines
5.1 KiB
C
167 lines
5.1 KiB
C
/*
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* This is part of the Sequans SQN1130 driver.
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* Copyright 2008 SEQUANS Communications
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* Written by Andy Shevchenko <andy@smile.org.ua>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*/
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#ifndef _SQN_SDIO_H
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#define _SQN_SDIO_H
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#include "version.h"
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#include <linux/skbuff.h>
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#include <linux/mutex.h>
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#include <linux/wakelock.h>
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#include <linux/timer.h>
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enum sqn_card_version {
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SQN_1130 = 1
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, SQN_1210
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};
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/* Card private information */
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struct sqn_sdio_card {
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struct sqn_private *priv;
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struct sdio_func *func;
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u8 rstn_wr_fifo_flag;
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u8 version;
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struct sk_buff_head tx_queue;
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struct mutex tx_mutex;
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#define TX_QUEUE_MAX_LEN 1000 /* max length to which tx_queue is allowed to grow */
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#define TX_QUEUE_WM_LEN 800 /* length, from which we will continue transmission */
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struct sk_buff_head rx_queue;
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#define RX_QUEUE_MAX_LEN 1000 /* max length to which rx_queue is allowed to grow */
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#define RX_QUEUE_WM_LEN 800 /* length, from which we will continue transmission */
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struct mutex rx_mutex;
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struct mutex rxq_mutex;
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wait_queue_head_t pm_waitq;
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struct wake_lock wakelock;
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struct timer_list wakelock_timer;
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/* Condition flags for event signaling */
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u8 pm_complete;
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u8 it_thread_should_stop;
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u8 is_card_sleeps;
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u8 waiting_pm_notification;
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};
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void sqn_sdio_stop_it_thread_from_itself(struct sqn_private *priv);
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struct sk_buff* sqn_sdio_prepare_skb_for_tx(struct sk_buff *skb);
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int sqn_sdio_tx_skb(struct sqn_sdio_card *card, struct sk_buff *skb
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, u8 claim_host);
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#define SQN_SDIO_PDU_MINLEN 2
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#define SQN_SDIO_PDU_MAXLEN 2047
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/* Product IDs */
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#define SDIO_CMN_CISTPLMID_MANF 0x1002 /* Sequans manufacture ID register */
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#define SDIO_CMN_CISTPLMID_CARD 0x1004 /* Sequans SQN1130 card ID register */
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#define SDIO_VENDOR_ID_SEQUANS 0x039d /* Sequans manufacture ID */
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#define SDIO_DEVICE_ID_SEQUANS_SQN1130 0x046a /* Sequans SQN1130 card ID */
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#define SDIO_DEVICE_ID_SEQUANS_SQN1210 0x1210 /* Sequans SQN1210-rev2 card ID */
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#define SDIO_CCCR_CCCR_SDIO_VERSION 0x00
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#define SDIO_CCCR_IO_ABORT 0x06
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#define SQN_H_VERSION 0x240C
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/* FIFO dependent list */
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#define SQN_SDIO_RDWR_BASE 0x2000
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#define SQN_SDIO_RDWR_FIFO(x) (SQN_SDIO_RDWR_BASE + (x)*4)
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#define SQN_SDIO_RDLEN_BASE 0x2002
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#define SQN_SDIO_RDLEN_FIFO(x) (SQN_SDIO_RDLEN_BASE + (x)*4)
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#define SQN_SDIO_PCRRT_BASE 0x2010
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#define SQN_SDIO_PCRRT_FIFO(x) (SQN_SDIO_PCRRT_BASE + (x)*2)
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#define SQN_SDIO_PCWRT_BASE 0x2011
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#define SQN_SDIO_PCWRT_FIFO(x) (SQN_SDIO_PCWRT_BASE + (x)*2)
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#define SQN_SDIO_SZ_RD_BASE 0x2018
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#define SQN_SDIO_SZ_RD_FIFO(x) (SQN_SDIO_SZ_RD_BASE + (x)*8)
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#define SQN_SDIO_WM_RD_BASE 0x201a
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#define SQN_SDIO_WM_RD_FIFO(x) (SQN_SDIO_WM_RD_BASE + (x)*8)
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#define SQN_SDIO_SZ_WR_BASE 0x201c
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#define SQN_SDIO_SZ_WR_FIFO(x) (SQN_SDIO_SZ_WR_BASE + (x)*8)
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#define SQN_SDIO_WM_WR_BASE 0x201e
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#define SQN_SDIO_WM_WR_FIFO(x) (SQN_SDIO_WM_WR_BASE + (x)*8)
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#define SQN_SDIO_ESZ_WR_FIFO0 0x2032 /* FIFO0 */
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#define SQN_SDIO_ESZ_WR_FIFO1 0x2036 /* FIFO1 */
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#define SQN_SDIO_ESZ_WR_FIFO2 0x0000 /* No real FIFO */
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#define SQN_SDIO_RSTN_RD_BASE 0x2038
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#define SQN_SDIO_RSTN_RD_FIFO(x) (SQN_SDIO_RSTN_RD_BASE + (x)*2)
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#define SQN_SDIO_RSTN_WR_BASE 0x2039
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#define SQN_SDIO_RSTN_WR_FIFO(x) (SQN_SDIO_RSTN_WR_BASE + (x)*2)
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#define SQN_SDIO_RD_LEVEL_BASE 0x2048
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#define SQN_SDIO_RD_FIFO_LEVEL(x) (SQN_SDIO_RD_LEVEL_BASE + (x)*4)
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#define SQN_SDIO_WR_LEVEL_BASE 0x204a
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#define SQN_SDIO_WR_FIFO_LEVEL(x) (SQN_SDIO_WR_LEVEL_BASE + (x)*4)
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#define SQN_SDIO_RD_BYTESLEFT_BASE 0x2054
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#define SQN_SDIO_RD_FIFO_BYTESLEFT(x) (SQN_SDIO_RD_BYTESLEFT_BASE + (x)*4)
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#define SQN_SDIO_WR_BYTESLEFT_BASE 0x2056
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#define SQN_SDIO_WR_FIFO_BYTESLEFT(x) (SQN_SDIO_WR_BYTESLEFT_BASE + (x)*4)
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/* Interrupt registers */
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#define SQN_SDIO_IT_EN_LSBS 0x2044
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#define SQN_SDIO_IT_EN_MSBS 0x2045
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#define SQN_SDIO_IT_STATUS_LSBS 0x2046
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#define SQN_SDIO_IT_STATUS_MSBS 0x2047
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/* Firmware loading registers */
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#define SQN_H_CRSTN 0x2404
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#define SQN_H_SDRAMCTL_RSTN 0x2414
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#define SQN_H_SDRAM_NO_EMR 0x2415
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#define SQN_H_BOOT_FROM_SPI 0x2411
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/* Interrupt flags (LSB) */
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#define SQN_SDIO_IT_WR_FIFO0_WM (1 << 0)
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#define SQN_SDIO_IT_RD_FIFO0_WM (1 << 1)
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#define SQN_SDIO_IT_WR_FIFO1_WM (1 << 2)
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#define SQN_SDIO_IT_RD_FIFO1_WM (1 << 3)
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#define SQN_SDIO_IT_WR_FIFO2_WM (1 << 4)
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#define SQN_SDIO_IT_RD_FIFO2_WM (1 << 5)
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#define SQN_SDIO_IT_RD_EMPTY_WR_FULL (1 << 6)
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#define SQN_SDIO_IT_SW_SIGN (1 << 7)
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/* Interrupt flags (MSB) */
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#define SQN_SDIO_IT_WR_FIFO0_FULL_RST (1 << 0)
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#define SQN_SDIO_IT_RD_FIFO0_EMPTY_RST (1 << 1)
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#define SQN_SDIO_IT_WR_FIFO1_FULL_RST (1 << 2)
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#define SQN_SDIO_IT_RD_FIFO1_EMPTY_RST (1 << 3)
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#define SQN_SDIO_IT_WR_FIFO2_FULL_RST (1 << 4)
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#define SQN_SDIO_IT_RD_FIFO2_EMPTY_RST (1 << 5)
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#define SQN_SDIO_IT_RD_BEFORE_RDLEN (1 << 6)
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#define SQN_SDIO_IT_UNSUPPORTED_CMD (1 << 7)
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/* Software signaling interrupts */
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#define SQN_SOC_SIGS_LSBS 0x2600
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#define SQN_HTS_SIGS 0x2608
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#endif /* _SQN_SDIO_H */
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