72 lines
		
	
	
		
			3.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			72 lines
		
	
	
		
			3.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* drivers/mtd/devices/msm_nand.h
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|  *
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|  * Copyright (C) 2007 Google, Inc.
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|  *
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|  * This software is licensed under the terms of the GNU General Public
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|  * License version 2, as published by the Free Software Foundation, and
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|  * may be copied, distributed, and modified under those terms.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  */
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| 
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| #ifndef __DRIVERS_MTD_DEVICES_MSM_NAND_H
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| #define __DRIVERS_MTD_DEVICES_MSM_NAND_H
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| 
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| #include <mach/msm_iomap.h>
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| 
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| #define MSM_NAND_REG(off) (MSM_NAND_BASE + (off))
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| 
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| #define MSM_NAND_FLASH_CMD            MSM_NAND_REG(0x0000)
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| #define MSM_NAND_ADDR0                MSM_NAND_REG(0x0004)
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| #define MSM_NAND_ADDR1                MSM_NAND_REG(0x0008)
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| #define MSM_NAND_FLASH_CHIP_SELECT    MSM_NAND_REG(0x000C)
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| #define MSM_NAND_EXEC_CMD             MSM_NAND_REG(0x0010)
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| #define MSM_NAND_FLASH_STATUS         MSM_NAND_REG(0x0014)
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| #define MSM_NAND_BUFFER_STATUS        MSM_NAND_REG(0x0018)
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| #define MSM_NAND_DEV0_CFG0            MSM_NAND_REG(0x0020)
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| #define MSM_NAND_DEV0_CFG1            MSM_NAND_REG(0x0024)
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| #define MSM_NAND_DEV1_CFG0            MSM_NAND_REG(0x0030)
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| #define MSM_NAND_DEV1_CFG1            MSM_NAND_REG(0x0034)
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| #define MSM_NAND_READ_ID              MSM_NAND_REG(0x0040)
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| #define MSM_NAND_READ_STATUS          MSM_NAND_REG(0x0044)
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| #define MSM_NAND_CONFIG_DATA          MSM_NAND_REG(0x0050)
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| #define MSM_NAND_CONFIG               MSM_NAND_REG(0x0054)
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| #define MSM_NAND_CONFIG_MODE          MSM_NAND_REG(0x0058)
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| #define MSM_NAND_CONFIG_STATUS        MSM_NAND_REG(0x0060)
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| #define MSM_NAND_MACRO1_REG           MSM_NAND_REG(0x0064)
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| #define MSM_NAND_XFR_STEP1            MSM_NAND_REG(0x0070)
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| #define MSM_NAND_XFR_STEP2            MSM_NAND_REG(0x0074)
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| #define MSM_NAND_XFR_STEP3            MSM_NAND_REG(0x0078)
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| #define MSM_NAND_XFR_STEP4            MSM_NAND_REG(0x007C)
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| #define MSM_NAND_XFR_STEP5            MSM_NAND_REG(0x0080)
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| #define MSM_NAND_XFR_STEP6            MSM_NAND_REG(0x0084)
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| #define MSM_NAND_XFR_STEP7            MSM_NAND_REG(0x0088)
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| #define MSM_NAND_DEV_CMD0             MSM_NAND_REG(0x00A0)
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| #define MSM_NAND_DEV_CMD1             MSM_NAND_REG(0x00A4)
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| #define MSM_NAND_DEV_CMD2             MSM_NAND_REG(0x00A8)
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| #define MSM_NAND_DEV_CMD_VLD          MSM_NAND_REG(0x00AC)
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| #define MSM_NAND_EBI2_MISR_SIG_REG    MSM_NAND_REG(0x00B0)
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| #define MSM_NAND_EBI2_ECC_BUF_CFG     MSM_NAND_REG(0x00F0)
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| #define MSM_NAND_FLASH_BUFFER         MSM_NAND_REG(0x0100)
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| 
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| /* device commands */
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| 
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| #define MSM_NAND_CMD_SOFT_RESET         0x01
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| #define MSM_NAND_CMD_PAGE_READ          0x32
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| #define MSM_NAND_CMD_PAGE_READ_ECC      0x33
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| #define MSM_NAND_CMD_PAGE_READ_ALL      0x34
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| #define MSM_NAND_CMD_SEQ_PAGE_READ      0x15
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| #define MSM_NAND_CMD_PRG_PAGE           0x36
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| #define MSM_NAND_CMD_PRG_PAGE_ECC       0x37
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| #define MSM_NAND_CMD_PRG_PAGE_ALL       0x39
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| #define MSM_NAND_CMD_BLOCK_ERASE        0x3A
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| #define MSM_NAND_CMD_FETCH_ID           0x0B
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| #define MSM_NAND_CMD_STATUS             0x0C
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| #define MSM_NAND_CMD_RESET              0x0D
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| 
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| #endif
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