292 lines
		
	
	
		
			7.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			292 lines
		
	
	
		
			7.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright 2004-2009 Analog Devices Inc.
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|  *                2007 David Rowe
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|  *                2006 Intratrade Ltd.
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|  *                     Ivan Danov <idanov@gmail.com>
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|  *                2005 National ICT Australia (NICTA)
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|  *                     Aidan Williams <aidan@nicta.com.au>
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|  *
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|  * Licensed under the GPL-2 or later.
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|  */
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| 
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| #include <linux/device.h>
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| #include <linux/platform_device.h>
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| #include <linux/mtd/mtd.h>
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| #include <linux/mtd/partitions.h>
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| #include <linux/spi/spi.h>
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| #include <linux/spi/flash.h>
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| #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
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| #include <linux/usb/isp1362.h>
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| #endif
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| #include <asm/irq.h>
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| #include <asm/bfin5xx_spi.h>
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| 
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| /*
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|  * Name the Board for the /proc/cpuinfo
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|  */
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| const char bfin_board_name[] = "IP04/IP08";
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| 
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| /*
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|  *  Driver needs to know address, irq and flag pin.
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|  */
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| #if defined(CONFIG_BFIN532_IP0X)
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| #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
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| 
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| #include <linux/dm9000.h>
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| 
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| static struct resource dm9000_resource1[] = {
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| 	{
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| 		.start = 0x20100000,
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| 		.end   = 0x20100000 + 1,
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| 		.flags = IORESOURCE_MEM
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| 	},{
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| 		.start = 0x20100000 + 2,
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| 		.end   = 0x20100000 + 3,
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| 		.flags = IORESOURCE_MEM
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| 	},{
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| 		.start = IRQ_PF15,
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| 		.end   = IRQ_PF15,
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| 		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
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| 	}
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| };
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| 
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| static struct resource dm9000_resource2[] = {
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| 	{
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| 		.start = 0x20200000,
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| 		.end   = 0x20200000 + 1,
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| 		.flags = IORESOURCE_MEM
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| 	},{
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| 		.start = 0x20200000 + 2,
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| 		.end   = 0x20200000 + 3,
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| 		.flags = IORESOURCE_MEM
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| 	},{
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| 		.start = IRQ_PF14,
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| 		.end   = IRQ_PF14,
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| 		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
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| 	}
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| };
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| 
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| /*
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| * for the moment we limit ourselves to 16bit IO until some
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| * better IO routines can be written and tested
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| */
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| static struct dm9000_plat_data dm9000_platdata1 = {
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| 	.flags          = DM9000_PLATF_16BITONLY,
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| };
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| 
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| static struct platform_device dm9000_device1 = {
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| 	.name           = "dm9000",
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| 	.id             = 0,
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| 	.num_resources  = ARRAY_SIZE(dm9000_resource1),
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| 	.resource       = dm9000_resource1,
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| 	.dev            = {
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| 		.platform_data = &dm9000_platdata1,
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| 	}
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| };
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| 
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| static struct dm9000_plat_data dm9000_platdata2 = {
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| 	.flags          = DM9000_PLATF_16BITONLY,
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| };
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| 
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| static struct platform_device dm9000_device2 = {
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| 	.name           = "dm9000",
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| 	.id             = 1,
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| 	.num_resources  = ARRAY_SIZE(dm9000_resource2),
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| 	.resource       = dm9000_resource2,
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| 	.dev            = {
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| 		.platform_data = &dm9000_platdata2,
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| 	}
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| };
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| 
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| #endif
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| #endif
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| 
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| 
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| #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
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| /* all SPI peripherals info goes here */
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| 
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| #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
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| static struct bfin5xx_spi_chip mmc_spi_chip_info = {
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| /*
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|  * CPOL (Clock Polarity)
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|  *  0 - Active high SCK
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|  *  1 - Active low SCK
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|  *  CPHA (Clock Phase) Selects transfer format and operation mode
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|  *  0 - SCLK toggles from middle of the first data bit, slave select
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|  *      pins controlled by hardware.
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|  *  1 - SCLK toggles from beginning of first data bit, slave select
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|  *      pins controller by user software.
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|  * 	.ctl_reg = 0x1c00,		 *  CPOL=1,CPHA=1,Sandisk 1G work
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|  * NO NO	.ctl_reg = 0x1800,		 *  CPOL=1,CPHA=0
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|  * NO NO	.ctl_reg = 0x1400,		 *  CPOL=0,CPHA=1
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|  */
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| 	.ctl_reg = 0x1000,		/* CPOL=0,CPHA=0,Sandisk 1G work */
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| 	.enable_dma = 0,		/* if 1 - block!!! */
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| 	.bits_per_word = 8,
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| };
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| #endif
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| 
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| /* Notice: for blackfin, the speed_hz is the value of register
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|  * SPI_BAUD, not the real baudrate */
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| static struct spi_board_info bfin_spi_board_info[] __initdata = {
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| #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
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| 	{
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| 		.modalias = "mmc_spi",
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| 		.max_speed_hz = 2,
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| 		.bus_num = 1,
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| 		.chip_select = 5,
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| 		.controller_data = &mmc_spi_chip_info,
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| 	},
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| #endif
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| };
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| 
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| /* SPI controller data */
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| static struct bfin5xx_spi_master spi_bfin_master_info = {
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| 	.num_chipselect = 8,
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| 	.enable_dma = 1,  /* master has the ability to do dma transfer */
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| };
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| 
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| static struct platform_device spi_bfin_master_device = {
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| 	.name = "bfin-spi-master",
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| 	.id = 1, /* Bus number */
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| 	.dev = {
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| 		.platform_data = &spi_bfin_master_info, /* Passed to driver */
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| 	},
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| };
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| #endif  /* spi master and devices */
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| 
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| #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
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| static struct resource bfin_uart_resources[] = {
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| 	{
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| 		.start = 0xFFC00400,
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| 		.end = 0xFFC004FF,
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| 		.flags = IORESOURCE_MEM,
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| 	},
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| };
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| 
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| static struct platform_device bfin_uart_device = {
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| 	.name = "bfin-uart",
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| 	.id = 1,
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| 	.num_resources = ARRAY_SIZE(bfin_uart_resources),
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| 	.resource = bfin_uart_resources,
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| };
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| #endif
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| 
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| #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
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| #ifdef CONFIG_BFIN_SIR0
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| static struct resource bfin_sir0_resources[] = {
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| 	{
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| 		.start = 0xFFC00400,
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| 		.end = 0xFFC004FF,
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| 		.flags = IORESOURCE_MEM,
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| 	},
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| 	{
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| 		.start = IRQ_UART0_RX,
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| 		.end = IRQ_UART0_RX+1,
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| 		.flags = IORESOURCE_IRQ,
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| 	},
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| 	{
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| 		.start = CH_UART0_RX,
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| 		.end = CH_UART0_RX+1,
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| 		.flags = IORESOURCE_DMA,
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| 	},
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| };
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| 
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| static struct platform_device bfin_sir0_device = {
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| 	.name = "bfin_sir",
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| 	.id = 0,
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| 	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
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| 	.resource = bfin_sir0_resources,
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| };
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| #endif
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| #endif
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| 
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| #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
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| static struct resource isp1362_hcd_resources[] = {
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| 	{
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| 		.start = 0x20300000,
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| 		.end   = 0x20300000 + 1,
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| 		.flags = IORESOURCE_MEM,
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| 	},{
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| 		.start = 0x20300000 + 2,
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| 		.end   = 0x20300000 + 3,
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| 		.flags = IORESOURCE_MEM,
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| 	},{
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| 		.start = IRQ_PF11,
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| 		.end   = IRQ_PF11,
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| 		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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| 	},
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| };
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| 
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| static struct isp1362_platform_data isp1362_priv = {
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| 	.sel15Kres = 1,
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| 	.clknotstop = 0,
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| 	.oc_enable = 0,		/* external OC */
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| 	.int_act_high = 0,
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| 	.int_edge_triggered = 0,
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| 	.remote_wakeup_connected = 0,
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| 	.no_power_switching = 1,
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| 	.power_switching_mode = 0,
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| };
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| 
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| static struct platform_device isp1362_hcd_device = {
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| 	.name = "isp1362-hcd",
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| 	.id = 0,
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| 	.dev = {
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| 		.platform_data = &isp1362_priv,
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| 	},
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| 	.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
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| 	.resource = isp1362_hcd_resources,
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| };
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| #endif
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| 
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| 
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| static struct platform_device *ip0x_devices[] __initdata = {
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| #if defined(CONFIG_BFIN532_IP0X)
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| #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
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| 	&dm9000_device1,
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| 	&dm9000_device2,
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| #endif
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| #endif
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| 
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| #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
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| 	&spi_bfin_master_device,
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| #endif
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| 
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| #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
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| 	&bfin_uart_device,
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| #endif
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| 
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| #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
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| #ifdef CONFIG_BFIN_SIR0
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| 	&bfin_sir0_device,
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| #endif
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| #endif
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| 
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| #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
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| 	&isp1362_hcd_device,
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| #endif
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| };
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| 
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| static int __init ip0x_init(void)
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| {
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| 	int i;
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| 
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| 	printk(KERN_INFO "%s(): registering device resources\n", __func__);
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| 	platform_add_devices(ip0x_devices, ARRAY_SIZE(ip0x_devices));
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| 
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| #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
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| 	for (i = 0; i < ARRAY_SIZE(bfin_spi_board_info); ++i) {
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| 		int j = 1 << bfin_spi_board_info[i].chip_select;
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| 		/* set spi cs to 1 */
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| 		bfin_write_FIO_DIR(bfin_read_FIO_DIR() | j);
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| 		bfin_write_FIO_FLAG_S(j);
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| 	}
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| 	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
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| #endif
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| 
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| 	return 0;
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| }
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| 
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| arch_initcall(ip0x_init);
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