154 lines
		
	
	
		
			4.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			154 lines
		
	
	
		
			4.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Trantor T128/T128F/T228 defines
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 *	Note : architecturally, the T100 and T128 are different and won't work
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 *
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 * Copyright 1993, Drew Eckhardt
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 *	Visionary Computing
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 *	(Unix and Linux consulting and custom programming)
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 *	drew@colorado.edu
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 *      +1 (303) 440-4894
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 *
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 * DISTRIBUTION RELEASE 3.
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 *
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 * For more information, please consult
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 *
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 * Trantor Systems, Ltd.
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 * T128/T128F/T228 SCSI Host Adapter
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 * Hardware Specifications
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 *
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 * Trantor Systems, Ltd.
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 * 5415 Randall Place
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 * Fremont, CA 94538
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 * 1+ (415) 770-1400, FAX 1+ (415) 770-9910
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 *
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 * and
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 *
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 * NCR 5380 Family
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 * SCSI Protocol Controller
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 * Databook
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 *
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 * NCR Microelectronics
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 * 1635 Aeroplaza Drive
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 * Colorado Springs, CO 80916
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 * 1+ (719) 578-3400
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 * 1+ (800) 334-5454
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 */
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/*
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 * $Log: t128.h,v $
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 */
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#ifndef T128_H
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#define T128_H
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#define T128_PUBLIC_RELEASE 3
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#define TDEBUG		0
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#define TDEBUG_INIT	0x1
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#define TDEBUG_TRANSFER 0x2
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/*
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 * The trantor boards are memory mapped. They use an NCR5380 or
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 * equivalent (my sample board had part second sourced from ZILOG).
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 * NCR's recommended "Pseudo-DMA" architecture is used, where
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 * a PAL drives the DMA signals on the 5380 allowing fast, blind
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 * transfers with proper handshaking.
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 */
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/*
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 * Note : a boot switch is provided for the purpose of informing the
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 * firmware to boot or not boot from attached SCSI devices.  So, I imagine
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 * there are fewer people who've yanked the ROM like they do on the Seagate
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 * to make bootup faster, and I'll probably use this for autodetection.
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 */
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#define T_ROM_OFFSET		0
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/*
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 * Note : my sample board *WAS NOT* populated with the SRAM, so this
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 * can't be used for autodetection without a ROM present.
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 */
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#define T_RAM_OFFSET		0x1800
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/*
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 * All of the registers are allocated 32 bytes of address space, except
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 * for the data register (read/write to/from the 5380 in pseudo-DMA mode)
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 */ 
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#define T_CONTROL_REG_OFFSET	0x1c00	/* rw */
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#define T_CR_INT		0x10	/* Enable interrupts */
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#define T_CR_CT			0x02	/* Reset watchdog timer */
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#define T_STATUS_REG_OFFSET	0x1c20	/* ro */
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#define T_ST_BOOT		0x80	/* Boot switch */
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#define T_ST_S3			0x40	/* User settable switches, */
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#define T_ST_S2			0x20	/* read 0 when switch is on, 1 off */
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#define T_ST_S1			0x10
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#define T_ST_PS2		0x08	/* Set for Microchannel 228 */
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#define T_ST_RDY		0x04	/* 5380 DRQ */
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#define T_ST_TIM		0x02	/* indicates 40us watchdog timer fired */
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#define T_ST_ZERO		0x01	/* Always zero */
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#define T_5380_OFFSET		0x1d00	/* 8 registers here, see NCR5380.h */
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#define T_DATA_REG_OFFSET	0x1e00	/* rw 512 bytes long */
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#ifndef ASM
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static int t128_abort(struct scsi_cmnd *);
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static int t128_biosparam(struct scsi_device *, struct block_device *,
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			  sector_t, int*);
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static int t128_detect(struct scsi_host_template *);
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static int t128_queue_command(struct scsi_cmnd *,
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			      void (*done)(struct scsi_cmnd *));
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static int t128_bus_reset(struct scsi_cmnd *);
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#ifndef CMD_PER_LUN
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#define CMD_PER_LUN 2
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#endif
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#ifndef CAN_QUEUE
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#define CAN_QUEUE 32
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#endif
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#ifndef HOSTS_C
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#define NCR5380_implementation_fields \
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    void __iomem *base
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#define NCR5380_local_declare() \
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    void __iomem *base
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#define NCR5380_setup(instance) \
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    base = ((struct NCR5380_hostdata *)(instance->hostdata))->base
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#define T128_address(reg) (base + T_5380_OFFSET + ((reg) * 0x20))
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#if !(TDEBUG & TDEBUG_TRANSFER)
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#define NCR5380_read(reg) readb(T128_address(reg))
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#define NCR5380_write(reg, value) writeb((value),(T128_address(reg)))
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#else
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#define NCR5380_read(reg)						\
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    (((unsigned char) printk("scsi%d : read register %d at address %08x\n"\
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    , instance->hostno, (reg), T128_address(reg))), readb(T128_address(reg)))
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#define NCR5380_write(reg, value) {					\
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    printk("scsi%d : write %02x to register %d at address %08x\n",	\
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	    instance->hostno, (value), (reg), T128_address(reg));	\
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    writeb((value), (T128_address(reg)));				\
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}
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#endif
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#define NCR5380_intr t128_intr
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#define do_NCR5380_intr do_t128_intr
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#define NCR5380_queue_command t128_queue_command
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#define NCR5380_abort t128_abort
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#define NCR5380_bus_reset t128_bus_reset
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#define NCR5380_proc_info t128_proc_info
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/* 15 14 12 10 7 5 3
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   1101 0100 1010 1000 */
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#define T128_IRQS 0xc4a8
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#endif /* else def HOSTS_C */
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#endif /* ndef ASM */
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#endif /* T128_H */
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