91 lines
		
	
	
		
			2.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			91 lines
		
	
	
		
			2.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Static Memory Controller
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|  */
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| 
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| #include <linux/module.h>
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| #include <linux/kernel.h>
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| #include <linux/init.h>
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| #include <linux/io.h>
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| #include <linux/sysdev.h>
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| 
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| #include <mach/hardware.h>
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| 
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| #define SMEMC_PHYS_BASE	(0x4A000000)
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| #define SMEMC_PHYS_SIZE	(0x90)
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| 
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| #define MSC0		(0x08)	/* Static Memory Controller Register 0 */
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| #define MSC1		(0x0C)	/* Static Memory Controller Register 1 */
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| #define SXCNFG		(0x1C)	/* Synchronous Static Memory Control Register */
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| #define MEMCLKCFG	(0x68)	/* Clock Configuration */
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| #define CSADRCFG0	(0x80)	/* Address Configuration Register for CS0 */
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| #define CSADRCFG1	(0x84)	/* Address Configuration Register for CS1 */
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| #define CSADRCFG2	(0x88)	/* Address Configuration Register for CS2 */
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| #define CSADRCFG3	(0x8C)	/* Address Configuration Register for CS3 */
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| 
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| #ifdef CONFIG_PM
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| static void __iomem *smemc_mmio_base;
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| 
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| static unsigned long msc[2];
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| static unsigned long sxcnfg, memclkcfg;
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| static unsigned long csadrcfg[4];
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| 
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| static int pxa3xx_smemc_suspend(struct sys_device *dev, pm_message_t state)
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| {
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| 	msc[0] = __raw_readl(smemc_mmio_base + MSC0);
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| 	msc[1] = __raw_readl(smemc_mmio_base + MSC1);
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| 	sxcnfg = __raw_readl(smemc_mmio_base + SXCNFG);
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| 	memclkcfg = __raw_readl(smemc_mmio_base + MEMCLKCFG);
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| 	csadrcfg[0] = __raw_readl(smemc_mmio_base + CSADRCFG0);
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| 	csadrcfg[1] = __raw_readl(smemc_mmio_base + CSADRCFG1);
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| 	csadrcfg[2] = __raw_readl(smemc_mmio_base + CSADRCFG2);
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| 	csadrcfg[3] = __raw_readl(smemc_mmio_base + CSADRCFG3);
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| 
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| 	return 0;
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| }
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| 
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| static int pxa3xx_smemc_resume(struct sys_device *dev)
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| {
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| 	__raw_writel(msc[0], smemc_mmio_base + MSC0);
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| 	__raw_writel(msc[1], smemc_mmio_base + MSC1);
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| 	__raw_writel(sxcnfg, smemc_mmio_base + SXCNFG);
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| 	__raw_writel(memclkcfg, smemc_mmio_base + MEMCLKCFG);
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| 	__raw_writel(csadrcfg[0], smemc_mmio_base + CSADRCFG0);
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| 	__raw_writel(csadrcfg[1], smemc_mmio_base + CSADRCFG1);
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| 	__raw_writel(csadrcfg[2], smemc_mmio_base + CSADRCFG2);
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| 	__raw_writel(csadrcfg[3], smemc_mmio_base + CSADRCFG3);
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| 
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| 	return 0;
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| }
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| 
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| static struct sysdev_class smemc_sysclass = {
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| 	.name		= "smemc",
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| 	.suspend	= pxa3xx_smemc_suspend,
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| 	.resume		= pxa3xx_smemc_resume,
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| };
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| 
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| static struct sys_device smemc_sysdev = {
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| 	.id		= 0,
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| 	.cls		= &smemc_sysclass,
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| };
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| 
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| static int __init smemc_init(void)
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| {
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| 	int ret = 0;
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| 
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| 	if (cpu_is_pxa3xx()) {
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| 		smemc_mmio_base = ioremap(SMEMC_PHYS_BASE, SMEMC_PHYS_SIZE);
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| 		if (smemc_mmio_base == NULL)
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| 			return -ENODEV;
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| 
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| 		ret = sysdev_class_register(&smemc_sysclass);
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| 		if (ret)
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| 			return ret;
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| 
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| 		ret = sysdev_register(&smemc_sysdev);
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| 	}
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| 
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| 	return ret;
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| }
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| subsys_initcall(smemc_init);
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| #endif
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