msm_kgsl: Optimize TLB flushing
Only flush TLB when it is absolutely nessasary as opposed to flushing it on every map and unmap
This commit is contained in:
Shubhraprakash Das
Jon Benson
parent
9e3544077c
commit
c69e698fff
@ -395,6 +395,16 @@ int kgsl_mmu_init(struct kgsl_device *device)
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return -ENOMEM;
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}
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mmu->hwpagetable = mmu->defaultpagetable;
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mmu->tlbflushfilter.size = (mmu->va_range /
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(PAGE_SIZE * GSL_PT_SUPER_PTE * 8)) + 1;
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mmu->tlbflushfilter.base = (unsigned int *)
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kzalloc(mmu->tlbflushfilter.size, GFP_KERNEL);
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if (!mmu->tlbflushfilter.base) {
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KGSL_MEM_ERR("Failed to create tlbflushfilter\n");
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kgsl_mmu_close(device);
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return -ENOMEM;
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}
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GSL_TLBFLUSH_FILTER_RESET();
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kgsl_yamato_regwrite(device, REG_MH_MMU_PT_BASE,
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mmu->hwpagetable->base.gpuaddr);
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kgsl_yamato_regwrite(device, REG_MH_MMU_VA_RANGE,
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@ -455,7 +465,7 @@ int kgsl_mmu_map(struct kgsl_pagetable *pagetable,
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unsigned int flags)
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{
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int numpages;
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unsigned int pte, superpte, ptefirst, ptelast, physaddr;
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unsigned int pte, ptefirst, ptelast, physaddr;
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int flushtlb, alloc_size;
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struct kgsl_mmu *mmu = NULL;
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int phys_contiguous = flags & KGSL_MEMFLAGS_CONPHYS;
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@ -516,15 +526,11 @@ int kgsl_mmu_map(struct kgsl_pagetable *pagetable,
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pte = ptefirst;
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flushtlb = 0;
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superpte = ptefirst & (GSL_PT_SUPER_PTE - 1);
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for (pte = superpte; pte < ptefirst; pte++) {
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/* tlb needs to be flushed only when a dirty superPTE
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gets backed */
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if (kgsl_pt_map_isdirty(pagetable, pte)) {
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flushtlb = 1;
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break;
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}
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}
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/* tlb needs to be flushed when the first and last pte are not at
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* superpte boundaries */
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if ((ptefirst & (GSL_PT_SUPER_PTE - 1)) != 0 ||
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((ptelast + 1) & (GSL_PT_SUPER_PTE-1)) != 0)
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flushtlb = 1;
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for (pte = ptefirst; pte < ptelast; pte++) {
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#ifdef VERBOSE_DEBUG
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@ -532,8 +538,10 @@ int kgsl_mmu_map(struct kgsl_pagetable *pagetable,
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uint32_t val = kgsl_pt_map_getaddr(pagetable, pte);
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BUG_ON(val != 0 && val != GSL_PT_PAGE_DIRTY);
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#endif
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if (kgsl_pt_map_isdirty(pagetable, pte))
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flushtlb = 1;
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if ((pte & (GSL_PT_SUPER_PTE-1)) == 0)
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if (GSL_TLBFLUSH_FILTER_ISDIRTY(pte / GSL_PT_SUPER_PTE))
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flushtlb = 1;
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/* mark pte as in use */
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if (phys_contiguous)
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physaddr = address;
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@ -554,17 +562,6 @@ int kgsl_mmu_map(struct kgsl_pagetable *pagetable,
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address += KGSL_PAGESIZE;
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}
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/* set superpte to end of next superpte */
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superpte = (ptelast + (GSL_PT_SUPER_PTE - 1))
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& (GSL_PT_SUPER_PTE - 1);
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for (pte = ptelast; pte < superpte; pte++) {
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/* tlb needs to be flushed only when a dirty superPTE
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gets backed */
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if (kgsl_pt_map_isdirty(pagetable, pte)) {
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flushtlb = 1;
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break;
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}
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}
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KGSL_MEM_INFO("pt %p p %08x g %08x pte f %d l %d n %d f %d\n",
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pagetable, address, *gpuaddr, ptefirst, ptelast,
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numpages, flushtlb);
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@ -573,8 +570,10 @@ int kgsl_mmu_map(struct kgsl_pagetable *pagetable,
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/* Invalidate tlb only if current page table used by GPU is the
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* pagetable that we used to allocate */
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if (pagetable == mmu->hwpagetable)
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if (flushtlb && (pagetable == mmu->hwpagetable)) {
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kgsl_yamato_setstate(mmu->device, KGSL_MMUFLAGS_TLBFLUSH);
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GSL_TLBFLUSH_FILTER_RESET();
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}
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KGSL_MEM_VDBG("return %d\n", 0);
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@ -587,7 +586,8 @@ kgsl_mmu_unmap(struct kgsl_pagetable *pagetable, unsigned int gpuaddr,
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int range)
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{
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unsigned int numpages;
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unsigned int pte, ptefirst, ptelast;
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unsigned int pte, ptefirst, ptelast, superpte;
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struct kgsl_mmu *mmu = NULL;
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KGSL_MEM_VDBG("enter (pt=%p, gpuaddr=0x%08x, range=%d)\n",
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pagetable, gpuaddr, range);
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@ -604,22 +604,24 @@ kgsl_mmu_unmap(struct kgsl_pagetable *pagetable, unsigned int gpuaddr,
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KGSL_MEM_INFO("pt %p gpu %08x pte first %d last %d numpages %d\n",
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pagetable, gpuaddr, ptefirst, ptelast, numpages);
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mmu = pagetable->mmu;
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superpte = ptefirst - (ptefirst & (GSL_PT_SUPER_PTE-1));
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GSL_TLBFLUSH_FILTER_SETDIRTY(superpte / GSL_PT_SUPER_PTE);
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for (pte = ptefirst; pte < ptelast; pte++) {
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#ifdef VERBOSE_DEBUG
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/* check if PTE exists */
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BUG_ON(!kgsl_pt_map_getaddr(pagetable, pte));
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#endif
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kgsl_pt_map_set(pagetable, pte, GSL_PT_PAGE_DIRTY);
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superpte = pte - (pte & (GSL_PT_SUPER_PTE - 1));
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if (pte == superpte)
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GSL_TLBFLUSH_FILTER_SETDIRTY(superpte /
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GSL_PT_SUPER_PTE);
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}
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dmb();
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/* Invalidate tlb only if current page table used by GPU is the
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* pagetable that we used to allocate */
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if (pagetable == pagetable->mmu->hwpagetable)
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kgsl_yamato_setstate(pagetable->mmu->device,
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KGSL_MMUFLAGS_TLBFLUSH);
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gen_pool_free(pagetable->pool, gpuaddr, range);
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KGSL_MEM_VDBG("return %d\n", 0);
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@ -653,6 +655,12 @@ int kgsl_mmu_close(struct kgsl_device *device)
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if (mmu->dummyspace.gpuaddr)
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kgsl_sharedmem_free(&mmu->dummyspace);
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if (mmu->tlbflushfilter.base) {
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mmu->tlbflushfilter.size = 0;
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kfree(mmu->tlbflushfilter.base);
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mmu->tlbflushfilter.base = NULL;
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}
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mmu->flags &= ~KGSL_FLAGS_STARTED;
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mmu->flags &= ~KGSL_FLAGS_INITIALIZED;
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mmu->flags &= ~KGSL_FLAGS_INITIALIZED0;
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@ -31,6 +31,21 @@
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#define KGSL_MMUFLAGS_TLBFLUSH 0x10000000
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#define KGSL_MMUFLAGS_PTUPDATE 0x20000000
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/* Macros to manage TLB flushing */
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#define GSL_TLBFLUSH_FILTER_ENTRY_NUMBITS (sizeof(unsigned char) * 8)
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#define GSL_TLBFLUSH_FILTER_GET(superpte) \
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(*((unsigned char *) \
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(((unsigned int)mmu->tlbflushfilter.base) \
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+ (superpte / GSL_TLBFLUSH_FILTER_ENTRY_NUMBITS))))
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#define GSL_TLBFLUSH_FILTER_SETDIRTY(superpte) \
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(GSL_TLBFLUSH_FILTER_GET((superpte)) |= 1 << \
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(superpte % GSL_TLBFLUSH_FILTER_ENTRY_NUMBITS))
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#define GSL_TLBFLUSH_FILTER_ISDIRTY(superpte) \
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(GSL_TLBFLUSH_FILTER_GET((superpte)) & \
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(1 << (superpte % GSL_TLBFLUSH_FILTER_ENTRY_NUMBITS)))
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#define GSL_TLBFLUSH_FILTER_RESET() memset(mmu->tlbflushfilter.base,\
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0, mmu->tlbflushfilter.size)
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extern unsigned int kgsl_cache_enable;
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struct kgsl_device;
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@ -68,6 +83,11 @@ struct kgsl_pagetable {
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struct gen_pool *pool;
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};
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struct kgsl_tlbflushfilter {
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unsigned int *base;
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unsigned int size;
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};
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struct kgsl_mmu {
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unsigned int refcnt;
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uint32_t flags;
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@ -81,6 +101,8 @@ struct kgsl_mmu {
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/* current page table object being used by device mmu */
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struct kgsl_pagetable *defaultpagetable;
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struct kgsl_pagetable *hwpagetable;
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/* Maintain filter to manage tlb flushing */
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struct kgsl_tlbflushfilter tlbflushfilter;
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};
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