8x50: Add some msm IO defines
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@ -47,6 +47,14 @@
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#define MSM_GPIO2_PHYS 0xA9100000
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#define MSM_GPIO2_SIZE SZ_4K
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#define MSM_GPIOCFG1_BASE IOMEM(0xF9004000)
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#define MSM_GPIOCFG1_PHYS 0xA8E00000
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#define MSM_GPIOCFG1_SIZE SZ_4K
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#define MSM_GPIOCFG2_BASE IOMEM(0xF9005000)
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#define MSM_GPIOCFG2_PHYS 0xA8F00000
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#define MSM_GPIOCFG2_SIZE SZ_4K
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#define MSM_CLK_CTL_BASE IOMEM(0xF8005000)
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#define MSM_CLK_CTL_PHYS 0xA8600000
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#define MSM_CLK_CTL_SIZE SZ_4K
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@ -55,6 +63,18 @@
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#define MSM_CLK_CTL_SH2_PHYS 0xABA01000
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#define MSM_CLK_CTL_SH2_SIZE SZ_4K
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#define MSM_TS_BASE IOMEM(0xF9006000)
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#define MSM_TS_PHYS 0xAA300000
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#define MSM_TS_SIZE SZ_4K
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#define MSM_SSBI_BASE IOMEM(0xF9008000)
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#define MSM_SSBI_PHYS 0xA8100000
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#define MSM_SSBI_SIZE SZ_4K
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#define MSM_TSSC_BASE IOMEM(0xF9009000)
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#define MSM_TSSC_PHYS 0xAA300000
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#define MSM_TSSC_SIZE SZ_4K
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#define MSM_SHARED_RAM_BASE IOMEM(0xF8100000)
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#define MSM_SHARED_RAM_PHYS 0x00100000
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#define MSM_SHARED_RAM_SIZE SZ_1M
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