From ccb6e5c62737b1fe1b96ed0a9aae691bfa99a830 Mon Sep 17 00:00:00 2001 From: Michael Brown Date: Mon, 17 Mar 2014 17:15:18 +0000 Subject: [PATCH] [realtek] Clear bit 24 of RCR On an Asus Z87-K motherboard with an onboard 8168 NIC, booting into Windows 7 and then warm rebooting into iPXE results in a broken RX datapath: packets can be transmitted successfully but garbage is received. A cold reboot clears the problem. A dump of the PHY registers reveals only one difference: in the failure case the bits ADVERTISE_PAUSE_CAP and ADVERTISE_PAUSE_ASYM are cleared. Explicitly setting these bits does not fix the problem. A dump of the MAC registers reveals a few differences, of which the most obvious culprit is the undocumented bit 24 of the Receive Configuration Register (RCR), which is set in the failure case. Explicitly clearing this bit does fix the problem. Reported-by: Sebastian Nielsen Reported-by: Oliver Rath Debugged-by: Sebastian Nielsen Tested-by: Sebastian Nielsen Signed-off-by: Michael Brown --- src/drivers/net/realtek.c | 4 ++-- src/drivers/net/realtek.h | 1 + 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/src/drivers/net/realtek.c b/src/drivers/net/realtek.c index 7c6f8689..7964475a 100644 --- a/src/drivers/net/realtek.c +++ b/src/drivers/net/realtek.c @@ -708,8 +708,8 @@ static int realtek_open ( struct net_device *netdev ) { /* Configure receiver */ rcr = readl ( rtl->regs + RTL_RCR ); - rcr &= ~( RTL_RCR_RXFTH_MASK | RTL_RCR_RBLEN_MASK | - RTL_RCR_MXDMA_MASK ); + rcr &= ~( RTL_RCR_STOP_WORKING | RTL_RCR_RXFTH_MASK | + RTL_RCR_RBLEN_MASK | RTL_RCR_MXDMA_MASK ); rcr |= ( RTL_RCR_RXFTH_DEFAULT | RTL_RCR_RBLEN_DEFAULT | RTL_RCR_MXDMA_DEFAULT | RTL_RCR_WRAP | RTL_RCR_AB | RTL_RCR_AM | RTL_RCR_APM | RTL_RCR_AAP ); diff --git a/src/drivers/net/realtek.h b/src/drivers/net/realtek.h index e426dc5a..ac33405e 100644 --- a/src/drivers/net/realtek.h +++ b/src/drivers/net/realtek.h @@ -140,6 +140,7 @@ enum realtek_legacy_status { /** Receive (Rx) Configuration Register (dword) */ #define RTL_RCR 0x44 +#define RTL_RCR_STOP_WORKING 0x01000000UL /**< Here be dragons */ #define RTL_RCR_RXFTH(x) ( (x) << 13 ) /**< Receive FIFO threshold */ #define RTL_RCR_RXFTH_MASK RTL_RCR_RXFTH ( 0x7 ) #define RTL_RCR_RXFTH_DEFAULT RTL_RCR_RXFTH ( 0x7 /* Whole packet */ )