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synced 2024-12-14 15:21:32 +00:00
Fixed up PCI-scanning code to use new PCI interface.
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3293c68488
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@ -118,14 +118,10 @@ static struct pci_id pci_isa_bridge_list[] = {
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"SIS 85C503/5513 PCI to ISA bridge"},
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};
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static struct pci_driver sis_bridge_driver __pci_driver = {
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.type = BRIDGE_DRIVER,
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.name = "",
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.probe = 0,
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.ids = pci_isa_bridge_list,
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.id_count = sizeof(pci_isa_bridge_list)/sizeof(pci_isa_bridge_list[0]),
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.class = 0,
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};
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static struct pci_driver sis_bridge_driver =
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PCI_DRIVER ( "sis_bridge", pci_isa_bridge_list, PCI_NO_CLASS );
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/* Function Prototypes */
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@ -241,27 +237,22 @@ static int sis630e_get_mac_addr(struct pci_device * pci_dev __unused, struct nic
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{
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u8 reg;
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int i;
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struct pci_device p[1];
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struct pci_device isa_bridge;
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/* find PCI to ISA bridge */
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memset(p, 0, sizeof(p));
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do {
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find_pci(BRIDGE_DRIVER, p);
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} while(p->driver && p->driver != &sis_bridge_driver);
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/* error on failure */
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if (!p->driver)
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memset(&isa_bridge, 0, sizeof(isa_bridge));
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if ( ! find_pci_device ( &isa_bridge, &sis_bridge_driver ) )
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return 0;
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pcibios_read_config_byte(p->bus,p->devfn, 0x48, ®);
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pcibios_write_config_byte(p->bus,p->devfn, 0x48, reg | 0x40);
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pci_read_config_byte(&isa_bridge, 0x48, ®);
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pci_write_config_byte(&isa_bridge, 0x48, reg | 0x40);
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for (i = 0; i < ETH_ALEN; i++)
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{
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outb(0x09 + i, 0x70);
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((u8 *)(nic->node_addr))[i] = inb(0x71);
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}
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pcibios_write_config_byte(p->bus,p->devfn, 0x48, reg & ~0x40);
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pci_write_config_byte(&isa_bridge, 0x48, reg & ~0x40);
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return 1;
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}
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@ -335,13 +326,13 @@ static int sis900_probe(struct dev *dev, struct pci_device *pci)
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dev_id = pci->dev_id;
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/* wakeup chip */
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pcibios_write_config_dword(pci->bus, pci->devfn, 0x40, 0x00000000);
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pci_write_config_dword(pci, 0x40, 0x00000000);
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adjust_pci_device(pci);
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/* get MAC address */
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ret = 0;
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pcibios_read_config_byte(pci->bus,pci->devfn, PCI_REVISION, &revision);
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pci_read_config_byte(pci, PCI_REVISION, &revision);
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/* save for use later in sis900_reset() */
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pci_revision = revision;
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@ -425,6 +416,8 @@ static int sis900_probe(struct dev *dev, struct pci_device *pci)
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return 1;
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}
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/*
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* EEPROM Routines: These functions read and write to EEPROM for
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