mirror of
https://github.com/xcat2/xNBA.git
synced 2024-12-14 23:31:39 +00:00
Synced across updates from Etherboot 5.4 tree
This commit is contained in:
Michael Brown
commit
4e87543c74
@ -17,6 +17,12 @@ CFLAGS+= -DRAWADDR=0x40100000
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# NIC Debug Outputs
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#CFLAGS+= -DDEBUG_NIC
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# Reduced Media Independent Interface
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# MAZBR LPEC2001: MII (Intel LXT971ALE at 0..1)
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# Elmeg D@VOS : RMII (Altima AC104-QF at 4..7)
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# Telekom XI521 : RMII (Altima AC104-QF at 4..7)
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#CFLAGS+= -DRMII
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# Fixed MAC address
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# p2001_eth has no flash and fixed mac address
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#CFLAGS+= -DMAC_HW_ADDR_DRV="'H','Y','L','N','X','1'"
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@ -17,7 +17,7 @@ void serial_putc(int ch)
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{
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/* wait for room in the 32 byte tx FIFO */
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while ((P2001_UART->r.STATUS & 0x3f) > /* 30 */ 0) ;
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P2001_UART->w.TX1 = ch & 0xff;
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P2001_UART->w.TX[0] = ch & 0xff;
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}
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/*
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@ -27,7 +27,7 @@ void serial_putc(int ch)
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int serial_getc(void)
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{
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while (((P2001_UART->r.STATUS >> 6) & 0x3f) == 0) ;
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return P2001_UART->r.RX1 & 0xff;
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return P2001_UART->r.RX[0] & 0xff;
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}
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/*
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@ -1,10 +1,10 @@
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/**************************************************************************
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Etherboot - BOOTP/TFTP Bootstrap Program
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P2001 NIC driver for Etherboot
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***************************************************************************/
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* Etherboot - BOOTP/TFTP Bootstrap Program
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* P2001 NIC driver for Etherboot
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**************************************************************************/
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/*
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* Copyright (C) 2004 Tobias Lorenz
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* Copyright (C) 2005 Tobias Lorenz
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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@ -19,7 +19,7 @@ P2001 NIC driver for Etherboot
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#include "isa.h"
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#include "hardware.h"
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#include "lxt971a.h"
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#include "mii.h"
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#include "timer.h"
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@ -31,25 +31,20 @@ static unsigned char MAC_HW_ADDR[6]={MAC_HW_ADDR_DRV};
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#define DMA_BUF_SIZE 2048 /* Buffer size */
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static DMA_DSC txd __attribute__ ((__section__(".dma.desc")));
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static DMA_DSC rxd[NUM_RX_DESC] __attribute__ ((__section__(".dma.desc")));
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static unsigned char rxb[NUM_RX_DESC * DMA_BUF_SIZE] __attribute__ ((__section__(".dma.buffer")));
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static unsigned char txb[ DMA_BUF_SIZE] __attribute__ ((__section__(".dma.buffer")));
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static char rxb[NUM_RX_DESC * DMA_BUF_SIZE] __attribute__ ((__section__(".dma.buffer")));
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static char txb[ DMA_BUF_SIZE] __attribute__ ((__section__(".dma.buffer")));
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static unsigned int cur_rx;
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/* Device selectors */
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static unsigned int cur_channel; // DMA channel : 0..3
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static unsigned int cur_phy; // PHY Address : 0..31
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static P2001_ETH_regs_ptr EU; // Ethernet Unit : 0x0018_000 with _=0..3
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static P2001_ETH_regs_ptr MU; // Management Unit: 0x00180000
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#define MDIO_MAXCOUNT 1000 /* mdio abort */
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static unsigned int mdio_error; /* mdio error */
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/* Function prototypes */
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static void p2001_eth_mdio_init ();
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static void p2001_eth_mdio_write(unsigned int phyadr, unsigned int regadr, unsigned int data);
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static unsigned int p2001_eth_mdio_read (unsigned int phyadr, unsigned int regadr);
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extern unsigned int p2001_eth_mdio_error;
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/* mdio handling */
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static int p2001_eth_mdio_read (int phy_id, int location);
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static void p2001_eth_mdio_write(int phy_id, int location, int val);
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/* net_device functions */
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static int p2001_eth_poll (struct nic *nic, int retrieve);
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static void p2001_eth_transmit (struct nic *nic, const char *d,
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unsigned int t, unsigned int s, const char *p);
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@ -60,103 +55,107 @@ static void p2001_eth_init ();
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static void p2001_eth_disable (struct dev *dev);
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static int p2001_eth_check_link(unsigned int phy);
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static int link;
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static void p2001_eth_phyreset ();
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static int p2001_eth_probe (struct dev *dev, unsigned short *probe_addrs __unused);
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/* Supported MII list */
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static struct mii_chip_info {
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const char * name;
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unsigned int physid; // (MII_PHYSID2 << 16) | MII_PHYSID1
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} mii_chip_table[] = {
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{ "Intel LXT971A", 0x78e20013 },
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{ "Altima AC104-QF", 0x55410022 },
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{NULL,0},
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};
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/**************************************************************************
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PHY MANAGEMENT UNIT - Read/write
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***************************************************************************/
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static void p2001_eth_mdio_init()
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* PHY MANAGEMENT UNIT - Read/write
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**************************************************************************/
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/**
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* mdio_read - read MII PHY register
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* @dev: the net device to read
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* @regadr: the phy register id to read
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*
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* Read MII registers through MDIO and MDC
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* using MDIO management frame structure and protocol(defined by ISO/IEC).
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*/
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static int p2001_eth_mdio_read(int phy_id, int location)
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{
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/* reset ethernet PHYs */
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printf("Resetting PHYs...\n");
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/* GPIO24/25: TX_ER2/TX_ER0 */
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/* GPIO26/27: PHY_RESET/TX_ER1 */
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P2001_GPIO->PIN_MUX |= 0x0018;
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// 31-16: 0000 1111 0000 0000
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P2001_GPIO->GPIO2_En |= 0x0400;
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P2001_GPIO->GPIO2_Out |= 0x04000000;
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P2001_GPIO->GPIO2_Out &= ~0x0400;
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mdelay(500);
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P2001_GPIO->GPIO2_Out |= 0x0400;
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/* set management unit clock divisor */
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// max. MDIO CLK = 2.048 MHz (EU.doc)
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// max. MDIO CLK = 8.000 MHz (LXT971A)
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// sysclk/(2*(n+1)) = MDIO CLK <= 2.048 MHz
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// n >= sysclk/4.096 MHz - 1
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#if SYSCLK == 73728000
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P2001_MU->MU_DIV = 17; // 73.728 MHZ =17=> 2.020 MHz
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#else
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//MU->MU_DIV = (SYSCLK/4.096)-1;
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#error "Please define a proper MDIO CLK divisor for that sysclk."
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#endif
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asm("nop \n nop");
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}
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static void p2001_eth_mdio_write(unsigned int phyadr, unsigned int regadr, unsigned int data)
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{
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static unsigned int count;
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count = 0;
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/* Warten bis Hardware inaktiv (MIU = "0") */
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while ((MU->MU_CNTL & 0x8000) && (count < MDIO_MAXCOUNT))
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count++;
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/* Schreiben MU_DATA */
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MU->MU_DATA = data;
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/* Schreiben MU_CNTL */
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MU->MU_CNTL = regadr + (phyadr<<5) + (1<<10);
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/* Warten bis Hardware aktiv (MIU = "1") */
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while (((MU->MU_CNTL & 0x8000) == 0) && (count < MDIO_MAXCOUNT))
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count++;
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//asm("nop \r\n nop");
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/* Warten bis Hardware inaktiv (MIU = "0") */
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while ((MU->MU_CNTL & 0x8000) && (count < MDIO_MAXCOUNT))
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count++;
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mdio_error = (count >= MDIO_MAXCOUNT);
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}
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static unsigned int p2001_eth_mdio_read(unsigned int phyadr, unsigned int regadr)
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{
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static unsigned int count;
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count = 0;
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int result, boguscnt = 1000;
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do {
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/* Warten bis Hardware inaktiv (MIU = "0") */
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while ((MU->MU_CNTL & 0x8000) && (count < MDIO_MAXCOUNT))
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count++;
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while (P2001_MU->MU_CNTL & 0x8000)
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barrier();
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/* Schreiben MU_CNTL */
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MU->MU_CNTL = regadr + (phyadr<<5) + (2<<10);
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P2001_MU->MU_CNTL = location + (phy_id<<5) + (2<<10);
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/* Warten bis Hardware aktiv (MIU = "1") */
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while (((MU->MU_CNTL & 0x8000) == 0) && (count < MDIO_MAXCOUNT))
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count++;
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while ((P2001_MU->MU_CNTL & 0x8000) == 0)
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barrier();
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//asm("nop \r\n nop");
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/* Warten bis Hardware inaktiv (MIU = "0") */
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while ((MU->MU_CNTL & 0x8000) && (count < MDIO_MAXCOUNT))
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count++;
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while (P2001_MU->MU_CNTL & 0x8000)
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barrier();
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/* Fehler, wenn MDIO Read Error (MRE = "1") */
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} while ((MU->MU_CNTL & 0x4000) && (count < MDIO_MAXCOUNT));
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} while ((P2001_MU->MU_CNTL & 0x4000) && (--boguscnt > 0));
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/* Lesen MU_DATA */
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mdio_error = (count >= MDIO_MAXCOUNT);
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return MU->MU_DATA;
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result = P2001_MU->MU_DATA;
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if (boguscnt == 0)
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return 0;
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if ((result & 0xffff) == 0xffff)
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return 0;
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return result & 0xffff;
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}
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/**
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* mdio_write - write MII PHY register
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* @dev: the net device to write
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* @regadr: the phy register id to write
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* @value: the register value to write with
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*
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* Write MII registers with @value through MDIO and MDC
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* using MDIO management frame structure and protocol(defined by ISO/IEC)
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*/
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static void p2001_eth_mdio_write(int phy_id, int location, int val)
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{
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/* Warten bis Hardware inaktiv (MIU = "0") */
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while (P2001_MU->MU_CNTL & 0x8000)
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barrier();
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/* Schreiben MU_DATA */
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P2001_MU->MU_DATA = val;
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/* Schreiben MU_CNTL */
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P2001_MU->MU_CNTL = location + (phy_id<<5) + (1<<10);
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/* Warten bis Hardware aktiv (MIU = "1") */
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while ((P2001_MU->MU_CNTL & 0x8000) == 0)
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barrier();
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//asm("nop \r\n nop");
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/* Warten bis Hardware inaktiv (MIU = "0") */
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while (P2001_MU->MU_CNTL & 0x8000)
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barrier();
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}
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/**************************************************************************
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POLL - Wait for a frame
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***************************************************************************/
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* POLL - Wait for a frame
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**************************************************************************/
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/* Function: p2001_eth_poll
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*
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* Description: checks for a received packet and returns it if found.
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@ -231,9 +230,11 @@ static int p2001_eth_poll(struct nic *nic, int retrieve)
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}
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/**************************************************************************
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TRANSMIT - Transmit a frame
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***************************************************************************/
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* TRANSMIT - Transmit a frame
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**************************************************************************/
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/* Function: p2001_eth_transmit
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*
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* Description: transmits a packet and waits for completion or timeout.
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@ -271,7 +272,7 @@ static void p2001_eth_transmit(
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// TMAC_CNTL.ATP does the same
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#ifdef DEBUG_NIC
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printf("p2001_eth_transmit: packet from %! to %! sent\n", txb+ETH_ALEN, txb);
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printf("p2001_eth_transmit: packet from %! to %! sent (size: %d)\n", txb+ETH_ALEN, txb, s);
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#endif
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/* configure descriptor */
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@ -281,12 +282,12 @@ static void p2001_eth_transmit(
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/* restart the transmitter */
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EU->TMAC_DMA_EN = 0x01; /* set run bit */
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while(EU->TMAC_DMA_EN & 0x01) ; /* wait */
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while(EU->TMAC_DMA_EN & 0x01); /* wait */
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#ifdef DEBUG_NIC
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/* check status */
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status = EU->TMAC_DMA_STAT;
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if (status & ~(0x40))
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if (status & ~(0x40)) // not END
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printf("p2001_eth_transmit: dma status=0x%hx\n", status);
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printf("TMAC_MIB6..7: %d:%d\n", EU->TMAC_MIB6, EU->TMAC_MIB7);
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@ -294,9 +295,11 @@ static void p2001_eth_transmit(
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}
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/**************************************************************************
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IRQ - Enable, Disable or Force Interrupts
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***************************************************************************/
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* IRQ - Enable, Disable or Force Interrupts
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**************************************************************************/
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/* Function: p2001_eth_irq
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*
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* Description: Enable, Disable, or Force, interrupts
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@ -321,9 +324,11 @@ p2001_eth_irq(struct nic *nic __unused, irq_action_t action __unused)
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}
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|
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/**************************************************************************
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INIT - Initialize device
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***************************************************************************/
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* INIT - Initialize device
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**************************************************************************/
|
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/* Function: p2001_init
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*
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* Description: resets the ethernet controller chip and various
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@ -335,6 +340,23 @@ static void p2001_eth_init()
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{
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static int i;
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/* activate MII 3 */
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if (cur_channel == 3)
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P2001_GPIO->PIN_MUX |= (1<<8); // MII_3_en = 1
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#ifdef RMII
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/* RMII init sequence */
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if (link & LPA_100) {
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EU->CONF_RMII = (1<<2) | (1<<1); // softres | 100Mbit
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EU->CONF_RMII = (1<<2) | (1<<1) | (1<<0); // softres | 100Mbit | RMII
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EU->CONF_RMII = (1<<1) | (1<<0); // 100 Mbit | RMII
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} else {
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EU->CONF_RMII = (1<<2); // softres
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EU->CONF_RMII = (1<<2) | (1<<0); // softres | RMII
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EU->CONF_RMII = (1<<0); // RMII
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}
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#endif
|
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|
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/* disable transceiver */
|
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// EU->TMAC_DMA_EN = 0; /* clear run bit */
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// EU->RMAC_DMA_EN = 0; /* clear run bit */
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@ -353,7 +375,7 @@ static void p2001_eth_init()
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// txd.stat = (1<<31) | (1<<30) | (1<<29); // DSC0 OWN|START|END
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// txd.cntl = cur_channel << 16; // DSC1 CHANNEL
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// txd.cntl |= DMA_BUF_SIZE; // DSC1 LEN
|
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txd.buf = &txb; // DSC2 BUFFER
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txd.buf = (char *)&txb; // DSC2 BUFFER
|
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txd.next = &txd; // DSC3 NEXTDSC @self
|
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EU->TMAC_DMA_DESC = &txd;
|
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|
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@ -371,9 +393,12 @@ static void p2001_eth_init()
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EU->RMAC_DMA_DESC = &rxd[0];
|
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|
||||
/* set transmitter mode */
|
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EU->TMAC_CNTL = (1<<4) | /* COI: Collision ignore */
|
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//(1<<3) | /* CSI: Carrier Sense ignore */
|
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(1<<2); /* ATP: Automatic Transmit Padding */
|
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if (link & LPA_DUPLEX)
|
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EU->TMAC_CNTL = (1<<4) | /* COI: Collision ignore */
|
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(1<<3) | /* CSI: Carrier Sense ignore */
|
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(1<<2); /* ATP: Automatic Transmit Padding */
|
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else
|
||||
EU->TMAC_CNTL = (1<<2); /* ATP: Automatic Transmit Padding */
|
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|
||||
/* set receive mode */
|
||||
EU->RMAC_CNTL = (1<<3) | /* BROAD: Broadcast packets */
|
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@ -384,9 +409,10 @@ static void p2001_eth_init()
|
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}
|
||||
|
||||
|
||||
|
||||
/**************************************************************************
|
||||
DISABLE - Turn off ethernet interface
|
||||
***************************************************************************/
|
||||
* DISABLE - Turn off ethernet interface
|
||||
**************************************************************************/
|
||||
static void p2001_eth_disable(struct dev *dev __unused)
|
||||
{
|
||||
/* put the card in its initial state */
|
||||
@ -408,40 +434,52 @@ static void p2001_eth_disable(struct dev *dev __unused)
|
||||
}
|
||||
|
||||
|
||||
|
||||
/**************************************************************************
|
||||
LINK - Check for valid link
|
||||
***************************************************************************/
|
||||
* LINK - Check for valid link
|
||||
**************************************************************************/
|
||||
static int p2001_eth_check_link(unsigned int phy)
|
||||
{
|
||||
static int status;
|
||||
static unsigned int count;
|
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count = 0;
|
||||
static unsigned int i, physid;
|
||||
|
||||
/* print some information about out PHY */
|
||||
physid = (p2001_eth_mdio_read(phy, MII_PHYSID2) << 16) |
|
||||
p2001_eth_mdio_read(phy, MII_PHYSID1);
|
||||
printf("PHY %d, ID 0x%x ", phy, physid);
|
||||
for (i = 0; mii_chip_table[i].physid; i++)
|
||||
if (mii_chip_table[i].physid == physid) {
|
||||
printf("(%s).\n", mii_chip_table[i].name);
|
||||
break;
|
||||
}
|
||||
if (!mii_chip_table[i].physid)
|
||||
printf("(unknown).\n");
|
||||
|
||||
/* Use 0x3300 for restarting NWay */
|
||||
printf("Starting auto-negotiation... ");
|
||||
p2001_eth_mdio_write(phy, Adr_LXT971A_Control, 0x3300);
|
||||
if (mdio_error)
|
||||
goto failed;
|
||||
p2001_eth_mdio_write(phy, MII_BMCR, 0x3300);
|
||||
|
||||
/* Bits 1.5 and 17.7 are set to 1 once the Auto-Negotiation process to completed. */
|
||||
/* Bit 1.5 is set once the Auto-Negotiation process is completed. */
|
||||
i = 0;
|
||||
do {
|
||||
mdelay(500);
|
||||
status = p2001_eth_mdio_read(phy, Adr_LXT971A_Status1);
|
||||
if (mdio_error || (count++ > 6)) // 6*500ms = 3s timeout
|
||||
status = p2001_eth_mdio_read(phy, MII_BMSR);
|
||||
if (!status || (i++ > 6)) // 6*500ms = 3s timeout
|
||||
goto failed;
|
||||
} while (!(status & 0x20));
|
||||
|
||||
/* Bits 1.2 and 17.10 are set to 1 once the link is established. */
|
||||
if (p2001_eth_mdio_read(phy, Adr_LXT971A_Status1) & 0x04) {
|
||||
/* Bits 17.14 and 17.9 can be used to determine the link operation conditions (speed and duplex). */
|
||||
printf("Valid link, operating at: %sMb-%s\n",
|
||||
(p2001_eth_mdio_read(phy, Adr_LXT971A_Status2) & 0x4000) ? "100" : "10",
|
||||
(p2001_eth_mdio_read(phy, Adr_LXT971A_Status2) & 0x0200) ? "FD" : "HD");
|
||||
return 1;
|
||||
} while (!(status & BMSR_ANEGCOMPLETE));
|
||||
|
||||
/* Bits 1.2 is set once the link is established. */
|
||||
if ((status = p2001_eth_mdio_read(phy, MII_BMSR)) & BMSR_LSTATUS) {
|
||||
link = p2001_eth_mdio_read(phy, MII_ADVERTISE) &
|
||||
p2001_eth_mdio_read(phy, MII_LPA);
|
||||
printf(" Valid link, operating at: %sMb-%s\n",
|
||||
(link & LPA_100) ? "100" : "10",
|
||||
(link & LPA_DUPLEX) ? "FD" : "HD");
|
||||
return 1;
|
||||
}
|
||||
|
||||
failed:
|
||||
if (mdio_error)
|
||||
if (!status)
|
||||
printf("Failed\n");
|
||||
else
|
||||
printf("No valid link\n");
|
||||
@ -449,49 +487,79 @@ failed:
|
||||
}
|
||||
|
||||
|
||||
|
||||
/**************************************************************************
|
||||
PROBE - Look for an adapter, this routine's visible to the outside
|
||||
***************************************************************************/
|
||||
* PHYRESET - hardware reset all MII PHYs
|
||||
**************************************************************************/
|
||||
|
||||
/**
|
||||
* p2001_eth_phyreset - hardware reset all MII PHYs
|
||||
*/
|
||||
static void p2001_eth_phyreset()
|
||||
{
|
||||
/* GPIO24/25: TX_ER2/TX_ER0 */
|
||||
/* GPIO26/27: PHY_RESET/TX_ER1 */
|
||||
P2001_GPIO->PIN_MUX |= 0x0018;
|
||||
// 31-16: 0000 1111 0000 0000
|
||||
P2001_GPIO->GPIO2_En |= 0x0400;
|
||||
|
||||
P2001_GPIO->GPIO2_Out |= 0x04000000;
|
||||
P2001_GPIO->GPIO2_Out &= ~0x0400;
|
||||
mdelay(500);
|
||||
P2001_GPIO->GPIO2_Out |= 0x0400;
|
||||
|
||||
#ifdef RMII
|
||||
/* RMII_clk_sel = 0xxb no RMII (default) */
|
||||
/* RMII_clk_sel = 100b COL_0 */
|
||||
/* RMII_clk_sel = 101b COL_1 */
|
||||
/* RMII_clk_sel = 110b COL_2 */
|
||||
/* RMII_clk_sel = 111b COL_3 */
|
||||
P2001_GPIO->PIN_MUX |= (4 << 13);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
|
||||
/**************************************************************************
|
||||
* PROBE - Look for an adapter, this routine's visible to the outside
|
||||
**************************************************************************/
|
||||
|
||||
static int p2001_eth_probe(struct dev *dev, unsigned short *probe_addrs __unused)
|
||||
{
|
||||
struct nic *nic = (struct nic *)dev;
|
||||
/* if probe_addrs is 0, then routine can use a hardwired default */
|
||||
static int board_found;
|
||||
static int valid_link;
|
||||
|
||||
/* reset phys and configure mdio clk */
|
||||
p2001_eth_mdio_init();
|
||||
printf("Resetting PHYs...\n");
|
||||
p2001_eth_phyreset();
|
||||
|
||||
/* set management unit clock divisor */
|
||||
// max. MDIO CLK = 2.048 MHz (EU.doc)
|
||||
P2001_MU->MU_DIV = (SYSCLK/4096000)-1; // 2.048 MHz
|
||||
//asm("nop \n nop");
|
||||
|
||||
/* find the correct PHY/DMA/MAC combination */
|
||||
MU = P2001_MU; // MU for all PHYs is only in EU0
|
||||
printf("Searching for P2001 NICs...\n");
|
||||
cur_phy = -1;
|
||||
for (cur_channel=0; cur_channel<4; cur_channel++) {
|
||||
switch(cur_channel) {
|
||||
case 0:
|
||||
EU = P2001_EU0;
|
||||
cur_phy = 0;
|
||||
break;
|
||||
case 1:
|
||||
EU = P2001_EU1;
|
||||
cur_phy = 1;
|
||||
break;
|
||||
case 2:
|
||||
EU = P2001_EU2;
|
||||
cur_phy = 2;
|
||||
break;
|
||||
case 3:
|
||||
EU = P2001_EU3;
|
||||
cur_phy = 3;
|
||||
EU = P2001_EU(cur_channel);
|
||||
|
||||
/* find next phy */
|
||||
while (++cur_phy < 16) {
|
||||
//printf("phy detect %d\n", cur_phy);
|
||||
if (p2001_eth_mdio_read(cur_phy, MII_BMSR) != 0)
|
||||
break;
|
||||
}
|
||||
if (cur_phy == 16) {
|
||||
printf("no more MII PHYs found\n");
|
||||
break;
|
||||
}
|
||||
|
||||
/* first a non destructive test for initial value RMAC_TLEN=1518 */
|
||||
board_found = (EU->RMAC_TLEN == 1518);
|
||||
if (board_found) {
|
||||
if (EU->RMAC_TLEN == 1518) {
|
||||
printf("Checking EU%d...\n", cur_channel);
|
||||
|
||||
valid_link = p2001_eth_check_link(cur_phy);
|
||||
if (valid_link) {
|
||||
if (p2001_eth_check_link(cur_phy)) {
|
||||
/* initialize device */
|
||||
p2001_eth_init(nic);
|
||||
|
||||
@ -507,7 +575,6 @@ static int p2001_eth_probe(struct dev *dev, unsigned short *probe_addrs __unused
|
||||
|
||||
/* Report the ISA pnp id of the board */
|
||||
dev->devid.vendor_id = htons(GENERIC_ISAPNP_VENDOR);
|
||||
dev->devid.vendor_id = htons(0x1234);
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
|
||||
@ -100,10 +100,7 @@ typedef struct { // 0x00130000U
|
||||
|
||||
typedef union { // 0x00140000U
|
||||
struct { // write
|
||||
volatile unsigned int TX1; // 0x00000000U
|
||||
volatile unsigned int TX2; // 0x00000004U
|
||||
volatile unsigned int TX3; // 0x00000008U
|
||||
volatile unsigned int TX4; // 0x0000000CU
|
||||
volatile unsigned int TX[4]; // 0x00000000-0x000CU
|
||||
volatile unsigned int Baudrate; // 0x00000010U
|
||||
volatile unsigned int reserved1[0x3];
|
||||
volatile unsigned int Config; // 0x00000020U
|
||||
@ -113,10 +110,7 @@ typedef union { // 0x00140000U
|
||||
} w; // write
|
||||
|
||||
struct { // read
|
||||
volatile unsigned int RX1; // 0x00000000U
|
||||
volatile unsigned int RX2; // 0x00000004U
|
||||
volatile unsigned int RX3; // 0x00000008U
|
||||
volatile unsigned int RX4; // 0x0000000CU
|
||||
volatile unsigned int RX[4]; // 0x00000000-0x000CU
|
||||
volatile unsigned int reserved1[0x4];
|
||||
volatile unsigned int PRE_STATUS; // 0x00000020U
|
||||
volatile unsigned int STATUS; // 0x00000024U
|
||||
@ -168,11 +162,8 @@ typedef struct { // 0x0018_000U _=0,1,2,3
|
||||
volatile unsigned int TMAC_DMA_DATA; // 0x00000FF8U
|
||||
volatile unsigned int TMAC_DMA_ADR; // 0x00000FFCU
|
||||
} *P2001_ETH_regs_ptr;
|
||||
#define P2001_EU0 ((volatile P2001_ETH_regs_ptr) 0x00180000)
|
||||
#define P2001_EU1 ((volatile P2001_ETH_regs_ptr) 0x00181000)
|
||||
#define P2001_EU2 ((volatile P2001_ETH_regs_ptr) 0x00182000)
|
||||
#define P2001_EU3 ((volatile P2001_ETH_regs_ptr) 0x00183000)
|
||||
#define P2001_MU P2001_EU0
|
||||
#define P2001_EU(x) ((volatile P2001_ETH_regs_ptr) ((unsigned int) 0x00180000UL+(0x1000UL*(x)))) /* x = 0..3 */
|
||||
#define P2001_MU P2001_EU(0)
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@ -1,30 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2004 Tobias Lorenz
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Intel LXT971ALE (MII-compatible PHY)
|
||||
*/
|
||||
|
||||
#define Adr_LXT971A_Control 0 /* Control Register */
|
||||
#define Adr_LXT971A_Status1 1 /* MII Status Register #1 */
|
||||
#define Adr_LXT971A_PHY_ID1 2 /* PHY Identification Register 1 */
|
||||
#define Adr_LXT971A_PHY_ID2 3 /* PHY Identification Register 2 */
|
||||
#define Adr_LXT971A_AN_Advertise 4 /* Auto Negotiation Advertisement Register */
|
||||
#define Adr_LXT971A_AN_Link_Ability 5 /* Auto Negotiation Link Partner Base Page Ability Register */
|
||||
#define Adr_LXT971A_AN_Expansion 6 /* Auto Negotiation Expansion */
|
||||
#define Adr_LXT971A_AN_Next_Page_Txmit 7 /* Auto Negotiation Next Page Transmit Register */
|
||||
#define Adr_LXT971A_AN_Link_Next_Page 8 /* Auto Negotiation Link Partner Next Page Receive Register */
|
||||
#define Adr_LXT971A_Fast_Control 9 /* Not Implemented */
|
||||
#define Adr_LXT971A_Fast_Status 10 /* Not Implemented */
|
||||
#define Adr_LXT971A_Extended_Status 15 /* Not Implemented */
|
||||
#define Adr_LXT971A_Port_Config 16 /* Configuration Register */
|
||||
#define Adr_LXT971A_Status2 17 /* Status Register #2 */
|
||||
#define Adr_LXT971A_Interrupt_Enable 18 /* Interrupt Enable Register */
|
||||
#define Adr_LXT971A_Interrupt_Status 19 /* Interrupt Status Register */
|
||||
#define Adr_LXT971A_LED_Config 20 /* LED Configuration Register */
|
||||
#define Adr_LXT971A_Transmit_Control 30 /* Transmit Control Register */
|
||||
@ -20,4 +20,16 @@ typedef signed short int16_t;
|
||||
typedef signed int int32_t;
|
||||
typedef signed long long int64_t;
|
||||
|
||||
typedef signed char s8;
|
||||
typedef unsigned char u8;
|
||||
|
||||
typedef signed short s16;
|
||||
typedef unsigned short u16;
|
||||
|
||||
typedef signed long s32;
|
||||
typedef unsigned int u32;
|
||||
|
||||
typedef signed long long s64;
|
||||
typedef unsigned long long u64;
|
||||
|
||||
#endif /* STDINT_H */
|
||||
|
||||
@ -13,4 +13,16 @@ typedef signed short int16_t;
|
||||
typedef signed int int32_t;
|
||||
typedef signed long long int64_t;
|
||||
|
||||
typedef signed char s8;
|
||||
typedef unsigned char u8;
|
||||
|
||||
typedef signed short s16;
|
||||
typedef unsigned short u16;
|
||||
|
||||
typedef signed long s32;
|
||||
typedef unsigned int u32;
|
||||
|
||||
typedef signed long long s64;
|
||||
typedef unsigned long long u64;
|
||||
|
||||
#endif /* STDINT_H */
|
||||
|
||||
@ -216,7 +216,7 @@ static int elf_freebsd_debug_loader(unsigned int offset)
|
||||
estate.toread, estate.curaddr);
|
||||
#endif
|
||||
/* Save where we are loading this... */
|
||||
symtab_load = phys_to_virt(estate.curaddr);
|
||||
symtab_load = estate.curaddr;
|
||||
|
||||
*((long *)phys_to_virt(estate.curaddr)) = estate.toread;
|
||||
estate.curaddr += sizeof(long);
|
||||
@ -244,7 +244,7 @@ static int elf_freebsd_debug_loader(unsigned int offset)
|
||||
estate.toread, estate.curaddr);
|
||||
#endif
|
||||
/* Save where we are loading this... */
|
||||
symstr_load = phys_to_virt(estate.curaddr);
|
||||
symstr_load = estate.curaddr;
|
||||
|
||||
*((long *)phys_to_virt(estate.curaddr)) = estate.toread;
|
||||
estate.curaddr += sizeof(long);
|
||||
@ -290,7 +290,7 @@ static void elf_freebsd_boot(unsigned long entry)
|
||||
/* Assumes size of long is a power of 2... */
|
||||
bsdinfo.bi_esymtab = (symstr_load +
|
||||
sizeof(long) +
|
||||
*((long *)symstr_load) +
|
||||
*((long *)phys_to_virt(symstr_load)) +
|
||||
sizeof(long) - 1) & ~(sizeof(long) - 1);
|
||||
|
||||
/* Where we will build the meta data... */
|
||||
|
||||
@ -16,4 +16,16 @@ typedef signed long long int64_t;
|
||||
|
||||
typedef unsigned long physaddr_t;
|
||||
|
||||
typedef signed char s8;
|
||||
typedef unsigned char u8;
|
||||
|
||||
typedef signed short s16;
|
||||
typedef unsigned short u16;
|
||||
|
||||
typedef signed int s32;
|
||||
typedef unsigned int u32;
|
||||
|
||||
typedef signed long long s64;
|
||||
typedef unsigned long long u64;
|
||||
|
||||
#endif /* STDINT_H */
|
||||
|
||||
@ -13,4 +13,16 @@ typedef signed short int16_t;
|
||||
typedef signed int int32_t;
|
||||
typedef signed long int64_t;
|
||||
|
||||
typedef signed char s8;
|
||||
typedef unsigned char u8;
|
||||
|
||||
typedef signed short s16;
|
||||
typedef unsigned short u16;
|
||||
|
||||
typedef signed int s32;
|
||||
typedef unsigned int u32;
|
||||
|
||||
typedef signed long s64;
|
||||
typedef unsigned long u64;
|
||||
|
||||
#endif /* STDINT_H */
|
||||
|
||||
@ -74,6 +74,9 @@ void print_config ( void ) {
|
||||
#ifdef DOWNLOAD_PROTO_TFTP
|
||||
"TFTP "
|
||||
#endif
|
||||
#ifdef DOWNLOAD_PROTO_FSP
|
||||
"FSP "
|
||||
#endif
|
||||
#ifdef DOWNLOAD_PROTO_NFS
|
||||
"NFS "
|
||||
#endif
|
||||
|
||||
@ -61,10 +61,6 @@ static void t3c515_wait(unsigned int nticks)
|
||||
|
||||
/* TJL definations */
|
||||
#define HZ 100
|
||||
#define u16 unsigned short
|
||||
#define u32 unsigned long
|
||||
#define s16 signed short
|
||||
#define s32 signed long
|
||||
static int if_port;
|
||||
static struct corkscrew_private *vp;
|
||||
/* Brought directly from 3c515.c by Becker */
|
||||
|
||||
@ -50,13 +50,6 @@
|
||||
|
||||
#define TX_TIME_OUT 2*TICKS_PER_SEC
|
||||
|
||||
typedef unsigned char u8;
|
||||
typedef signed char s8;
|
||||
typedef unsigned short u16;
|
||||
typedef signed short s16;
|
||||
typedef unsigned int u32;
|
||||
typedef signed int s32;
|
||||
|
||||
/* Register offsets for davicom device */
|
||||
enum davicom_offsets {
|
||||
CSR0=0, CSR1=0x08, CSR2=0x10, CSR3=0x18, CSR4=0x20, CSR5=0x28,
|
||||
|
||||
@ -413,13 +413,6 @@ static char *adapter_name[] = {
|
||||
#define ALIGN8 ((u32)8 - 1) /* 2 longword (quadword) align */
|
||||
#define ALIGN ALIGN8 /* Keep the LANCE happy... */
|
||||
|
||||
typedef long s32;
|
||||
typedef unsigned long u32;
|
||||
typedef short s16;
|
||||
typedef unsigned short u16;
|
||||
typedef char s8;
|
||||
typedef unsigned char u8;
|
||||
|
||||
/*
|
||||
** The DEPCA Rx and Tx ring descriptors.
|
||||
*/
|
||||
|
||||
@ -51,13 +51,6 @@
|
||||
#define dprintf(x)
|
||||
#endif
|
||||
|
||||
typedef unsigned char u8;
|
||||
typedef signed char s8;
|
||||
typedef unsigned short u16;
|
||||
typedef signed short s16;
|
||||
typedef unsigned int u32;
|
||||
typedef signed int s32;
|
||||
|
||||
/* Condensed operations for readability. */
|
||||
#define virt_to_le32desc(addr) cpu_to_le32(virt_to_bus(addr))
|
||||
#define le32desc_to_virt(addr) bus_to_virt(le32_to_cpu(addr))
|
||||
|
||||
@ -18,6 +18,12 @@ Be careful with seating the EPROM as the socket on my board actually
|
||||
has 34 pins, the top row of 2 are not used.
|
||||
***************************************************************************/
|
||||
|
||||
/*
|
||||
|
||||
timlegge 2005-05-18 remove the relocation changes cards that
|
||||
write directly to the hardware don't need it
|
||||
*/
|
||||
|
||||
/*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
@ -257,8 +263,8 @@ static unsigned eeprom_reg = EEPROM_REG_PRO;
|
||||
#define eeprom_delay() { udelay(40); }
|
||||
#define EE_READ_CMD (6 << 6)
|
||||
|
||||
/* do a full reset */
|
||||
#define eepro_full_reset(ioaddr) outb(RESET_CMD, ioaddr); udelay(40);
|
||||
/* do a full reset; data sheet asks for 250us delay */
|
||||
#define eepro_full_reset(ioaddr) outb(RESET_CMD, ioaddr); udelay(255);
|
||||
|
||||
/* do a nice reset */
|
||||
#define eepro_sel_reset(ioaddr) { \
|
||||
@ -320,13 +326,15 @@ static void eepro_reset(struct nic *nic)
|
||||
eepro_sw2bank0(nic->ioaddr); /* Switch back to bank 0 */
|
||||
eepro_clear_int(nic->ioaddr);
|
||||
/* Initialise RCV */
|
||||
rx_start = (unsigned int)bus_to_virt(RCV_LOWER_LIMIT << 8);
|
||||
outw(RCV_LOWER_LIMIT << 8, nic->ioaddr + RCV_BAR);
|
||||
outw(rx_start = (RCV_LOWER_LIMIT << 8), nic->ioaddr + RCV_BAR);
|
||||
outw(((RCV_UPPER_LIMIT << 8) | 0xFE), nic->ioaddr + RCV_STOP);
|
||||
/* Make sure 1st poll won't find a valid packet header */
|
||||
outw((RCV_LOWER_LIMIT << 8), nic->ioaddr + HOST_ADDRESS_REG);
|
||||
outw(0, nic->ioaddr + IO_PORT);
|
||||
/* Intialise XMT */
|
||||
outw((XMT_LOWER_LIMIT << 8), nic->ioaddr + xmt_bar);
|
||||
eepro_sel_reset(nic->ioaddr);
|
||||
tx_start = tx_end = (unsigned int)bus_to_virt(XMT_LOWER_LIMIT << 8);
|
||||
tx_start = tx_end = (XMT_LOWER_LIMIT << 8);
|
||||
tx_last = 0;
|
||||
eepro_en_rx(nic->ioaddr);
|
||||
}
|
||||
@ -336,7 +344,7 @@ POLL - Wait for a frame
|
||||
***************************************************************************/
|
||||
static int eepro_poll(struct nic *nic, int retrieve)
|
||||
{
|
||||
unsigned int rcv_car = virt_to_bus((void *)rx_start);
|
||||
unsigned int rcv_car = rx_start;
|
||||
unsigned int rcv_event, rcv_status, rcv_next_frame, rcv_size;
|
||||
|
||||
/* return true if there's an ethernet packet ready to read */
|
||||
@ -380,8 +388,12 @@ static int eepro_poll(struct nic *nic, int retrieve)
|
||||
}
|
||||
#endif
|
||||
nic->packetlen = rcv_size;
|
||||
rcv_car = virt_to_bus((void *) (rx_start + RCV_HEADER + rcv_size));
|
||||
rx_start = (unsigned int)bus_to_virt(rcv_next_frame << 8);
|
||||
rcv_car = (rx_start + RCV_HEADER + rcv_size);
|
||||
rx_start = rcv_next_frame;
|
||||
/*
|
||||
hex_dump(rcv_car, nic->packetlen);
|
||||
*/
|
||||
|
||||
if (rcv_car == 0)
|
||||
rcv_car = ((RCV_UPPER_LIMIT << 8) | 0xff);
|
||||
outw(rcv_car - 1, nic->ioaddr + RCV_STOP);
|
||||
@ -455,7 +467,7 @@ static void eepro_disable ( struct nic *nic, struct isa_device *isa __unused ) {
|
||||
eepro_sw2bank0(nic->ioaddr); /* Switch to bank 0 */
|
||||
/* Flush the Tx and disable Rx */
|
||||
outb(STOP_RCV_CMD, nic->ioaddr);
|
||||
tx_start = tx_end = (unsigned int) (bus_to_virt(XMT_LOWER_LIMIT << 8));
|
||||
tx_start = tx_end = (XMT_LOWER_LIMIT << 8);
|
||||
tx_last = 0;
|
||||
/* Reset the 82595 */
|
||||
eepro_full_reset(nic->ioaddr);
|
||||
|
||||
@ -110,13 +110,6 @@
|
||||
|
||||
static int ioaddr;
|
||||
|
||||
typedef unsigned char u8;
|
||||
typedef signed char s8;
|
||||
typedef unsigned short u16;
|
||||
typedef signed short s16;
|
||||
typedef unsigned int u32;
|
||||
typedef signed int s32;
|
||||
|
||||
enum speedo_offsets {
|
||||
SCBStatus = 0, SCBCmd = 2, /* Rx/Command Unit command and status. */
|
||||
SCBPointer = 4, /* General purpose pointer. */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -30,13 +30,6 @@
|
||||
/* to get the PCI support functions, if this is a PCI NIC */
|
||||
#include "pci.h"
|
||||
|
||||
typedef unsigned char u8;
|
||||
typedef signed char s8;
|
||||
typedef unsigned short u16;
|
||||
typedef signed short s16;
|
||||
typedef unsigned int u32;
|
||||
typedef signed int s32;
|
||||
|
||||
/* Condensed operations for readability. */
|
||||
#define virt_to_le32desc(addr) cpu_to_le32(virt_to_bus(addr))
|
||||
#define le32desc_to_virt(addr) bus_to_virt(le32_to_cpu(addr))
|
||||
|
||||
@ -71,13 +71,6 @@
|
||||
|
||||
#define NUM_RX_DESC 4 /* Number of Rx descriptor registers. */
|
||||
|
||||
typedef uint8_t u8;
|
||||
typedef int8_t s8;
|
||||
typedef uint16_t u16;
|
||||
typedef int16_t s16;
|
||||
typedef uint32_t u32;
|
||||
typedef int32_t s32;
|
||||
|
||||
/* helpful macroes if on a big_endian machine for changing byte order.
|
||||
not strictly needed on Intel */
|
||||
#define get_unaligned(ptr) (*(ptr))
|
||||
|
||||
@ -53,13 +53,6 @@
|
||||
#define dprintf(x)
|
||||
#endif
|
||||
|
||||
typedef unsigned char u8;
|
||||
typedef signed char s8;
|
||||
typedef unsigned short u16;
|
||||
typedef signed short s16;
|
||||
typedef unsigned int u32;
|
||||
typedef signed int s32;
|
||||
|
||||
#define HZ 100
|
||||
|
||||
/* Condensed operations for readability. */
|
||||
|
||||
@ -54,13 +54,6 @@
|
||||
#define drv_version "v1.3"
|
||||
#define drv_date "03-29-2004"
|
||||
|
||||
typedef unsigned char u8;
|
||||
typedef signed char s8;
|
||||
typedef unsigned short u16;
|
||||
typedef signed short s16;
|
||||
typedef unsigned int u32;
|
||||
typedef signed int s32;
|
||||
|
||||
static u32 ioaddr; /* Globally used for the card's io address */
|
||||
static struct nic_operations pcnet32_operations;
|
||||
static struct pci_driver pcnet32_driver;
|
||||
|
||||
@ -52,13 +52,6 @@
|
||||
#define drv_version "v1.6"
|
||||
#define drv_date "03-27-2004"
|
||||
|
||||
typedef unsigned char u8;
|
||||
typedef signed char s8;
|
||||
typedef unsigned short u16;
|
||||
typedef signed short s16;
|
||||
typedef unsigned int u32;
|
||||
typedef signed int s32;
|
||||
|
||||
#define HZ 1000
|
||||
|
||||
static u32 ioaddr;
|
||||
|
||||
@ -363,13 +363,6 @@ enum sis630_revision_id {
|
||||
|
||||
#define NUM_RX_DESC 4 /* Number of Rx descriptor registers. */
|
||||
|
||||
typedef unsigned char u8;
|
||||
typedef signed char s8;
|
||||
typedef unsigned short u16;
|
||||
typedef signed short s16;
|
||||
typedef unsigned int u32;
|
||||
typedef signed int s32;
|
||||
|
||||
/* Time in ticks before concluding the transmitter is hung. */
|
||||
#define TX_TIMEOUT (4*TICKS_PER_SEC)
|
||||
|
||||
|
||||
@ -52,13 +52,6 @@
|
||||
#define drv_version "v1.12"
|
||||
#define drv_date "2004-03-21"
|
||||
|
||||
typedef unsigned char u8;
|
||||
typedef signed char s8;
|
||||
typedef unsigned short u16;
|
||||
typedef signed short s16;
|
||||
typedef unsigned int u32;
|
||||
typedef signed int s32;
|
||||
|
||||
#define HZ 100
|
||||
|
||||
/* Condensed operations for readability. */
|
||||
|
||||
@ -9,6 +9,7 @@
|
||||
/* 11-13-2003 timlegge Fix Issue with NetGear GA302T
|
||||
* 11-18-2003 ebiederm Generalize NetGear Fix to what the code was supposed to be.
|
||||
* 01-06-2005 Alf (Frederic Olivie) Add Dell bcm 5751 (0x1677) support
|
||||
* 04-15-2005 Martin Vogt Add Fujitsu Siemens Computer (FSC) 0x1734 bcm 5751 0x105d support
|
||||
*/
|
||||
|
||||
#include "etherboot.h"
|
||||
@ -2413,6 +2414,9 @@ static struct subsys_tbl_ent subsys_id_to_phy_id[] = {
|
||||
{ PCI_VENDOR_ID_DELL, 0x0109, PHY_ID_BCM5411 }, /* MERLOT */
|
||||
{ PCI_VENDOR_ID_DELL, 0x010a, PHY_ID_BCM5411 }, /* SLIM_MERLOT */
|
||||
{ PCI_VENDOR_ID_DELL, 0x0179, PHY_ID_BCM5751 }, /* EtherXpress */
|
||||
|
||||
/* Fujitsu Siemens Computer */
|
||||
{ PCI_VENDOR_ID_FSC, 0x105d, PHY_ID_BCM5751 }, /* Futro C200 */
|
||||
|
||||
/* Compaq boards. */
|
||||
{ PCI_VENDOR_ID_COMPAQ, 0x007c, PHY_ID_BCM5701 }, /* BANSHEE */
|
||||
|
||||
@ -2156,7 +2156,7 @@ struct tg3 {
|
||||
((X) == PHY_ID_BCM5400 || (X) == PHY_ID_BCM5401 || \
|
||||
(X) == PHY_ID_BCM5411 || (X) == PHY_ID_BCM5701 || \
|
||||
(X) == PHY_ID_BCM5703 || (X) == PHY_ID_BCM5704 || \
|
||||
(X) == PHY_ID_BCM5705 || (X) == PHY_ID_BCM5751 || \
|
||||
(X) == PHY_ID_BCM5705 || (X) == PHY_ID_BCM5750 || (X) == PHY_ID_BCM5751 || \
|
||||
(X) == PHY_ID_BCM8002 || (X) == PHY_ID_SERDES)
|
||||
|
||||
unsigned long regs;
|
||||
|
||||
@ -34,22 +34,10 @@
|
||||
* Indent Style: indent -kr -i8
|
||||
***************************************************************************/
|
||||
|
||||
/*
|
||||
#include <asm/io.h>
|
||||
#include <asm/types.h>
|
||||
#include <linux/netdevice.h>
|
||||
*/
|
||||
|
||||
typedef unsigned char u8;
|
||||
typedef signed char s8;
|
||||
typedef unsigned short u16;
|
||||
typedef signed short s16;
|
||||
typedef unsigned int u32;
|
||||
typedef signed int s32;
|
||||
/*****************************************************************
|
||||
* TLan Definitions
|
||||
*
|
||||
****************************************************************/
|
||||
/*****************************************************************
|
||||
* TLan Definitions
|
||||
*
|
||||
****************************************************************/
|
||||
|
||||
#define FALSE 0
|
||||
#define TRUE 1
|
||||
|
||||
@ -48,6 +48,8 @@
|
||||
/*********************************************************************/
|
||||
|
||||
/*
|
||||
08 Feb 2005 Ramesh Chander chhabaramesh at yahoo.co.in added table entries
|
||||
for SGThomson STE10/100A
|
||||
07 Sep 2003 timlegge Multicast Support Added
|
||||
11 Apr 2001 mdc [patch to etherboot 4.7.24]
|
||||
Major rewrite to include Linux tulip driver media detection
|
||||
@ -118,13 +120,6 @@ static int tulip_debug = 2; /* 1 normal messages, 0 quiet .. 7 verbo
|
||||
|
||||
#define TX_TIME_OUT 2*TICKS_PER_SEC
|
||||
|
||||
typedef uint8_t u8;
|
||||
typedef int8_t s8;
|
||||
typedef uint16_t u16;
|
||||
typedef int16_t s16;
|
||||
typedef uint32_t u32;
|
||||
typedef int32_t s32;
|
||||
|
||||
/* helpful macros if on a big_endian machine for changing byte order.
|
||||
not strictly needed on Intel */
|
||||
#define get_unaligned(ptr) (*(ptr))
|
||||
@ -157,7 +152,7 @@ static const char * const medianame[32] = {
|
||||
enum tulip_chips {
|
||||
DC21040=0, DC21041=1, DC21140=2, DC21142=3, DC21143=3,
|
||||
LC82C168, MX98713, MX98715, MX98725, AX88141, AX88140, PNIC2, COMET,
|
||||
COMPEX9881, I21145, XIRCOM
|
||||
COMPEX9881, I21145, XIRCOM, SGThomson, /*Ramesh Chander*/
|
||||
};
|
||||
|
||||
enum pci_id_flags_bits {
|
||||
@ -233,6 +228,8 @@ static const struct pci_id_info pci_id_tbl[] = {
|
||||
TULIP_IOTYPE, 256, MX98715 },
|
||||
{ "3Com 3cSOHO100B-TX (ADMtek Centuar)", { 0x930010b7, 0xffffffff, 0, 0, 0, 0 },
|
||||
TULIP_IOTYPE, TULIP_SIZE, COMET },
|
||||
{ "SG Thomson STE10/100A", { 0x2774104a, 0xffffffff, 0, 0, 0, 0 },
|
||||
TULIP_IOTYPE, 256, COMET }, /*Ramesh Chander*/
|
||||
{ 0, { 0, 0, 0, 0, 0, 0 }, 0, 0, 0 },
|
||||
};
|
||||
|
||||
@ -268,6 +265,7 @@ static struct tulip_chip_table {
|
||||
| HAS_PWRDWN | HAS_NWAY },
|
||||
{ "Xircom tulip work-alike", HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII
|
||||
| HAS_PWRDWN | HAS_NWAY },
|
||||
{ "SGThomson STE10/100A", HAS_MII | MC_HASH_ONLY }, /*Ramesh Chander*/
|
||||
{ 0, 0 },
|
||||
};
|
||||
|
||||
@ -2068,7 +2066,7 @@ PCI_ROM(0x125b, 0x1400, "ax88140", "ASIX AX88140"),
|
||||
PCI_ROM(0x11f6, 0x9881, "rl100tx", "Compex RL100-TX"),
|
||||
PCI_ROM(0x115d, 0x0003, "xircomtulip", "Xircom Tulip"),
|
||||
PCI_ROM(0x104a, 0x0981, "tulip-0981", "Tulip 0x104a 0x0981"),
|
||||
PCI_ROM(0x104a, 0x2774, "tulip-2774", "Tulip 0x104a 0x2774"),
|
||||
PCI_ROM(0x104a, 0x2774, "SGThomson-STE10100A", "Tulip 0x104a 0x2774"), /*Modified by Ramesh Chander*/
|
||||
PCI_ROM(0x1113, 0x9511, "tulip-9511", "Tulip 0x1113 0x9511"),
|
||||
PCI_ROM(0x1186, 0x1561, "tulip-1561", "Tulip 0x1186 0x1561"),
|
||||
PCI_ROM(0x1259, 0xa120, "tulip-a120", "Tulip 0x1259 0xa120"),
|
||||
|
||||
@ -84,13 +84,6 @@
|
||||
|
||||
static const char *w89c840_version = "driver Version 0.94 - December 12, 2003";
|
||||
|
||||
typedef unsigned char u8;
|
||||
typedef signed char s8;
|
||||
typedef unsigned short u16;
|
||||
typedef signed short s16;
|
||||
typedef unsigned int u32;
|
||||
typedef signed int s32;
|
||||
|
||||
/* Linux support functions */
|
||||
#define virt_to_le32desc(addr) virt_to_bus(addr)
|
||||
#define le32desc_to_virt(addr) bus_to_virt(addr)
|
||||
|
||||
@ -319,6 +319,7 @@
|
||||
#define PCI_VENDOR_ID_MORETON 0x15aa
|
||||
#define PCI_VENDOR_ID_ZOLTRIX 0x15b0
|
||||
#define PCI_VENDOR_ID_PDC 0x15e9
|
||||
#define PCI_VENDOR_ID_FSC 0x1734
|
||||
#define PCI_VENDOR_ID_SYMPHONY 0x1c1c
|
||||
#define PCI_VENDOR_ID_TEKRAM 0x1de1
|
||||
#define PCI_VENDOR_ID_3DLABS 0x3d3d
|
||||
|
||||
@ -157,7 +157,7 @@ sub makerom () {
|
||||
# If PXE image, just fill the length field and write it out
|
||||
if ($opts{'x'}) {
|
||||
substr($rom, 2, 1) = chr((length($rom) + 511) / 512);
|
||||
&writerom($ARGV[0], \$rom);
|
||||
writerom($ARGV[0], \$rom);
|
||||
return;
|
||||
}
|
||||
# Size specified with -s overrides value in 3rd byte in image
|
||||
@ -168,7 +168,7 @@ sub makerom () {
|
||||
$romsize = ($filesize + 511) & ~511
|
||||
}
|
||||
} else {
|
||||
$romsize = &getromsize(\$rom);
|
||||
$romsize = getromsize(\$rom);
|
||||
# 0 put there by *loader.S means makerom should pick the size
|
||||
if ($romsize == 0) {
|
||||
# Shrink romsize down to the smallest power of two that will do
|
||||
@ -190,14 +190,16 @@ sub makerom () {
|
||||
}
|
||||
substr($rom, 2, 1) = chr(($romsize / 512) % 256);
|
||||
print "ROM size is $romsize\n" if $opts{'v'};
|
||||
my $identoffset = &addident(\$rom);
|
||||
&pcipnpheaders(\$rom, $identoffset);
|
||||
&undiheaders(\$rom);
|
||||
# set the product string only if we don't have one yet
|
||||
my $pnp_hdr_offset = unpack('v', substr($rom, PNP_PTR_LOC, 2));
|
||||
my $identoffset = substr($rom, $pnp_hdr_offset+PNP_DEVICE_OFF, 2) eq "\0\0" ? addident(\$rom) : undef;
|
||||
pcipnpheaders(\$rom, $identoffset);
|
||||
undiheaders(\$rom);
|
||||
# 3c503 requires last two bytes to be 0x80
|
||||
substr($rom, MINROMSIZE-2, 2) = "\x80\x80"
|
||||
if ($opts{'3'} and $romsize == MINROMSIZE);
|
||||
&checksum(\$rom);
|
||||
&writerom($ARGV[0], \$rom);
|
||||
checksum(\$rom);
|
||||
writerom($ARGV[0], \$rom);
|
||||
}
|
||||
|
||||
sub modrom () {
|
||||
@ -211,16 +213,16 @@ sub modrom () {
|
||||
close(R);
|
||||
defined($filesize) and $filesize >= 3 or die "Cannot get first 3 bytes of file\n";
|
||||
print "$filesize bytes read\n" if $opts{'v'};
|
||||
&pcipnpheaders(\$rom);
|
||||
&undiheaders(\$rom);
|
||||
&checksum(\$rom);
|
||||
&writerom($ARGV[0], \$rom);
|
||||
pcipnpheaders(\$rom, undef);
|
||||
undiheaders(\$rom);
|
||||
checksum(\$rom);
|
||||
writerom($ARGV[0], \$rom);
|
||||
}
|
||||
|
||||
# Main routine. See how we were called and behave accordingly
|
||||
if ($0 =~ m:modrom(\.pl)?$:) {
|
||||
&modrom();
|
||||
modrom();
|
||||
} else {
|
||||
&makerom();
|
||||
makerom();
|
||||
}
|
||||
exit(0);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user