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Adjust EEPROM/flash detection to fit expected manufacturing practice.
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@ -1545,6 +1545,11 @@ static struct efab_mac_operations ef1002_mac_operations = {
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#define FCN_EE_SPI_HDATA0_LBN 0
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#define FCN_EE_SPI_HDATA0_WIDTH 32
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/* VPI configuration register */
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#define FCN_VPD_CONFIG_REG_KER 0x0140
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#define FCN_VPD_9BIT_LBN 1
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#define FCN_VPD_9BIT_WIDTH 1
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/* NIC status register */
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#define FCN_NIC_STAT_REG 0x0200
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#define ONCHIP_SRAM_LBN 16
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@ -2285,6 +2290,9 @@ static int falcon_spi_rw ( struct spi_bus *bus, struct spi_device *device,
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*
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*/
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static void falcon_init_spi ( struct efab_nic *efab ) {
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efab_oword_t reg;
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int eeprom_9bit;
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/* Initialise SPI bus */
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efab->spi.rw = falcon_spi_rw;
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efab->falcon_eeprom.bus = &efab->spi;
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@ -2292,16 +2300,31 @@ static void falcon_init_spi ( struct efab_nic *efab ) {
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efab->falcon_flash.bus = &efab->spi;
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efab->falcon_flash.slave = FCN_EE_SPI_FLASH;
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/* Initialise EEPROM, if present */
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/* Initialise flash if present */
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if ( efab->has_flash ) {
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DBG ( "Flash is present\n" );
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init_at25f1024 ( &efab->falcon_flash );
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init_at25040 ( &efab->falcon_eeprom );
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} else {
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init_mc25xx640 ( &efab->falcon_eeprom );
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/* Falcon's SPI interface cannot support a block size
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* larger than 16, so forcibly reduce it
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*/
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efab->falcon_eeprom.nvs.block_size = 16;
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}
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/* Initialise EEPROM if present */
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if ( efab->has_eeprom ) {
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if ( efab->is_asic ) {
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falcon_read ( efab, ®, FCN_VPD_CONFIG_REG_KER );
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eeprom_9bit = EFAB_OWORD_FIELD ( reg, FCN_VPD_9BIT );
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} else {
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eeprom_9bit = 1;
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}
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if ( eeprom_9bit ) {
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DBG ( "Small EEPROM is present\n" );
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init_at25040 ( &efab->falcon_eeprom );
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} else {
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DBG ( "Large EEPROM is present\n" );
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init_mc25xx640 ( &efab->falcon_eeprom );
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/* Falcon's SPI interface cannot support a block
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size larger than 16, so forcibly reduce it
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*/
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efab->falcon_eeprom.nvs.block_size = 16;
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}
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}
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}
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