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init_fix_up
This commit is contained in:
Udayan Kumar
parent
751cb2e450
commit
334abbde83
@ -79,6 +79,7 @@
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#include <gpxe/spi_bit.h>
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#include <gpxe/threewire.h>
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#include <gpxe/nvo.h>
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#include <mii.h>
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#define TX_RING_SIZE 4
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#define NUM_RX_DESC 4
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@ -122,6 +123,28 @@ struct natsemi_nic {
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struct nvo_block nvo;
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};
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/*
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* Support for fibre connections on Am79C874:
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* This phy needs a special setup when connected to a fibre cable.
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* http://www.amd.com/files/connectivitysolutions/networking/archivednetworking/22235.pdf
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*/
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#define PHYID_AM79C874 0x0022561b
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enum {
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MII_MCTRL = 0x15, /* mode control register */
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MII_FX_SEL = 0x0001, /* 100BASE-FX (fiber) */
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MII_EN_SCRM = 0x0004, /* enable scrambler (tp) */
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};
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/* values we might find in the silicon revision register */
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#define SRR_DP83815_C 0x0302
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#define SRR_DP83815_D 0x0403
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#define SRR_DP83816_A4 0x0504
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#define SRR_DP83816_A5 0x0505
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/* NATSEMI: Offsets to the device registers.
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* Unlike software-only systems, device drivers interact with complex hardware.
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* It's not useful to define symbolic names for every register bit in the
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@ -351,6 +374,143 @@ static void nat_reset ( struct natsemi_nic *nat ) {
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outl ( SavedClkRun, nat->ioaddr + ClkRun );
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}
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static int mdio_read(struct net_device *netdev, int reg) {
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struct natsemi_nic *nat = netdev->priv;
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/* The 83815 series has two ports:
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* - an internal transceiver
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* - an external mii bus
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*/
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return inw(nat->ioaddr+BasicControl+(reg<<2));
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}
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static void mdio_write(struct net_device *netdev, int reg, u16 data) {
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struct natsemi_nic *nat = netdev->priv;
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/* The 83815 series has an internal transceiver; handle separately */
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writew(data, nat->ioaddr+BasicControl+(reg<<2));
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}
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static void init_phy_fixup(struct net_device *netdev) {
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struct natsemi_nic *nat = netdev->priv;
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int i;
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u32 cfg;
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u16 tmp;
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uint16_t advertising;
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int mii;
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/* restore stuff lost when power was out */
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tmp = mdio_read(netdev, MII_BMCR);
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advertising= mdio_read(netdev, MII_ADVERTISE);
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// if (np->autoneg == AUTONEG_ENABLE) {
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/* renegotiate if something changed */
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if ((tmp & BMCR_ANENABLE) == 0
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|| advertising != mdio_read(netdev, MII_ADVERTISE))
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{
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/* turn on autonegotiation and force negotiation */
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tmp |= (BMCR_ANENABLE | BMCR_ANRESTART);
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mdio_write(netdev, MII_ADVERTISE, advertising);
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}
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// } else {
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/* turn off auto negotiation, set speed and duplexity */
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// tmp &= ~(BMCR_ANENABLE | BMCR_SPEED100 | BMCR_FULLDPLX);
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// if (np->speed == SPEED_100)
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/// tmp |= BMCR_SPEED100;
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// if (np->duplex == DUPLEX_FULL)
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// tmp |= BMCR_FULLDPLX;
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/*
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* Note: there is no good way to inform the link partner
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* that our capabilities changed. The user has to unplug
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* and replug the network cable after some changes, e.g.
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* after switching from 10HD, autoneg off to 100 HD,
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* autoneg off.
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*/
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// }
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mdio_write(netdev, MII_BMCR, tmp);
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inl(nat->ioaddr + ChipConfig);
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udelay(1);
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/* find out what phy this is */
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mii = (mdio_read(netdev, MII_PHYSID1) << 16)
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+ mdio_read(netdev, MII_PHYSID2);
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/* handle external phys here */
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switch (mii) {
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case PHYID_AM79C874:
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/* phy specific configuration for fibre/tp operation */
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tmp = mdio_read(netdev, MII_MCTRL);
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tmp &= ~(MII_FX_SEL | MII_EN_SCRM);
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//if (dev->if_port == PORT_FIBRE)
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// tmp |= MII_FX_SEL;
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//else
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tmp |= MII_EN_SCRM;
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mdio_write(netdev, MII_MCTRL, tmp);
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break;
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default:
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break;
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}
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cfg = inl(nat->ioaddr + ChipConfig);
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if (cfg & CfgExtPhy)
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return;
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/* On page 78 of the spec, they recommend some settings for "optimum
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performance" to be done in sequence. These settings optimize some
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of the 100Mbit autodetection circuitry. They say we only want to
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do this for rev C of the chip, but engineers at NSC (Bradley
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Kennedy) recommends always setting them. If you don't, you get
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errors on some autonegotiations that make the device unusable.
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It seems that the DSP needs a few usec to reinitialize after
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the start of the phy. Just retry writing these values until they
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stick.
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*/
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uint32_t srr = inl(nat->ioaddr + SiliconRev);
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int NATSEMI_HW_TIMEOUT = 400;
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for (i=0;i<NATSEMI_HW_TIMEOUT;i++) {
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int dspcfg,dspcfg_1;
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outw(1, nat->ioaddr + PGSEL);
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outw(PMDCSR_VAL, nat->ioaddr + PMDCSR);
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outw(TSTDAT_VAL, nat->ioaddr + TSTDAT);
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dspcfg = (srr <= SRR_DP83815_C)?
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DSPCFG_VAL : (DSPCFG_COEF | readw(nat->ioaddr + DSPCFG));
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outw(dspcfg, nat->ioaddr + DSPCFG);
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outw(SDCFG_VAL, nat->ioaddr + SDCFG);
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outw(0, nat->ioaddr + PGSEL);
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inl(nat->ioaddr + ChipConfig);
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udelay(10);
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outw(1, nat->ioaddr + PGSEL);
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dspcfg_1 = readw(nat->ioaddr + DSPCFG);
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outw(0, nat->ioaddr + PGSEL);
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if (dspcfg == dspcfg_1)
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break;
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}
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if (i==NATSEMI_HW_TIMEOUT) {
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DBG ( "Natsemi: DSPCFG mismatch after retrying for"
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" %d usec.\n", i*10);
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} else {
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DBG ( "NATSEMI: DSPCFG accepted after %d usec.\n",
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i*10);
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}
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/*
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* Enable PHY Specific event based interrupts. Link state change
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* and Auto-Negotiation Completion are among the affected.
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* Read the intr status to clear it (needed for wake events).
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*/
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inw(nat->ioaddr + MIntrStatus);
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//MICRIntEn = 0x2
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outw(0x2, nat->ioaddr + MIntrCtrl);
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}
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/*
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* Patch up for fixing CRC errors.
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* adapted from linux natsemi driver
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*
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*/
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static void do_cable_magic ( struct net_device *netdev ) {
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struct natsemi_nic *nat = netdev->priv;
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uint16_t data;
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@ -478,6 +638,7 @@ static int nat_open ( struct net_device *netdev ) {
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* testing this feature is required or not
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*/
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do_cable_magic ( netdev );
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init_phy_fixup ( netdev );
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/* mask the interrupts. note interrupt is not enabled here
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