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https://github.com/xcat2/xNBA.git
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[sis190] Add sis190/191 ethernet driver
Tested-by: Paul Hackett <paulfxhackett@gmail.com> Signed-off-by: Marty Connor <mdc@etherboot.org>
This commit is contained in:
Thomas Miletich
Marty Connor
parent
04cb1cde5c
commit
251926f631
1179
src/drivers/net/sis190.c
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1179
src/drivers/net/sis190.c
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File diff suppressed because it is too large
Load Diff
310
src/drivers/net/sis190.h
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310
src/drivers/net/sis190.h
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@ -0,0 +1,310 @@
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#ifndef __SIS190_H__
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#define __SIS190_H__
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#include <stdint.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <stddef.h>
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#include <string.h>
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#include <unistd.h>
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#include <assert.h>
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#include <byteswap.h>
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#include <errno.h>
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#include <mii.h>
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#include <gpxe/ethernet.h>
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#include <gpxe/if_ether.h>
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#include <gpxe/io.h>
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#include <gpxe/iobuf.h>
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#include <gpxe/malloc.h>
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#include <gpxe/netdevice.h>
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#include <gpxe/pci.h>
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#include <gpxe/timer.h>
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#define PCI_VENDOR_ID_SI 0x1039
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#define PHY_MAX_ADDR 32
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#define PHY_ID_ANY 0x1f
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#define MII_REG_ANY 0x1f
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#define DRV_VERSION "1.3"
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#define DRV_NAME "sis190"
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#define SIS190_DRIVER_NAME DRV_NAME " Gigabit Ethernet driver " DRV_VERSION
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#define PFX DRV_NAME ": "
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#define sis190_rx_quota(count, quota) count
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#define NUM_TX_DESC 8 /* [8..1024] */
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#define NUM_RX_DESC 8 /* [8..8192] */
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#define TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc))
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#define RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc))
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#define RX_BUF_SIZE 1536
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#define RX_BUF_MASK 0xfff8
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#define RING_ALIGNMENT 256
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#define SIS190_REGS_SIZE 0x80
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/* Enhanced PHY access register bit definitions */
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#define EhnMIIread 0x0000
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#define EhnMIIwrite 0x0020
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#define EhnMIIdataShift 16
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#define EhnMIIpmdShift 6 /* 7016 only */
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#define EhnMIIregShift 11
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#define EhnMIIreq 0x0010
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#define EhnMIInotDone 0x0010
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/* Write/read MMIO register */
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#define SIS_W8(reg, val) writeb ((val), ioaddr + (reg))
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#define SIS_W16(reg, val) writew ((val), ioaddr + (reg))
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#define SIS_W32(reg, val) writel ((val), ioaddr + (reg))
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#define SIS_R8(reg) readb (ioaddr + (reg))
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#define SIS_R16(reg) readw (ioaddr + (reg))
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#define SIS_R32(reg) readl (ioaddr + (reg))
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#define SIS_PCI_COMMIT() SIS_R32(IntrControl)
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enum sis190_registers {
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TxControl = 0x00,
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TxDescStartAddr = 0x04,
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rsv0 = 0x08, // reserved
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TxSts = 0x0c, // unused (Control/Status)
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RxControl = 0x10,
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RxDescStartAddr = 0x14,
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rsv1 = 0x18, // reserved
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RxSts = 0x1c, // unused
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IntrStatus = 0x20,
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IntrMask = 0x24,
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IntrControl = 0x28,
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IntrTimer = 0x2c, // unused (Interupt Timer)
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PMControl = 0x30, // unused (Power Mgmt Control/Status)
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rsv2 = 0x34, // reserved
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ROMControl = 0x38,
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ROMInterface = 0x3c,
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StationControl = 0x40,
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GMIIControl = 0x44,
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GIoCR = 0x48, // unused (GMAC IO Compensation)
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GIoCtrl = 0x4c, // unused (GMAC IO Control)
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TxMacControl = 0x50,
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TxLimit = 0x54, // unused (Tx MAC Timer/TryLimit)
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RGDelay = 0x58, // unused (RGMII Tx Internal Delay)
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rsv3 = 0x5c, // reserved
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RxMacControl = 0x60,
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RxMacAddr = 0x62,
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RxHashTable = 0x68,
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// Undocumented = 0x6c,
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RxWolCtrl = 0x70,
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RxWolData = 0x74, // unused (Rx WOL Data Access)
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RxMPSControl = 0x78, // unused (Rx MPS Control)
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rsv4 = 0x7c, // reserved
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};
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enum sis190_register_content {
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/* IntrStatus */
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SoftInt = 0x40000000, // unused
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Timeup = 0x20000000, // unused
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PauseFrame = 0x00080000, // unused
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MagicPacket = 0x00040000, // unused
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WakeupFrame = 0x00020000, // unused
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LinkChange = 0x00010000,
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RxQEmpty = 0x00000080,
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RxQInt = 0x00000040,
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TxQ1Empty = 0x00000020, // unused
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TxQ1Int = 0x00000010,
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TxQ0Empty = 0x00000008, // unused
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TxQ0Int = 0x00000004,
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RxHalt = 0x00000002,
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TxHalt = 0x00000001,
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/* {Rx/Tx}CmdBits */
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CmdReset = 0x10,
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CmdRxEnb = 0x08, // unused
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CmdTxEnb = 0x01,
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RxBufEmpty = 0x01, // unused
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/* Cfg9346Bits */
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Cfg9346_Lock = 0x00, // unused
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Cfg9346_Unlock = 0xc0, // unused
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/* RxMacControl */
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AcceptErr = 0x20, // unused
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AcceptRunt = 0x10, // unused
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AcceptBroadcast = 0x0800,
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AcceptMulticast = 0x0400,
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AcceptMyPhys = 0x0200,
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AcceptAllPhys = 0x0100,
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/* RxConfigBits */
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RxCfgFIFOShift = 13,
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RxCfgDMAShift = 8, // 0x1a in RxControl ?
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/* TxConfigBits */
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TxInterFrameGapShift = 24,
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TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
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LinkStatus = 0x02, // unused
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FullDup = 0x01, // unused
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/* TBICSRBit */
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TBILinkOK = 0x02000000, // unused
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};
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struct TxDesc {
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volatile u32 PSize;
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volatile u32 status;
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volatile u32 addr;
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volatile u32 size;
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};
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struct RxDesc {
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volatile u32 PSize;
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volatile u32 status;
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volatile u32 addr;
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volatile u32 size;
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};
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enum _DescStatusBit {
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/* _Desc.status */
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OWNbit = 0x80000000, // RXOWN/TXOWN
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INTbit = 0x40000000, // RXINT/TXINT
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CRCbit = 0x00020000, // CRCOFF/CRCEN
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PADbit = 0x00010000, // PREADD/PADEN
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/* _Desc.size */
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RingEnd = 0x80000000,
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/* TxDesc.status */
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LSEN = 0x08000000, // TSO ? -- FR
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IPCS = 0x04000000,
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TCPCS = 0x02000000,
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UDPCS = 0x01000000,
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BSTEN = 0x00800000,
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EXTEN = 0x00400000,
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DEFEN = 0x00200000,
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BKFEN = 0x00100000,
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CRSEN = 0x00080000,
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COLEN = 0x00040000,
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THOL3 = 0x30000000,
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THOL2 = 0x20000000,
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THOL1 = 0x10000000,
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THOL0 = 0x00000000,
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WND = 0x00080000,
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TABRT = 0x00040000,
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FIFO = 0x00020000,
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LINK = 0x00010000,
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ColCountMask = 0x0000ffff,
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/* RxDesc.status */
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IPON = 0x20000000,
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TCPON = 0x10000000,
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UDPON = 0x08000000,
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Wakup = 0x00400000,
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Magic = 0x00200000,
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Pause = 0x00100000,
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DEFbit = 0x00200000,
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BCAST = 0x000c0000,
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MCAST = 0x00080000,
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UCAST = 0x00040000,
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/* RxDesc.PSize */
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TAGON = 0x80000000,
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RxDescCountMask = 0x7f000000, // multi-desc pkt when > 1 ? -- FR
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ABORT = 0x00800000,
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SHORT = 0x00400000,
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LIMIT = 0x00200000,
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MIIER = 0x00100000,
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OVRUN = 0x00080000,
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NIBON = 0x00040000,
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COLON = 0x00020000,
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CRCOK = 0x00010000,
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RxSizeMask = 0x0000ffff
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/*
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* The asic could apparently do vlan, TSO, jumbo (sis191 only) and
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* provide two (unused with Linux) Tx queues. No publically
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* available documentation alas.
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*/
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};
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enum sis190_eeprom_access_register_bits {
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EECS = 0x00000001, // unused
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EECLK = 0x00000002, // unused
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EEDO = 0x00000008, // unused
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EEDI = 0x00000004, // unused
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EEREQ = 0x00000080,
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EEROP = 0x00000200,
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EEWOP = 0x00000100 // unused
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};
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/* EEPROM Addresses */
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enum sis190_eeprom_address {
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EEPROMSignature = 0x00,
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EEPROMCLK = 0x01, // unused
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EEPROMInfo = 0x02,
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EEPROMMACAddr = 0x03
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};
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enum sis190_feature {
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F_HAS_RGMII = 1,
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F_PHY_88E1111 = 2,
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F_PHY_BCM5461 = 4
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};
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struct sis190_private {
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void *mmio_addr;
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struct pci_device *pci_device;
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struct net_device *dev;
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u32 cur_rx;
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u32 cur_tx;
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u32 dirty_rx;
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u32 dirty_tx;
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u32 rx_dma;
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u32 tx_dma;
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struct RxDesc *RxDescRing;
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struct TxDesc *TxDescRing;
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struct io_buffer *Rx_iobuf[NUM_RX_DESC];
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struct io_buffer *Tx_iobuf[NUM_TX_DESC];
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struct mii_if_info mii_if;
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struct list_head first_phy;
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u32 features;
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};
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struct sis190_phy {
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struct list_head list;
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int phy_id;
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u16 id[2];
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u16 status;
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u8 type;
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};
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enum sis190_phy_type {
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UNKNOWN = 0x00,
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HOME = 0x01,
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LAN = 0x02,
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MIX = 0x03
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};
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static struct mii_chip_info {
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const char *name;
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u16 id[2];
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unsigned int type;
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u32 feature;
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} mii_chip_table[] = {
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{ "Atheros PHY", { 0x004d, 0xd010 }, LAN, 0 },
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{ "Atheros PHY AR8012", { 0x004d, 0xd020 }, LAN, 0 },
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{ "Broadcom PHY BCM5461", { 0x0020, 0x60c0 }, LAN, F_PHY_BCM5461 },
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{ "Broadcom PHY AC131", { 0x0143, 0xbc70 }, LAN, 0 },
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{ "Agere PHY ET1101B", { 0x0282, 0xf010 }, LAN, 0 },
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{ "Marvell PHY 88E1111", { 0x0141, 0x0cc0 }, LAN, F_PHY_88E1111 },
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{ "Realtek PHY RTL8201", { 0x0000, 0x8200 }, LAN, 0 },
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{ NULL, { 0x00, 0x00 }, 0, 0 }
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};
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static const struct {
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const char *name;
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} sis_chip_info[] = {
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{ "SiS 190 PCI Fast Ethernet adapter" },
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{ "SiS 191 PCI Gigabit Ethernet adapter" },
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};
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static void sis190_phy_task(struct sis190_private *tp);
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static void sis190_free(struct net_device *dev);
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static inline void sis190_init_rxfilter(struct net_device *dev);
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#endif
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@ -114,6 +114,7 @@ FILE_LICENCE ( GPL2_OR_LATER );
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#define ERRFILE_sky2 ( ERRFILE_DRIVER | 0x004f0000 )
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#define ERRFILE_ath5k ( ERRFILE_DRIVER | 0x00500000 )
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#define ERRFILE_atl1e ( ERRFILE_DRIVER | 0x00510000 )
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#define ERRFILE_sis190 ( ERRFILE_DRIVER | 0x00520000 )
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#define ERRFILE_scsi ( ERRFILE_DRIVER | 0x00700000 )
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#define ERRFILE_arbel ( ERRFILE_DRIVER | 0x00710000 )
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