182 lines
6.6 KiB
C
182 lines
6.6 KiB
C
/*
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* Copyright (c) 2008, Google Inc.
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* All rights reserved.
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*
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* Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef __PLATFORM_MSM7X30_GPIO_HW_H
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#define __PLATFORM_MSM7X30_GPIO_HW_H
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#define MSM_GPIO1_BASE 0xAC001000
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#define MSM_GPIO2_BASE 0xAC101000
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#define GPIO1_REG(off) (MSM_GPIO1_BASE + (off))
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#define GPIO2_REG(off) (MSM_GPIO2_BASE + 0x400 + (off))
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/* output value */
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#define GPIO_OUT_0 GPIO1_REG(0x00) /* gpio 15-0 */
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#define GPIO_OUT_1 GPIO2_REG(0x00) /* gpio 43-16 */
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#define GPIO_OUT_2 GPIO1_REG(0x04) /* gpio 67-44 */
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#define GPIO_OUT_3 GPIO1_REG(0x08) /* gpio 94-68 */
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#define GPIO_OUT_4 GPIO1_REG(0x0C) /* gpio 106-95 */
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#define GPIO_OUT_5 GPIO1_REG(0x50) /* gpio 133-107 */
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#define GPIO_OUT_6 GPIO1_REG(0xC4) /* gpio 150-134 */
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#define GPIO_OUT_7 GPIO1_REG(0x214) /* gpio 181-151 */
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/* same pin map as above, output enable */
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#define GPIO_OE_0 GPIO1_REG(0x10)
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#define GPIO_OE_1 GPIO2_REG(0x08)
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#define GPIO_OE_2 GPIO1_REG(0x14)
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#define GPIO_OE_3 GPIO1_REG(0x18)
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#define GPIO_OE_4 GPIO1_REG(0x1C)
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#define GPIO_OE_5 GPIO1_REG(0x54)
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#define GPIO_OE_6 GPIO1_REG(0xC8)
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#define GPIO_OE_7 GPIO1_REG(0x218)
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/* same pin map as above, input read */
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#define GPIO_IN_0 GPIO1_REG(0x34)
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#define GPIO_IN_1 GPIO2_REG(0x20)
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#define GPIO_IN_2 GPIO1_REG(0x38)
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#define GPIO_IN_3 GPIO1_REG(0x3C)
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#define GPIO_IN_4 GPIO1_REG(0x40)
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#define GPIO_IN_5 GPIO1_REG(0x44)
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#define GPIO_IN_6 GPIO1_REG(0xCC)
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#define GPIO_IN_7 GPIO1_REG(0x21C)
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/* same pin map as above, 1=edge 0=level interrup */
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#define GPIO_INT_EDGE_0 GPIO1_REG(0x60)
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#define GPIO_INT_EDGE_1 GPIO2_REG(0x50)
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#define GPIO_INT_EDGE_2 GPIO1_REG(0x64)
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#define GPIO_INT_EDGE_3 GPIO1_REG(0x68)
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#define GPIO_INT_EDGE_4 GPIO1_REG(0x6C)
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#define GPIO_INT_EDGE_5 GPIO1_REG(0xC0)
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#define GPIO_INT_EDGE_6 GPIO1_REG(0xD0)
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#define GPIO_INT_EDGE_7 GPIO1_REG(0x240)
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/* same pin map as above, 1=positive 0=negative */
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#define GPIO_INT_POS_0 GPIO1_REG(0x70)
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#define GPIO_INT_POS_1 GPIO2_REG(0x58)
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#define GPIO_INT_POS_2 GPIO1_REG(0x74)
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#define GPIO_INT_POS_3 GPIO1_REG(0x78)
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#define GPIO_INT_POS_4 GPIO1_REG(0x7C)
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#define GPIO_INT_POS_5 GPIO1_REG(0xBC)
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#define GPIO_INT_POS_6 GPIO1_REG(0xD4)
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#define GPIO_INT_POS_7 GPIO1_REG(0x228)
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/* same pin map as above, interrupt enable */
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#define GPIO_INT_EN_0 GPIO1_REG(0x80)
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#define GPIO_INT_EN_1 GPIO2_REG(0x60)
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#define GPIO_INT_EN_2 GPIO1_REG(0x84)
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#define GPIO_INT_EN_3 GPIO1_REG(0x88)
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#define GPIO_INT_EN_4 GPIO1_REG(0x8C)
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#define GPIO_INT_EN_5 GPIO1_REG(0xB8)
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#define GPIO_INT_EN_6 GPIO1_REG(0xD8)
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#define GPIO_INT_EN_7 GPIO1_REG(0x22C)
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/* same pin map as above, write 1 to clear interrupt */
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#define GPIO_INT_CLEAR_0 GPIO1_REG(0x90)
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#define GPIO_INT_CLEAR_1 GPIO2_REG(0x68)
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#define GPIO_INT_CLEAR_2 GPIO1_REG(0x94)
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#define GPIO_INT_CLEAR_3 GPIO1_REG(0x98)
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#define GPIO_INT_CLEAR_4 GPIO1_REG(0x9C)
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#define GPIO_INT_CLEAR_5 GPIO1_REG(0xB4)
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#define GPIO_INT_CLEAR_6 GPIO1_REG(0xDC)
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#define GPIO_INT_CLEAR_7 GPIO1_REG(0x230)
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/* same pin map as above, 1=interrupt pending */
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#define GPIO_INT_STATUS_0 GPIO1_REG(0xA0)
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#define GPIO_INT_STATUS_1 GPIO2_REG(0x70)
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#define GPIO_INT_STATUS_2 GPIO1_REG(0xA4)
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#define GPIO_INT_STATUS_3 GPIO1_REG(0xA8)
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#define GPIO_INT_STATUS_4 GPIO1_REG(0xAC)
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#define GPIO_INT_STATUS_5 GPIO1_REG(0xB0)
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#define GPIO_INT_STATUS_6 GPIO1_REG(0xE0)
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#define GPIO_INT_STATUS_7 GPIO1_REG(0x234)
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#define GPIO_OUT_VAL_REG_BASE 0xABC00000
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#define GPIO_ALT_FUNC_PAGE_REG (GPIO_OUT_VAL_REG_BASE + 0x20)
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#define GPIO_ALT_FUNC_CFG_REG (GPIO_OUT_VAL_REG_BASE + 0x24)
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/* GPIO TLMM: Direction */
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#define GPIO_INPUT 0
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#define GPIO_OUTPUT 1
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/* GPIO TLMM: Pullup/Pulldown */
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#define GPIO_NO_PULL 0
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#define GPIO_PULL_DOWN 1
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#define GPIO_KEEPER 2
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#define GPIO_PULL_UP 3
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/* GPIO TLMM: Drive Strength */
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#define GPIO_2MA 0
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#define GPIO_4MA 1
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#define GPIO_6MA 2
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#define GPIO_8MA 3
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#define GPIO_10MA 4
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#define GPIO_12MA 5
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#define GPIO_14MA 6
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#define GPIO_16MA 7
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#define GPIO38_GPIO_CNTRL 0x175
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/* GPIO TLMM: Status */
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#define GPIO_ENABLE 0
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#define GPIO_DISABLE 1
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#define GPIO_CFG(gpio, func, dir, pull, drvstr) \
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((((gpio) & 0x3FF) << 4) | \
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((func) & 0xf) | \
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(((dir) & 0x1) << 14) | \
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(((pull) & 0x3) << 15) | \
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(((drvstr) & 0xF) << 17))
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/**
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* struct msm_gpio - GPIO pin description
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* @gpio_cfg - configuration bitmap, as per gpio_tlmm_config()
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* @label - textual label
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*
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* Usually, GPIO's are operated by sets.
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* This struct accumulate all GPIO information in single source
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* and facilitete group operations provided by msm_gpios_xxx()
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*/
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struct msm_gpio {
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unsigned gpio_cfg;
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const char *label;
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};
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/**
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* extract GPIO pin from bit-field used for gpio_tlmm_config
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*/
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#define GPIO_PIN(gpio_cfg) (((gpio_cfg) >> 4) & 0x3ff)
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#define GPIO_FUNC(gpio_cfg) (((gpio_cfg) >> 0) & 0xf)
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#define GPIO_DIR(gpio_cfg) (((gpio_cfg) >> 14) & 0x1)
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#define GPIO_PULL(gpio_cfg) (((gpio_cfg) >> 15) & 0x3)
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#define GPIO_DRVSTR(gpio_cfg) (((gpio_cfg) >> 17) & 0xf)
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#endif
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