101 lines
3.1 KiB
C
101 lines
3.1 KiB
C
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/*
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* Copyright (c) 2008 Travis Geiselbrecht
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files
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* (the "Software"), to deal in the Software without restriction,
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* including without limitation the rights to use, copy, modify, merge,
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* publish, distribute, sublicense, and/or sell copies of the Software,
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* and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <debug.h>
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#include <sys/types.h>
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#include <compiler.h>
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#include <arch.h>
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#include <arch/arm.h>
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#include <arch/arm/mmu.h>
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#if ARM_WITH_MMU
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#define MB (1024*1024)
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/* the location of the table may be brought in from outside */
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#if WITH_EXTERNAL_TRANSLATION_TABLE
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#if !defined(MMU_TRANSLATION_TABLE_ADDR)
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#error must set MMU_TRANSLATION_TABLE_ADDR in the make configuration
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#endif
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static uint32_t *tt = (void *)MMU_TRANSLATION_TABLE_ADDR;
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#else
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/* the main translation table */
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static uint32_t tt[4096] __ALIGNED(16384);
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#endif
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void arm_mmu_map_section(addr_t paddr, addr_t vaddr, uint flags)
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{
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int index;
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uint AP;
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uint CB;
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uint TEX = 0;
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#if defined(PLATFORM_MSM7K)
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if ((paddr >= 0x88000000) && (paddr < 0xD0000000)) {
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/* peripherals in the 0x88000000 - 0xD0000000 range must
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* be mapped as DEVICE NON-SHARED: TEX=2, C=0, B=0
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*/
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TEX = 2;
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flags &= (~(MMU_FLAG_CACHED | MMU_FLAG_BUFFERED));
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}
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#endif
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AP = (flags & MMU_FLAG_READWRITE) ? 0x3 : 0x2;
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CB = ((flags & MMU_FLAG_CACHED) ? 0x2 : 0) | ((flags & MMU_FLAG_BUFFERED) ? 0x1 : 0);
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index = vaddr / MB;
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// section mapping
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tt[index] = (paddr & ~(MB-1)) | (TEX << 12) | (AP << 10) | (0<<5) | (CB << 2) | (2<<0);
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arm_invalidate_tlb();
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}
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void arm_mmu_init(void)
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{
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int i;
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/* set some mmu specific control bits */
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arm_write_cr1(arm_read_cr1() & ~((1<<29)|(1<<28)|(1<<0))); // access flag disabled, TEX remap disabled, mmu disabled
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/* set up an identity-mapped translation table with cache disabled */
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for (i=0; i < 4096; i++) {
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arm_mmu_map_section(i * MB, i * MB, MMU_FLAG_READWRITE); // map everything uncached
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}
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/* set up the translation table base */
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arm_write_ttbr((uint32_t)tt);
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/* set up the domain access register */
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arm_write_dacr(0x00000001);
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/* turn on the mmu */
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arm_write_cr1(arm_read_cr1() | 0x1);
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}
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void arch_disable_mmu(void)
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{
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arm_write_cr1(arm_read_cr1() & ~(1<<0)); // access flag disabled, TEX remap disabled, mmu disabled
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}
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#endif // ARM_WITH_MMU
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