189 lines
4.9 KiB
Makefile
189 lines
4.9 KiB
Makefile
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-include local.mk
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include make/macros.mk
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# If one of our goals (from the commandline) happens to have a
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# matching project/goal.mk, then we should re-invoke make with
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# that project name specified...
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project-name := $(firstword $(MAKECMDGOALS))
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ifneq ($(project-name),)
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ifneq ($(wildcard project/$(project-name).mk),)
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do-nothing := 1
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$(MAKECMDGOALS) _all: make-make
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make-make:
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@PROJECT=$(project-name) $(MAKE) $(filter-out $(project-name), $(MAKECMDGOALS))
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endif
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endif
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ifeq ($(do-nothing),)
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ifeq ($(PROJECT),)
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$(error No project specified. Use "make projectname" or put "PROJECT := projectname" in local.mk)
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endif
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DEBUG ?= 0
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ifndef $(BOOTLOADER_OUT)
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BOOTLOADER_OUT := .
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endif
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LK_TOP_DIR:= .
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BUILDDIR := $(BOOTLOADER_OUT)/build-$(PROJECT)
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OUTBIN := $(BUILDDIR)/lk.bin
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OUTELF := $(BUILDDIR)/lk
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CONFIGHEADER := $(BUILDDIR)/config.h
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INCLUDES := -I$(BUILDDIR) -Iinclude
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CFLAGS := -O2 -g -fno-builtin -finline -W -Wall -Wno-multichar -Wno-unused-parameter -Wno-unused-function -include $(CONFIGHEADER)
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#CFLAGS += -Werror
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ifeq ($(EMMC_BOOT),1)
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CFLAGS += -D_EMMC_BOOT=1
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endif
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# When the host arch is ARM, ensure stack protection code is not emitted since
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# it's not supported by the bootloader's libc
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ifneq ($(shell uname -m | grep "arm.*"),)
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CFLAGS += -fno-stack-protector
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endif
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CPPFLAGS := -fno-exceptions -fno-rtti -fno-threadsafe-statics
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#CPPFLAGS += -Weffc++
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ASMFLAGS := -DASSEMBLY
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LDFLAGS :=
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CFLAGS += -ffunction-sections -fdata-sections
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LDFLAGS += -gc-sections
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# top level rule
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all:: $(OUTBIN) $(OUTELF).lst $(OUTELF).debug.lst $(OUTELF).sym $(OUTELF).size APPSBOOTHEADER
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# the following three object lists are identical except for the ordering
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# which is bootobjs, kobjs, objs
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BOOTOBJS :=
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OBJS :=
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# a linker script needs to be declared in one of the project/target/platform files
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LINKER_SCRIPT :=
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# anything you add here will be deleted in make clean
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GENERATED := $(CONFIGHEADER)
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# anything added to DEFINES will be put into $(BUILDDIR)/config.h
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DEFINES := LK=1
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# Anything added to SRCDEPS will become a dependency of every source file in the system.
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# Useful for header files that may be included by one or more source files.
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SRCDEPS := $(CONFIGHEADER)
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# these need to be filled out by the project/target/platform rules.mk files
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TARGET :=
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PLATFORM :=
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ARCH :=
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ALLMODULES :=
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MODULES :=
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# any rules you put here will also be built by the system before considered being complete
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EXTRA_BUILDDEPS :=
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# any rules you put here will be depended on in clean builds
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EXTRA_CLEANDEPS :=
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include project/$(PROJECT).mk
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include target/$(TARGET)/rules.mk
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include target/$(TARGET)/tools/makefile
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include platform/$(PLATFORM)/rules.mk
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include arch/$(ARCH)/rules.mk
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include platform/rules.mk
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include target/rules.mk
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include kernel/rules.mk
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include dev/rules.mk
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include app/rules.mk
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# recursively include any modules in the MODULE variable, leaving a trail of included
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# modules in the ALLMODULES list
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include make/module.mk
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# any extra top level build dependencies that someone declared
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all:: $(EXTRA_BUILDDEPS)
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ALLOBJS := \
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$(BOOTOBJS) \
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$(OBJS)
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# add some automatic configuration defines
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DEFINES += \
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BOARD=$(PROJECT) \
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PROJECT_$(PROJECT)=1 \
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TARGET_$(TARGET)=1 \
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PLATFORM_$(PLATFORM)=1 \
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ARCH_$(ARCH)=1 \
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$(addsuffix =1,$(addprefix WITH_,$(ALLMODULES)))
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# debug build?
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ifneq ($(DEBUG),)
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DEFINES += \
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DEBUG=$(DEBUG)
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endif
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ALLOBJS := $(addprefix $(BUILDDIR)/,$(ALLOBJS))
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DEPS := $(ALLOBJS:%o=%d)
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# default to no ccache
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CCACHE ?=
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CC := $(CCACHE) $(TOOLCHAIN_PREFIX)gcc
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LD := $(TOOLCHAIN_PREFIX)ld
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OBJDUMP := $(TOOLCHAIN_PREFIX)objdump
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OBJCOPY := $(TOOLCHAIN_PREFIX)objcopy
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CPPFILT := $(TOOLCHAIN_PREFIX)c++filt
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SIZE := $(TOOLCHAIN_PREFIX)size
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NM := $(TOOLCHAIN_PREFIX)nm
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# comment out or override if you want to see the full output of each command
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NOECHO ?= @
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# the logic to compile and link stuff is in here
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include make/build.mk
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clean: $(EXTRA_CLEANDEPS)
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rm -f $(ALLOBJS) $(DEPS) $(GENERATED) $(OUTBIN) $(OUTELF) $(OUTELF).lst
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spotless:
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rm -rf build-*
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install: all
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scp $(OUTBIN) 192.168.0.4:/tftproot
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# generate a config.h file with all of the DEFINES laid out in #define format
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configheader:
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$(CONFIGHEADER): configheader
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@$(MKDIR)
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@echo generating $@
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@rm -f $(CONFIGHEADER).tmp; \
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echo \#ifndef __CONFIG_H > $(CONFIGHEADER).tmp; \
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echo \#define __CONFIG_H >> $(CONFIGHEADER).tmp; \
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for d in `echo $(DEFINES) | tr [:lower:] [:upper:]`; do \
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echo "#define $$d" | sed "s/=/\ /g;s/-/_/g;s/\//_/g" >> $(CONFIGHEADER).tmp; \
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done; \
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echo \#endif >> $(CONFIGHEADER).tmp; \
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if [ -f "$(CONFIGHEADER)" ]; then \
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if cmp "$(CONFIGHEADER).tmp" "$(CONFIGHEADER)"; then \
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rm -f $(CONFIGHEADER).tmp; \
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else \
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mv $(CONFIGHEADER).tmp $(CONFIGHEADER); \
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fi \
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else \
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mv $(CONFIGHEADER).tmp $(CONFIGHEADER); \
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fi
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# Empty rule for the .d files. The above rules will build .d files as a side
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# effect. Only works on gcc 3.x and above, however.
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%.d:
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ifeq ($(filter $(MAKECMDGOALS), clean), )
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-include $(DEPS)
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endif
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.PHONY: configheader
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endif
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