249 lines
8.0 KiB
C
249 lines
8.0 KiB
C
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/*
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* Copyright (c) 2008, Google Inc.
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* All rights reserved.
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*
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* Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Google, Inc. nor the names of its contributors
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* may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef __DEV_GPIO_KEYPAD_H
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#define __DEV_GPIO_KEYPAD_H
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#include <sys/types.h>
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/* unset: drive active output low, set: drive active output high */
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#define GPIOKPF_ACTIVE_HIGH (1U << 0)
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#define GPIOKPF_DRIVE_INACTIVE (1U << 1)
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struct gpio_keypad_info {
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/* size must be ninputs * noutputs */
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const uint16_t *keymap;
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unsigned *input_gpios;
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unsigned *output_gpios;
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int ninputs;
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int noutputs;
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/* time to wait before reading inputs after driving each output */
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time_t settle_time;
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time_t poll_time;
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unsigned flags;
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};
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void gpio_keypad_init(struct gpio_keypad_info *kpinfo);
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//Macros for SSBI Qwerty keypad for 7x30
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/* SSBI 2.0 controller registers */
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#define MSM_SSBI_BASE 0xAD900000
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#define SSBI_TIMEOUT_US 100
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#define SSBI2_CTL 0x0000
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#define SSBI2_RESET 0x0004
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#define SSBI2_CMD 0x0008
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#define SSBI2_RD 0x0010
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#define SSBI2_STATUS 0x0014
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#define SSBI2_PRIORITIES 0x0018
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#define SSBI2_MODE2 0x001C
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/* SSBI_CMD fields */
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#define SSBI_CMD_SEND_TERM_SYM (0x01 << 27)
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#define SSBI_CMD_WAKEUP_SLAVE (0x01 << 26)
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#define SSBI_CMD_USE_ENABLE (0x01 << 25)
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#define SSBI_CMD_RDWRN (0x01 << 24)
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#define SSBI_CMD_REG_ADDR_SHFT (0x10)
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#define SSBI_CMD_REG_ADDR_MASK (0xFF << SSBI_CMD_REG_ADDR_SHFT)
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#define SSBI_CMD_REG_DATA_SHFT (0x00)
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#define SSBI_CMD_REG_DATA_MASK (0xFF << SSBI_CMD_REG_DATA_SHFT)
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/* SSBI_STATUS fields */
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#define SSBI_STATUS_DATA_IN 0x10
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#define SSBI_STATUS_RD_CLOBBERED 0x08
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#define SSBI_STATUS_RD_READY 0x04
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#define SSBI_STATUS_READY 0x02
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#define SSBI_STATUS_MCHN_BUSY 0x01
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/* SSBI_RD fields */
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#define SSBI_RD_USE_ENABLE 0x02000000
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#define SSBI_RD_RDWRN 0x01000000
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#define SSBI_RD_REG_ADDR_SHFT 0x10
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#define SSBI_RD_REG_ADDR_MASK (0xFF << SSBI_RD_REG_ADDR_SHFT)
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#define SSBI_RD_REG_DATA_SHFT (0x00)
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#define SSBI_RD_REG_DATA_MASK (0xFF << SSBI_RD_REG_DATA_SHFT)
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/* SSBI_MODE2 fields */
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#define SSBI_MODE2_REG_ADDR_15_8_SHFT 0x04
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#define SSBI_MODE2_REG_ADDR_15_8_MASK (0x7F << SSBI_MODE2_REG_ADDR_15_8_SHFT)
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#define SSBI_MODE2_ADDR_WIDTH_SHFT 0x01
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#define SSBI_MODE2_ADDR_WIDTH_MASK (0x07 << SSBI_MODE2_ADDR_WIDTH_SHFT)
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#define SSBI_MODE2_SSBI2_MODE 0x00000001
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//Keypad controller configurations
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#define SSBI_REG_KYPD_CNTL_ADDR 0x148
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#define SSBI_REG_KYPD_SCAN_ADDR 0x149
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#define SSBI_REG_KYPD_TEST_ADDR 0x14A
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#define SSBI_REG_KYPD_REC_DATA_ADDR 0x14B
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#define SSBI_REG_KYPD_OLD_DATA_ADDR 0x14C
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// GPIO configurations
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#define SSBI_REG_ADDR_GPIO_BASE 0x150
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#define SSBI_OFFSET_ADDR_GPIO_KYPD_SNS 0x000
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#define SSBI_OFFSET_ADDR_GPIO_KYPD_DRV 0x008
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#define SSBI_REG_ADDR_GPIO(n) (SSBI_REG_ADDR_GPIO_BASE + n)
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#define PM_GPIO_DIR_OUT 0x01
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#define PM_GPIO_DIR_IN 0x02
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#define PM_GPIO_DIR_BOTH (PM_GPIO_DIR_OUT | PM_GPIO_DIR_IN)
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#define PM_GPIO_PULL_UP1 2
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#define PM_GPIO_PULL_UP2 3
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#define PM_GPIO_PULL_DN 4
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#define PM_GPIO_PULL_NO 5
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#define PM_GPIO_STRENGTH_NO 0
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#define PM_GPIO_STRENGTH_HIGH 1
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#define PM_GPIO_STRENGTH_MED 2
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#define PM_GPIO_STRENGTH_LOW 3
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#define PM_GPIO_FUNC_NORMAL 0
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#define PM_GPIO_FUNC_PAIRED 1
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#define PM_GPIO_FUNC_1 2
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#define PM_GPIO_FUNC_2 3
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#define PM8058_GPIO_BANK_MASK 0x70
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#define PM8058_GPIO_BANK_SHIFT 4
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#define PM8058_GPIO_WRITE 0x80
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/* Bank 0 */
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#define PM8058_GPIO_VIN_MASK 0x0E
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#define PM8058_GPIO_VIN_SHIFT 1
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#define PM8058_GPIO_MODE_ENABLE 0x01
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/* Bank 1 */
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#define PM8058_GPIO_MODE_MASK 0x0C
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#define PM8058_GPIO_MODE_SHIFT 2
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#define PM8058_GPIO_OUT_BUFFER 0x02
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#define PM8058_GPIO_OUT_INVERT 0x01
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#define PM8058_GPIO_MODE_OFF 3
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#define PM8058_GPIO_MODE_OUTPUT 2
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#define PM8058_GPIO_MODE_INPUT 0
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#define PM8058_GPIO_MODE_BOTH 1
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/* Bank 2 */
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#define PM8058_GPIO_PULL_MASK 0x0E
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#define PM8058_GPIO_PULL_SHIFT 1
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/* Bank 3 */
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#define PM8058_GPIO_OUT_STRENGTH_MASK 0x0C
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#define PM8058_GPIO_OUT_STRENGTH_SHIFT 2
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/* Bank 4 */
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#define PM8058_GPIO_FUNC_MASK 0x0E
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#define PM8058_GPIO_FUNC_SHIFT 1
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/* PMIC Arbiter 1: SSBI2 Configuration Micro ARM registers */
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#define PA1_SSBI2_CMD 0x00500000
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#define PA1_SSBI2_RD_STATUS 0x00500004
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#define PA1_SSBI2_REG_ADDR_SHIFT 8
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#define PA1_SSBI2_CMD_RDWRN_SHIFT 24
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#define PA1_SSBI2_TRANS_DONE_SHIFT 27
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#define PA1_SSBI2_REG_DATA_MASK 0xFF
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#define PA1_SSBI2_REG_DATA_SHIFT 0
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#define PA1_SSBI2_CMD_READ 1
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#define PA1_SSBI2_CMD_WRITE 0
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/* PMIC Arbiter 2: SSBI2 Configuration Micro ARM registers */
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#define PA2_SSBI2_CMD 0x00C00000
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#define PA2_SSBI2_RD_STATUS 0x00C00004
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#define PA2_SSBI2_REG_ADDR_SHIFT 8
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#define PA2_SSBI2_CMD_RDWRN_SHIFT 24
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#define PA2_SSBI2_TRANS_DONE_SHIFT 27
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#define PA2_SSBI2_REG_DATA_MASK 0xFF
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#define PA2_SSBI2_REG_DATA_SHIFT 0
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#define PA2_SSBI2_CMD_READ 1
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#define PA2_SSBI2_CMD_WRITE 0
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struct pm8058_gpio {
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int direction;
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int pull;
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int vin_sel; /* 0..7 */
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int out_strength;
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int function;
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int inv_int_pol; /* invert interrupt polarity */
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};
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typedef int (*read_func)(unsigned char *, unsigned short, unsigned short);
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typedef int (*write_func)(unsigned char *, unsigned short, unsigned short);
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struct qwerty_keypad_info {
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/* size must be ninputs * noutputs */
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unsigned int *keymap;
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unsigned char *old_keys;
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unsigned char *rec_keys;
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unsigned int rows;
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unsigned int columns;
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unsigned int num_of_reads;
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read_func rd_func;
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write_func wr_func;
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/* time to wait before reading inputs after driving each output */
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time_t settle_time;
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time_t poll_time;
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unsigned flags;
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};
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#define SSBI_CMD_READ(AD) \
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(SSBI_CMD_RDWRN | (((AD) & 0xFF) << SSBI_CMD_REG_ADDR_SHFT))
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#define SSBI_CMD_WRITE(AD, DT) \
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((((AD) & 0xFF) << SSBI_CMD_REG_ADDR_SHFT) | \
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(((DT) & 0xFF) << SSBI_CMD_REG_DATA_SHFT))
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#define SSBI_MODE2_REG_ADDR_15_8(MD, AD) \
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(((MD) & 0x0F) | ((((AD) >> 8) << SSBI_MODE2_REG_ADDR_15_8_SHFT) & \
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SSBI_MODE2_REG_ADDR_15_8_MASK))
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void ssbi_keypad_init (struct qwerty_keypad_info *);
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int i2c_ssbi_read_bytes(unsigned char *buffer, unsigned short length,
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unsigned short slave_addr);
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int i2c_ssbi_write_bytes(unsigned char *buffer, unsigned short length,
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unsigned short slave_addr);
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int pa1_ssbi2_read_bytes(unsigned char *buffer, unsigned short length,
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unsigned short slave_addr);
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int pa1_ssbi2_write_bytes(unsigned char *buffer, unsigned short length,
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unsigned short slave_addr);
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#endif /* __DEV_GPIO_KEYPAD_H */
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