370 lines
11 KiB
C
370 lines
11 KiB
C
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/*
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* Copyright (c) 2008 Travis Geiselbrecht
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files
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* (the "Software"), to deal in the Software without restriction,
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* including without limitation the rights to use, copy, modify, merge,
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* publish, distribute, sublicense, and/or sell copies of the Software,
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* and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef __TWL4030_HW_H
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#define __TWL4030_HW_H
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/* TWL i2c addresses */
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#define TWL_I2C_ADDR0 0x48
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#define TWL_I2C_ADDR1 0x49
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#define TWL_I2C_ADDR2 0x4a
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#define TWL_I2C_ADDR3 0x4b
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#define TWL_USB_ADDR TWL_I2C_ADDR0
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#define TWL_INTBR_ADDR TWL_I2C_ADDR1
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#define TWL_PM_RECEIVER_ADDR TWL_I2C_ADDR3
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/* TWL registers */
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#define PROTECT_KEY 0x44
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#define VAUX1_DEV_GRP 0x72
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#define VAUX1_TYPE 0x73
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#define VAUX1_REMAP 0x74
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#define VAUX1_DEDICATED 0x75
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#define VAUX2_DEV_GRP 0x76
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#define VAUX2_TYPE 0x77
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#define VAUX2_REMAP 0x78
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#define VAUX2_DEDICATED 0x79
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#define VAUX3_DEV_GRP 0x7a
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#define VAUX3_TYPE 0x7b
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#define VAUX3_REMAP 0x7c
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#define VAUX3_DEDICATED 0x7d
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#define VAUX4_DEV_GRP 0x7e
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#define VAUX4_TYPE 0x7f
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#define VAUX4_REMAP 0x80
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#define VAUX4_DEDICATED 0x81
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#define VMMC1_DEV_GRP 0x82
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#define VMMC1_TYPE 0x83
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#define VMMC1_REMAP 0x84
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#define VMMC1_DEDICATED 0x85
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#define VMMC2_DEV_GRP 0x86
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#define VMMC2_TYPE 0x87
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#define VMMC2_REMAP 0x88
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#define VMMC2_DEDICATED 0x89
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#define VPLL1_DEV_GRP 0x8a
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#define VPLL1_TYPE 0x8b
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#define VPLL1_REMAP 0x8c
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#define VPLL1_DEDICATED 0x8d
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#define VPLL2_DEV_GRP 0x8e
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#define VPLL2_TYPE 0x8f
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#define VPLL2_REMAP 0x90
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#define VPLL2_DEDICATED 0x91
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#define VDAC_DEV_GRP 0x96
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#define VDAC_DEDICATED 0x99
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#define VDD2_DEV_GRP 0xBE
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#define VDD2_TYPE 0xBF
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#define VDD2_REMAP 0xC0
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#define VDD2_CFG 0xC1
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#define VSIM_DEV_GRP 0x92
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#define VSIM_TYPE 0x93
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#define VSIM_REMAP 0x94
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#define VSIM_DEDICATED 0x95
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#define PMBR1 0x92
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#define SECONDS_REG 0x1C
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#define MINUTES_REG 0x1D
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#define ALARM_SECONDS_REG 0x23
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#define ALARM_MINUTES_REG 0x24
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#define ALARM_HOURS_REG 0x25
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#define RTC_STATUS_REG 0x2A
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#define RTC_INTERRUPTS_REG 0x2B
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#define PWR_ISR1 0x2E
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#define PWR_IMR1 0x2F
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#define PWR_ISR2 0x30
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#define PWR_IMR2 0x31
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#define PWR_EDR1 0x33
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#define CFG_PWRANA2 0x3F
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#define RTC_INTERRUPTS_REG 0x2B
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#define STS_HW_CONDITIONS 0x45
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#define P1_SW_EVENTS 0x46
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#define P2_SW_EVENTS 0x47
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#define P3_SW_EVENTS 0x48
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#define VDD1_TRIM1 0x62
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#define VDD1_TRIM2 0x63
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#define VDD1_VFLOOR 0xBB
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#define VDD1_VROOF 0xBC
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#define PB_CFG 0x4A
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#define PB_WORD_MSB 0x4B
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#define PB_WORD_LSB 0x4C
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#define VSIM_REMAP 0x94
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#define VDAC_REMAP 0x98
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#define VINTANA1_DEV_GRP 0x9A
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#define VINTANA1_REMAP 0x9C
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#define VINTANA2_REMAP 0xA0
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#define VINTANA2_DEV_GRP 0x9E
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#define VINTDIG_DEV_GRP 0xA2
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#define VINTDIG_REMAP 0xA4
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#define VIO_DEV_GRP 0xA6
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#define VIO_REMAP 0xA8
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#define VDD1_REMAP 0xB2
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#define VDD2_REMAP 0xC0
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#define REGEN_REMAP 0xDC
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#define NRESPWRON_REMAP 0xDF
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#define CLKEN_REMAP 0xE2
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#define SYSEN_REMAP 0xE5
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#define HFCLKOUT_REMAP 0xE8
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#define HFCLKOUT_DEV_GRP 0xE6
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#define T32KCLKOUT_REMAP 0xEB
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#define TRITON_RESET_REMAP 0xEE
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#define MAINREF_REMAP 0xF1
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#define VIBRA_CTL 0x45
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#define VUSB1V5_DEV_GRP 0xCC
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#define VUSB1V5_TYPE 0xCD
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#define VUSB1V5_REMAP 0xCE
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#define VUSB1V8_DEV_GRP 0xCF
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#define VUSB1V8_TYPE 0xD0
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#define VUSB1V8_REMAP 0xD1
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#define VUSB3V1_DEV_GRP 0xD2
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#define VUSB3V1_TYPE 0xD3
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#define VUSB3V1_REMAP 0xD4
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#define VUSBCP_DEV_GRP 0xD5
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#define VUSBCP_TYPE 0xD6
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#define VUSBCP_REMAP 0xD7
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#define VUSB_DEDICATED1 0xD8
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#define VUSB_DEDICATED2 0xD9
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/* USB registers */
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#define VENDOR_ID_LO 0x0
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#define VENDOR_ID_HI 0x1
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#define PRODUCT_ID_LO 0x2
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#define PRODUCT_ID_HI 0x3
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#define FUNC_CTRL 0x4
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#define FUNC_CTRL_SET 0x5
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#define FUNC_CTRL_CLR 0x6
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# define SUSPENDM (1 << 6)
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# define RESET (1 << 5)
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# define OPMODE_MASK (3 << 3) /* bits 3 and 4 */
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# define OPMODE_NORMAL (0 << 3)
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# define OPMODE_NONDRIVING (1 << 3)
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# define OPMODE_DISABLE_BIT_NRZI (2 << 3)
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# define TERMSELECT (1 << 2)
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# define XCVRSELECT_MASK (3 << 0) /* bits 0 and 1 */
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# define XCVRSELECT_HS (0 << 0)
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# define XCVRSELECT_FS (1 << 0)
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# define XCVRSELECT_LS (2 << 0)
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# define XCVRSELECT_FS4LS (3 << 0)
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#define IFC_CTRL 0x7
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#define IFC_CTRL_SET 0x8
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#define IFC_CTRL_CLR 0x9
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# define INTERFACE_PROTECT_DISABLE (1 << 7)
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# define AUTORESUME (1 << 4)
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# define CLOCKSUSPENDM (1 << 3)
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# define CARKITMODE (1 << 2)
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# define FSLSSERIALMODE_3PIN (1 << 1)
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#define OTG_CTRL 0xa
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#define OTG_CTRL_SET 0xb
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#define OTG_CTRL_CLR 0xc
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#define DRVVBUS (1 << 5)
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#define CHRGVBUS (1 << 4)
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#define DISCHRGVBUS (1 << 3)
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#define DMPULLDOWN (1 << 2)
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#define DPPULLDOWN (1 << 1)
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#define IDPULLUP (1 << 0)
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#define USB_INT_EN_RISE 0xd
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#define USB_INT_EN_RISE_SET 0xe
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#define USB_INT_EN_RISE_CLR 0xf
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#define USB_INT_EN_FALL 0x10
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#define USB_INT_EN_FALL_SET 0x11
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#define USB_INT_EN_FALL_CLR 0x12
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# define HOSTDISCONNECT (1 << 0)
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#define USB_INT_STS 0x13
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#define USB_INT_LATCH 0x14
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#define USB_DEBUG 0x15
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#define SCRATCH_REG 0x16
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#define SCRATCH_REG_SET 0x17
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#define SCRATCH_REG_CLR 0x18
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#define CARKIT_CTRL 0x19
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#define CARKIT_CTRL_SET 0x1a
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#define CARKIT_CTRL_CLR 0x1b
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#define MICEN (1 << 6)
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#define SPKRIGHTEN (1 << 5)
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#define SPKLEFTEN (1 << 4)
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#define RXDEN (1 << 3)
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#define TXDEN (1 << 2)
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#define IDGNDDRV (1 << 1)
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#define CARKITPWR (1 << 0)
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#define CARKIT_INT_DELAY 0x1c
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#define CARKIT_INT_EN 0x1d
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#define CARKIT_INT_EN_SET 0x1e
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#define CARKIT_INT_EN_CLR 0x1f
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#define CARKIT_INT_STS 0x20
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#define CARKIT_INT_LATCH 0x21
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#define CARKIT_PLS_CTRL 0x22
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#define CARKIT_PLS_CTRL_SET 0x23
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#define CARKIT_PLS_CTRL_CLR 0x24
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# define SPKRRIGHT_BIASEN (1 << 3)
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# define SPKRLEFT_BIASEN (1 << 2)
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# define RXPLSEN (1 << 1)
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# define TXPLSEN (1 << 0)
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#define TRANS_POS_WIDTH 0x25
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#define TRANS_NEG_WIDTH 0x26
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#define RCV_PLTY_RECOVERY 0x27
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#define MCPC_CTRL 0x30
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#define MCPC_CTRL_SET 0x31
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#define MCPC_CTRL_CLR 0x32
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#define RTSOL (1 << 7)
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#define EXTSWR (1 << 6)
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#define EXTSWC (1 << 5)
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#define VOICESW (1 << 4)
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#define OUT64K (1 << 3)
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#define RTSCTSSW (1 << 2)
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#define HS_UART (1 << 0)
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#define MCPC_IO_CTRL 0x033
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#define MCPC_IO_CTRL_SET 0x034
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#define MCPC_IO_CTRL_CLR 0x035
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#define MICBIASEN (1<< 5)
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#define CTS_NPU (1 << 4)
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#define RXD_PU (1 << 3)
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#define TXDTYP (1 << 2)
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#define CTSTYP (1 << 1)
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#define RTSTYP (1 << 0)
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#define MCPC_CTRL2 0x036
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#define MCPC_CTRL2_SET 0x037
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#define MCPC_CTRL2_CLR 0x038
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# define MCPC_CK_EN (1 << 0)
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#define OTHER_FUNC_CTRL 0x080
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#define OTHER_FUNC_CTRL_SET 0x081
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#define OTHER_FUNC_CTRL_CLR 0x082
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#define BDIS_ACON_EN (1<< 4)
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#define FIVEWIRE_MODE (1 << 2)
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#define OTHER_IFC_CTRL 0x083
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#define OTHER_IFC_CTRL_SET 0x084
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#define OTHER_IFC_CTRL_CLR 0x085
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# define OE_INT_EN (1 << 6)
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# define CEA2011_MODE (1 << 5)
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# define FSLSSERIALMODE_4PIN (1 << 4)
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# define HIZ_ULPI_60MHZ_OUT (1 << 3)
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# define HIZ_ULPI (1 << 2)
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# define ALT_INT_REROUTE (1 << 0)
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#define OTHER_INT_EN_RISE 0x086
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#define OTHER_INT_EN_RISE_SET 0x087
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#define OTHER_INT_EN_RISE_CLR 0x088
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#define OTHER_INT_EN_FALL 0x089
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#define OTHER_INT_EN_FALL_SET 0x08A
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#define OTHER_INT_EN_FALL_CLR 0x08B
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#define OTHER_INT_STS 0x8C
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#define OTHER_INT_LATCH 0x8D
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#define ID_INT_EN_RISE 0x08E
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#define ID_INT_EN_RISE_SET 0x08F
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#define ID_INT_EN_RISE_CLR 0x090
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#define ID_INT_EN_FALL 0x091
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#define ID_INT_EN_FALL_SET 0x092
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#define ID_INT_EN_FALL_CLR 0x093
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#define ID_INT_STS 0x094
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#define ID_INT_LATCH 0x95
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#define ID_STATUS 0x96
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#define CARKIT_SM_1_INT_EN 0x097
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#define CARKIT_SM_1_INT_EN_SET 0x098
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#define CARKIT_SM_1_INT_EN_CLR 0x099
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#define CARKIT_SM_1_INT_STS 0x09A
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#define CARKIT_SM_1_INT_LATCH 0x9B
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#define CARKIT_SM_2_INT_EN 0x09C
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#define CARKIT_SM_2_INT_EN_SET 0x09D
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#define CARKIT_SM_2_INT_EN_CLR 0x09E
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#define CARKIT_SM_2_INT_STS 0x09F
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#define CARKIT_SM_2_INT_LATCH 0xA0
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#define CARKIT_SM_CTRL 0x0A1
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#define CARKIT_SM_CTRL_SET 0x0A2
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#define CARKIT_SM_CTRL_CLR 0x0A3
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#define CARKIT_SM_CMD 0x0A4
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#define CARKIT_SM_CMD_SET 0x0A5
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#define CARKIT_SM_CMD_CLR 0x0A6
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#define CARKIT_SM_CMD_STS 0xA7
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#define CARKIT_SM_STATUS 0xA8
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#define CARKIT_SM_NEXT_STATUS 0xA9
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#define CARKIT_SM_ERR_STATUS 0xAA
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#define CARKIT_SM_CTRL_STATE 0xAB
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#define POWER_CTRL 0xAC
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#define POWER_CTRL_SET 0xAD
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#define POWER_CTRL_CLR 0xAE
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# define OTG_ENAB (1 << 5)
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#define OTHER_IFC_CTRL2 0xAF
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#define OTHER_IFC_CTRL2_SET 0xB0
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#define OTHER_IFC_CTRL2_CLR 0xB1
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# define ULPI_TXEN_POL (1 << 3)
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# define ULPI_4PIN_2430 (1 << 2)
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#define REG_CTRL_EN 0xB2
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#define REG_CTRL_EN_SET 0xB3
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#define REG_CTRL_EN_CLR 0xB4
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#define REG_CTRL_ERROR 0xB5
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#define ULPI_I2C_CONFLICT_INTEN (1 << 0)
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#define OTHER_FUNC_CTRL2 0xB8
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#define OTHER_FUNC_CTRL2_SET 0xB9
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#define OTHER_FUNC_CTRL2_CLR 0xBA
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#define VBAT_TIMER_EN (1 << 0)
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#define CARKIT_ANA_CTRL 0xBB
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#define CARKIT_ANA_CTRL_SET 0xBC
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#define CARKIT_ANA_CTRL_CLR 0xBD
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#define VBUS_DEBOUNCE 0xC0
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#define ID_DEBOUNCE 0xC1
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#define TPH_DP_CON_MIN 0xC2
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#define TPH_DP_CON_MAX 0xC3
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#define TCR_DP_CON_MIN 0xC4
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#define TCR_DP_CON_MAX 0xC5
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#define TPH_DP_PD_SHORT 0xC6
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#define TPH_CMD_DLY 0xC7
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#define TPH_DET_RST 0xC8
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#define TPH_AUD_BIAS 0xC9
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#define TCR_UART_DET_MIN 0xCA
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#define TCR_UART_DET_MAX 0xCB
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#define TPH_ID_INT_PW 0xCD
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#define TACC_ID_INT_WAIT 0xCE
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#define TACC_ID_INT_PW 0xCF
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#define TPH_CMD_WAIT 0xD0
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#define TPH_ACK_WAIT 0xD1
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#define TPH_DP_DISC_DET 0xD2
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#define VBAT_TIMER 0xD3
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#define CARKIT_4W_DEBUG 0xE0
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#define CARKIT_5W_DEBUG 0xE1
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#define CARKIT_5W_DEBUG 0xE1
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#define TEST_CTRL_CLR 0xEB
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||
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#define TEST_CARKIT_SET 0xEC
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#define TEST_CARKIT_CLR 0xED
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||
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#define TEST_POWER_SET 0xEE
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#define TEST_POWER_CLR 0xEF
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||
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#define TEST_ULPI 0xF0
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||
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#define TXVR_EN_TEST_SET 0xF2
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||
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#define TXVR_EN_TEST_CLR 0xF3
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||
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#define VBUS_EN_TEST 0xF4
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||
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#define ID_EN_TEST 0xF5
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||
|
|
#define PSM_EN_TEST_SET 0xF6
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||
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|
#define PSM_EN_TEST_CLR 0xF7
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||
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#define PHY_TRIM_CTRL 0xFC
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||
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#define PHY_PWR_CTRL 0xFD
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||
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|
# define PHYPWD (1 << 0)
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||
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#define PHY_CLK_CTRL 0xFE
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||
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|
# define CLOCKGATING_EN (1 << 2)
|
||
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|
# define CLK32K_EN (1 << 1)
|
||
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# define REQ_PHY_DPLL_CLK (1 << 0)
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||
|
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#define PHY_CLK_CTRL_STS 0xFF
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||
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|
# define PHY_DPLL_CLK (1 << 0)
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||
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||
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#endif
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