96 lines
2.9 KiB
C
96 lines
2.9 KiB
C
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/*
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* Copyright (c) 2008, Google Inc.
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* All rights reserved.
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* Copyright (c) 2009, Code Aurora Forum. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <stdint.h>
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#include <kernel/thread.h>
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#include <platform/iomap.h>
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#include <reg.h>
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#define A11S_CLK_CNTL 0xAC100100
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#define A11S_CLK_SEL 0xAC100104
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#define SCPLL_CTL 0xA8800004
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#define SCPLL_CTLE 0xA8800010
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#define SCPLL_STAT 0xA8800018
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void acpu_clock_init(void)
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{
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unsigned val;
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/* Init Scorpion PLL */
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writel(0x0, SCPLL_CTL);
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writel(0x00400002, SCPLL_CTL);
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writel(0x00600004, SCPLL_CTL);
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thread_sleep(1);
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while(readl(SCPLL_STAT) & 0x2);
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writel(0x0, SCPLL_CTL);
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/* Enable pll */
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while(readl(SCPLL_STAT) & 0x1);
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val = readl(SCPLL_CTL);
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val &= ~(0x7);
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val |= 0x2;
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writel(val, SCPLL_CTL);
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thread_sleep(1);
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val = readl(SCPLL_CTL);
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val |= 0x7;
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writel(val, SCPLL_CTL);
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thread_sleep(1);
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/* For Scorpion PLL, must first SHOT to 384MHz then HOP to 768MHz */
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/* Set pll to 384 MHz */
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while(readl(SCPLL_STAT) & 0x3);
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val = readl(SCPLL_CTLE);
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val &= ~(0x3F << 3);
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val |= (0xA << 3);
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val &= ~(0x3 << 0);
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val |= (4 << 0); // SHOT method
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writel(val, SCPLL_CTLE);
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writel(0x00600007, SCPLL_CTL);
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thread_sleep(1);
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/* HOP to 768MHz */
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while(readl(SCPLL_STAT) & 0x3);
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val = readl(SCPLL_CTLE);
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val &= ~(0x3F << 3);
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val |= (0x14 << 3); // Use 0x1A instead of 0x14 for 998MHz
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val &= ~(0x3 << 0);
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val |= (5 << 0); // HOP method
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writel(val, SCPLL_CTLE);
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writel(0x00600007, SCPLL_CTL);
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thread_sleep(1);
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val = readl(A11S_CLK_SEL);
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val &= ~(0x3 << 1);
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val |= (1 << 1);
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writel(val, A11S_CLK_SEL);
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}
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