85 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			85 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/* linux/arch/arm/plat-s3c24xx/include/plat/dma-plat.h
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 *
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 * Copyright (C) 2006 Simtec Electronics
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 *	Ben Dooks <ben@simtec.co.uk>
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 *
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 * Samsung S3C24XX DMA support
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License version 2 as
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 * published by the Free Software Foundation.
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*/
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#include <plat/dma-core.h>
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extern struct sysdev_class dma_sysclass;
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extern struct s3c2410_dma_chan s3c2410_chans[S3C_DMA_CHANNELS];
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#define DMA_CH_VALID		(1<<31)
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#define DMA_CH_NEVER		(1<<30)
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struct s3c24xx_dma_addr {
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	unsigned long		from;
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	unsigned long		to;
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};
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/* struct s3c24xx_dma_map
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 *
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 * this holds the mapping information for the channel selected
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 * to be connected to the specified device
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*/
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struct s3c24xx_dma_map {
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	const char		*name;
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	struct s3c24xx_dma_addr  hw_addr;
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	unsigned long		 channels[S3C_DMA_CHANNELS];
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	unsigned long		 channels_rx[S3C_DMA_CHANNELS];
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};
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struct s3c24xx_dma_selection {
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	struct s3c24xx_dma_map	*map;
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	unsigned long		 map_size;
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	unsigned long		 dcon_mask;
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	void	(*select)(struct s3c2410_dma_chan *chan,
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			  struct s3c24xx_dma_map *map);
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	void	(*direction)(struct s3c2410_dma_chan *chan,
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			     struct s3c24xx_dma_map *map,
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			     enum s3c2410_dmasrc dir);
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};
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extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel);
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/* struct s3c24xx_dma_order_ch
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 *
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 * channel map for one of the `enum dma_ch` dma channels. the list
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 * entry contains a set of low-level channel numbers, orred with
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 * DMA_CH_VALID, which are checked in the order in the array.
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*/
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struct s3c24xx_dma_order_ch {
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	unsigned int	list[S3C_DMA_CHANNELS];	/* list of channels */
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	unsigned int	flags;				/* flags */
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};
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/* struct s3c24xx_dma_order
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 *
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 * information provided by either the core or the board to give the
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 * dma system a hint on how to allocate channels
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*/
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struct s3c24xx_dma_order {
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	struct s3c24xx_dma_order_ch	channels[DMACH_MAX];
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};
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extern int s3c24xx_dma_order_set(struct s3c24xx_dma_order *map);
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/* DMA init code, called from the cpu support code */
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extern int s3c2410_dma_init(void);
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extern int s3c24xx_dma_init(unsigned int channels, unsigned int irq,
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			    unsigned int stride);
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