84 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			84 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  *  arch/arm/mach-rpc/include/mach/hardware.h
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|  *
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|  *  Copyright (C) 1996-1999 Russell King.
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License version 2 as
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|  * published by the Free Software Foundation.
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|  *
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|  *  This file contains the hardware definitions of the RiscPC series machines.
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|  */
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| #ifndef __ASM_ARCH_HARDWARE_H
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| #define __ASM_ARCH_HARDWARE_H
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| 
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| #include <mach/memory.h>
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| 
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| #ifndef __ASSEMBLY__
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| #define IOMEM(x) ((void __iomem *)(unsigned long)(x))
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| #else
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| #define IOMEM(x) x
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| #endif /* __ASSEMBLY__ */
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| 
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| /*
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|  * What hardware must be present
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|  */
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| #define HAS_IOMD
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| #define HAS_VIDC20
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| 
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| /* Hardware addresses of major areas.
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|  *  *_START is the physical address
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|  *  *_SIZE  is the size of the region
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|  *  *_BASE  is the virtual address
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|  */
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| #define RAM_SIZE		0x10000000
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| #define RAM_START		0x10000000
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| 
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| #define EASI_SIZE		0x08000000	/* EASI I/O */
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| #define EASI_START		0x08000000
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| #define EASI_BASE		0xe5000000
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| 
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| #define IO_START		0x03000000	/* I/O */
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| #define IO_SIZE			0x01000000
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| #define IO_BASE			IOMEM(0xe0000000)
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| 
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| #define SCREEN_START		0x02000000	/* VRAM */
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| #define SCREEN_END		0xdfc00000
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| #define SCREEN_BASE		0xdf800000
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| 
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| #define UNCACHEABLE_ADDR	0xdf010000
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| 
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| /*
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|  * IO Addresses
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|  */
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| #define VIDC_BASE		IOMEM(0xe0400000)
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| #define EXPMASK_BASE		0xe0360000
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| #define IOMD_BASE		IOMEM(0xe0200000)
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| #define IOC_BASE		IOMEM(0xe0200000)
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| #define PCIO_BASE		IOMEM(0xe0010000)
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| #define FLOPPYDMA_BASE		IOMEM(0xe002a000)
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| 
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| #define vidc_writel(val)	__raw_writel(val, VIDC_BASE)
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| 
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| #define IO_EC_EASI_BASE		0x81400000
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| #define IO_EC_IOC4_BASE		0x8009c000
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| #define IO_EC_IOC_BASE		0x80090000
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| #define IO_EC_MEMC8_BASE	0x8000ac00
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| #define IO_EC_MEMC_BASE		0x80000000
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| 
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| #define NETSLOT_BASE		0x0302b000
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| #define NETSLOT_SIZE		0x00001000
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| 
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| #define PODSLOT_IOC0_BASE	0x03240000
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| #define PODSLOT_IOC4_BASE	0x03270000
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| #define PODSLOT_IOC_SIZE	(1 << 14)
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| #define PODSLOT_MEMC_BASE	0x03000000
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| #define PODSLOT_MEMC_SIZE	(1 << 14)
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| #define PODSLOT_EASI_BASE	0x08000000
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| #define PODSLOT_EASI_SIZE	(1 << 24)
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| 
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| #define	EXPMASK_STATUS		(EXPMASK_BASE + 0x00)
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| #define EXPMASK_ENABLE		(EXPMASK_BASE + 0x04)
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| 
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| #endif
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