169 lines
3.0 KiB
ArmAsm
169 lines
3.0 KiB
ArmAsm
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.global __main
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.global __rom_start
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.global _rambase
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.global _ramstart
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.global splash_bits
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.global _start
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.global _stext
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.global _edata
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#define DEBUG
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#define ROM_OFFSET 0x10C00000
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#define STACK_GAURD 0x10
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.text
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_start:
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_stext:
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movew #0x2700, %sr /* Exceptions off! */
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#if 0
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/* Init chip registers. uCsimm specific */
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moveb #0x00, 0xfffffb0b /* Watchdog off */
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moveb #0x10, 0xfffff000 /* SCR */
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movew #0x2400, 0xfffff200 /* PLLCR */
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movew #0x0123, 0xfffff202 /* PLLFSR */
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moveb #0x00, 0xfffff40b /* enable chip select */
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moveb #0x00, 0xfffff423 /* enable /DWE */
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moveb #0x08, 0xfffffd0d /* disable hardmap */
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moveb #0x07, 0xfffffd0e /* level 7 interrupt clear */
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movew #0x8600, 0xfffff100 /* FLASH at 0x10c00000 */
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movew #0x018b, 0xfffff110 /* 2Meg, enable, 0ws */
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movew #0x8f00, 0xfffffc00 /* DRAM configuration */
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movew #0x9667, 0xfffffc02 /* DRAM control */
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movew #0x0000, 0xfffff106 /* DRAM at 0x00000000 */
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movew #0x068f, 0xfffff116 /* 8Meg, enable, 0ws */
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moveb #0x40, 0xfffff300 /* IVR */
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movel #0x007FFFFF, %d0 /* IMR */
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movel %d0, 0xfffff304
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moveb 0xfffff42b, %d0
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andb #0xe0, %d0
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moveb %d0, 0xfffff42b
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moveb #0x08, 0xfffff907 /* Ignore CTS */
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movew #0x010b, 0xfffff902 /* BAUD to 9600 */
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movew #0xe100, 0xfffff900 /* enable */
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#endif
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movew #16384, %d0 /* PLL settle wait loop */
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L0:
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subw #1, %d0
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bne L0
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#ifdef DEBUG
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moveq #70, %d7 /* 'F' */
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moveb %d7,0xfffff907 /* No absolute addresses */
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pclp1:
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movew 0xfffff906, %d7
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andw #0x2000, %d7
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beq pclp1
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#endif /* DEBUG */
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#ifdef CONFIG_RELOCATE
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/* Copy me to RAM */
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moveal #__rom_start, %a0
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moveal #_stext, %a1
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moveal #_edata, %a2
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/* Copy %a0 to %a1 until %a1 == %a2 */
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LD1:
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movel %a0@+, %d0
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movel %d0, %a1@+
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cmpal %a1, %a2
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bhi LD1
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#ifdef DEBUG
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moveq #74, %d7 /* 'J' */
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moveb %d7,0xfffff907 /* No absolute addresses */
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pclp2:
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movew 0xfffff906, %d7
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andw #0x2000, %d7
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beq pclp2
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#endif /* DEBUG */
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/* jump into the RAM copy */
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jmp ram_jump
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ram_jump:
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#endif /* CONFIG_RELOCATE */
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#ifdef DEBUG
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moveq #82, %d7 /* 'R' */
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moveb %d7,0xfffff907 /* No absolute addresses */
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pclp3:
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movew 0xfffff906, %d7
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andw #0x2000, %d7
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beq pclp3
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#endif /* DEBUG */
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moveal #0x007ffff0, %ssp
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moveal #_sbss, %a0
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moveal #_ebss, %a1
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/* Copy 0 to %a0 until %a0 >= %a1 */
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L1:
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movel #0, %a0@+
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cmpal %a0, %a1
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bhi L1
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#ifdef DEBUG
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moveq #67, %d7 /* 'C' */
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jsr putc
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#endif /* DEBUG */
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pea 0
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pea env
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pea %sp@(4)
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pea 0
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#ifdef DEBUG
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moveq #70, %d7 /* 'F' */
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jsr putc
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#endif /* DEBUG */
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lp:
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jsr start_kernel
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jmp lp
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_exit:
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jmp _exit
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__main:
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/* nothing */
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rts
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#ifdef DEBUG
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putc:
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moveb %d7,0xfffff907
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pclp:
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movew 0xfffff906, %d7
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andw #0x2000, %d7
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beq pclp
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rts
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#endif /* DEBUG */
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.data
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/*
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* Set up the usable of RAM stuff. Size of RAM is determined then
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* an initial stack set up at the end.
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*/
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.align 4
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_ramvec:
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.long 0
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_rambase:
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.long 0
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_ramstart:
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.long 0
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_ramend:
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.long 0
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env:
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.long 0
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