58 lines
2.4 KiB
C
58 lines
2.4 KiB
C
/* Copyright (c) 2009, Code Aurora Forum. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Code Aurora nor
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* the names of its contributors may be used to endorse or promote
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* products derived from this software without specific prior written
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* permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifndef __MACH_CLK_H
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#define __MACH_CLK_H
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/* Magic rate value for use with PM QOS to request the board's maximum
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* supported AXI rate. PM QOS will only pass positive s32 rate values
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* through to the clock driver, so INT_MAX is used.
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*/
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#define MSM_AXI_MAX_FREQ LONG_MAX
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enum clk_reset_action {
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CLK_RESET_DEASSERT = 0,
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CLK_RESET_ASSERT = 1
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};
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struct clk;
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/* Rate is minimum clock rate in Hz */
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int clk_set_min_rate(struct clk *clk, unsigned long rate);
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/* Rate is maximum clock rate in Hz */
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int clk_set_max_rate(struct clk *clk, unsigned long rate);
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/* Assert/Deassert reset to a hardware block associated with a clock */
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int clk_reset(struct clk *clk, enum clk_reset_action action);
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int clk_set_flags(struct clk *clk, unsigned long flags);
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unsigned long acpuclk_get_max_axi_rate(void);
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#endif
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