919 lines
26 KiB
C
919 lines
26 KiB
C
#ifndef _ASM_IA64_SAL_H
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#define _ASM_IA64_SAL_H
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/*
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* System Abstraction Layer definitions.
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*
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* This is based on version 2.5 of the manual "IA-64 System
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* Abstraction Layer".
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*
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* Copyright (C) 2001 Intel
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* Copyright (C) 2002 Jenna Hall <jenna.s.hall@intel.com>
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* Copyright (C) 2001 Fred Lewis <frederick.v.lewis@intel.com>
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* Copyright (C) 1998, 1999, 2001, 2003 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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* Copyright (C) 1999 Srinivasa Prasad Thirumalachar <sprasad@sprasad.engr.sgi.com>
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*
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* 02/01/04 J. Hall Updated Error Record Structures to conform to July 2001
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* revision of the SAL spec.
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* 01/01/03 fvlewis Updated Error Record Structures to conform with Nov. 2000
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* revision of the SAL spec.
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* 99/09/29 davidm Updated for SAL 2.6.
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* 00/03/29 cfleck Updated SAL Error Logging info for processor (SAL 2.6)
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* (plus examples of platform error info structures from smariset @ Intel)
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*/
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#define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT 0
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#define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT 1
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#define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT 2
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#define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT 3
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#define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK (1<<IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT)
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#define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT)
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#define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT)
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#define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT (1<<IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT)
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#ifndef __ASSEMBLY__
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#include <linux/bcd.h>
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#include <linux/spinlock.h>
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#include <linux/efi.h>
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#include <asm/pal.h>
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#include <asm/system.h>
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#include <asm/fpu.h>
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extern spinlock_t sal_lock;
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/* SAL spec _requires_ eight args for each call. */
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#define __IA64_FW_CALL(entry,result,a0,a1,a2,a3,a4,a5,a6,a7) \
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result = (*entry)(a0,a1,a2,a3,a4,a5,a6,a7)
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# define IA64_FW_CALL(entry,result,args...) do { \
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unsigned long __ia64_sc_flags; \
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struct ia64_fpreg __ia64_sc_fr[6]; \
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ia64_save_scratch_fpregs(__ia64_sc_fr); \
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spin_lock_irqsave(&sal_lock, __ia64_sc_flags); \
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__IA64_FW_CALL(entry, result, args); \
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spin_unlock_irqrestore(&sal_lock, __ia64_sc_flags); \
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ia64_load_scratch_fpregs(__ia64_sc_fr); \
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} while (0)
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# define SAL_CALL(result,args...) \
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IA64_FW_CALL(ia64_sal, result, args);
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# define SAL_CALL_NOLOCK(result,args...) do { \
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unsigned long __ia64_scn_flags; \
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struct ia64_fpreg __ia64_scn_fr[6]; \
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ia64_save_scratch_fpregs(__ia64_scn_fr); \
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local_irq_save(__ia64_scn_flags); \
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__IA64_FW_CALL(ia64_sal, result, args); \
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local_irq_restore(__ia64_scn_flags); \
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ia64_load_scratch_fpregs(__ia64_scn_fr); \
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} while (0)
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# define SAL_CALL_REENTRANT(result,args...) do { \
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struct ia64_fpreg __ia64_scs_fr[6]; \
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ia64_save_scratch_fpregs(__ia64_scs_fr); \
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preempt_disable(); \
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__IA64_FW_CALL(ia64_sal, result, args); \
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preempt_enable(); \
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ia64_load_scratch_fpregs(__ia64_scs_fr); \
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} while (0)
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#define SAL_SET_VECTORS 0x01000000
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#define SAL_GET_STATE_INFO 0x01000001
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#define SAL_GET_STATE_INFO_SIZE 0x01000002
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#define SAL_CLEAR_STATE_INFO 0x01000003
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#define SAL_MC_RENDEZ 0x01000004
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#define SAL_MC_SET_PARAMS 0x01000005
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#define SAL_REGISTER_PHYSICAL_ADDR 0x01000006
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#define SAL_CACHE_FLUSH 0x01000008
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#define SAL_CACHE_INIT 0x01000009
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#define SAL_PCI_CONFIG_READ 0x01000010
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#define SAL_PCI_CONFIG_WRITE 0x01000011
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#define SAL_FREQ_BASE 0x01000012
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#define SAL_PHYSICAL_ID_INFO 0x01000013
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#define SAL_UPDATE_PAL 0x01000020
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struct ia64_sal_retval {
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/*
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* A zero status value indicates call completed without error.
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* A negative status value indicates reason of call failure.
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* A positive status value indicates success but an
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* informational value should be printed (e.g., "reboot for
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* change to take effect").
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*/
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long status;
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unsigned long v0;
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unsigned long v1;
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unsigned long v2;
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};
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typedef struct ia64_sal_retval (*ia64_sal_handler) (u64, ...);
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enum {
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SAL_FREQ_BASE_PLATFORM = 0,
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SAL_FREQ_BASE_INTERVAL_TIMER = 1,
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SAL_FREQ_BASE_REALTIME_CLOCK = 2
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};
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/*
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* The SAL system table is followed by a variable number of variable
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* length descriptors. The structure of these descriptors follows
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* below.
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* The defininition follows SAL specs from July 2000
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*/
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struct ia64_sal_systab {
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u8 signature[4]; /* should be "SST_" */
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u32 size; /* size of this table in bytes */
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u8 sal_rev_minor;
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u8 sal_rev_major;
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u16 entry_count; /* # of entries in variable portion */
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u8 checksum;
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u8 reserved1[7];
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u8 sal_a_rev_minor;
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u8 sal_a_rev_major;
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u8 sal_b_rev_minor;
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u8 sal_b_rev_major;
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/* oem_id & product_id: terminating NUL is missing if string is exactly 32 bytes long. */
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u8 oem_id[32];
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u8 product_id[32]; /* ASCII product id */
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u8 reserved2[8];
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};
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enum sal_systab_entry_type {
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SAL_DESC_ENTRY_POINT = 0,
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SAL_DESC_MEMORY = 1,
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SAL_DESC_PLATFORM_FEATURE = 2,
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SAL_DESC_TR = 3,
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SAL_DESC_PTC = 4,
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SAL_DESC_AP_WAKEUP = 5
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};
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/*
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* Entry type: Size:
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* 0 48
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* 1 32
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* 2 16
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* 3 32
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* 4 16
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* 5 16
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*/
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#define SAL_DESC_SIZE(type) "\060\040\020\040\020\020"[(unsigned) type]
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typedef struct ia64_sal_desc_entry_point {
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u8 type;
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u8 reserved1[7];
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u64 pal_proc;
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u64 sal_proc;
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u64 gp;
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u8 reserved2[16];
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}ia64_sal_desc_entry_point_t;
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typedef struct ia64_sal_desc_memory {
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u8 type;
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u8 used_by_sal; /* needs to be mapped for SAL? */
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u8 mem_attr; /* current memory attribute setting */
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u8 access_rights; /* access rights set up by SAL */
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u8 mem_attr_mask; /* mask of supported memory attributes */
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u8 reserved1;
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u8 mem_type; /* memory type */
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u8 mem_usage; /* memory usage */
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u64 addr; /* physical address of memory */
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u32 length; /* length (multiple of 4KB pages) */
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u32 reserved2;
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u8 oem_reserved[8];
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} ia64_sal_desc_memory_t;
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typedef struct ia64_sal_desc_platform_feature {
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u8 type;
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u8 feature_mask;
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u8 reserved1[14];
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} ia64_sal_desc_platform_feature_t;
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typedef struct ia64_sal_desc_tr {
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u8 type;
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u8 tr_type; /* 0 == instruction, 1 == data */
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u8 regnum; /* translation register number */
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u8 reserved1[5];
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u64 addr; /* virtual address of area covered */
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u64 page_size; /* encoded page size */
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u8 reserved2[8];
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} ia64_sal_desc_tr_t;
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typedef struct ia64_sal_desc_ptc {
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u8 type;
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u8 reserved1[3];
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u32 num_domains; /* # of coherence domains */
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u64 domain_info; /* physical address of domain info table */
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} ia64_sal_desc_ptc_t;
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typedef struct ia64_sal_ptc_domain_info {
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u64 proc_count; /* number of processors in domain */
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u64 proc_list; /* physical address of LID array */
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} ia64_sal_ptc_domain_info_t;
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typedef struct ia64_sal_ptc_domain_proc_entry {
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u64 id : 8; /* id of processor */
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u64 eid : 8; /* eid of processor */
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} ia64_sal_ptc_domain_proc_entry_t;
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#define IA64_SAL_AP_EXTERNAL_INT 0
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typedef struct ia64_sal_desc_ap_wakeup {
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u8 type;
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u8 mechanism; /* 0 == external interrupt */
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u8 reserved1[6];
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u64 vector; /* interrupt vector in range 0x10-0xff */
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} ia64_sal_desc_ap_wakeup_t ;
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extern ia64_sal_handler ia64_sal;
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extern struct ia64_sal_desc_ptc *ia64_ptc_domain_info;
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extern unsigned short sal_revision; /* supported SAL spec revision */
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extern unsigned short sal_version; /* SAL version; OEM dependent */
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#define SAL_VERSION_CODE(major, minor) ((bin2bcd(major) << 8) | bin2bcd(minor))
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extern const char *ia64_sal_strerror (long status);
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extern void ia64_sal_init (struct ia64_sal_systab *sal_systab);
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/* SAL information type encodings */
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enum {
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SAL_INFO_TYPE_MCA = 0, /* Machine check abort information */
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SAL_INFO_TYPE_INIT = 1, /* Init information */
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SAL_INFO_TYPE_CMC = 2, /* Corrected machine check information */
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SAL_INFO_TYPE_CPE = 3 /* Corrected platform error information */
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};
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/* Encodings for machine check parameter types */
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enum {
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SAL_MC_PARAM_RENDEZ_INT = 1, /* Rendezvous interrupt */
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SAL_MC_PARAM_RENDEZ_WAKEUP = 2, /* Wakeup */
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SAL_MC_PARAM_CPE_INT = 3 /* Corrected Platform Error Int */
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};
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/* Encodings for rendezvous mechanisms */
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enum {
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SAL_MC_PARAM_MECHANISM_INT = 1, /* Use interrupt */
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SAL_MC_PARAM_MECHANISM_MEM = 2 /* Use memory synchronization variable*/
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};
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/* Encodings for vectors which can be registered by the OS with SAL */
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enum {
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SAL_VECTOR_OS_MCA = 0,
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SAL_VECTOR_OS_INIT = 1,
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SAL_VECTOR_OS_BOOT_RENDEZ = 2
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};
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/* Encodings for mca_opt parameter sent to SAL_MC_SET_PARAMS */
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#define SAL_MC_PARAM_RZ_ALWAYS 0x1
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#define SAL_MC_PARAM_BINIT_ESCALATE 0x10
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/*
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* Definition of the SAL Error Log from the SAL spec
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*/
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/* SAL Error Record Section GUID Definitions */
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#define SAL_PROC_DEV_ERR_SECT_GUID \
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EFI_GUID(0xe429faf1, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
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#define SAL_PLAT_MEM_DEV_ERR_SECT_GUID \
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EFI_GUID(0xe429faf2, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
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#define SAL_PLAT_SEL_DEV_ERR_SECT_GUID \
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EFI_GUID(0xe429faf3, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
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#define SAL_PLAT_PCI_BUS_ERR_SECT_GUID \
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EFI_GUID(0xe429faf4, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
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#define SAL_PLAT_SMBIOS_DEV_ERR_SECT_GUID \
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EFI_GUID(0xe429faf5, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
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#define SAL_PLAT_PCI_COMP_ERR_SECT_GUID \
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EFI_GUID(0xe429faf6, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
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#define SAL_PLAT_SPECIFIC_ERR_SECT_GUID \
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EFI_GUID(0xe429faf7, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
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#define SAL_PLAT_HOST_CTLR_ERR_SECT_GUID \
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EFI_GUID(0xe429faf8, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
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#define SAL_PLAT_BUS_ERR_SECT_GUID \
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EFI_GUID(0xe429faf9, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
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#define PROCESSOR_ABSTRACTION_LAYER_OVERWRITE_GUID \
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EFI_GUID(0x6cb0a200, 0x893a, 0x11da, 0x96, 0xd2, 0x0, 0x10, 0x83, 0xff, \
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0xca, 0x4d)
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#define MAX_CACHE_ERRORS 6
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#define MAX_TLB_ERRORS 6
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#define MAX_BUS_ERRORS 1
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/* Definition of version according to SAL spec for logging purposes */
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typedef struct sal_log_revision {
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u8 minor; /* BCD (0..99) */
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u8 major; /* BCD (0..99) */
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} sal_log_revision_t;
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/* Definition of timestamp according to SAL spec for logging purposes */
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typedef struct sal_log_timestamp {
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u8 slh_second; /* Second (0..59) */
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u8 slh_minute; /* Minute (0..59) */
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u8 slh_hour; /* Hour (0..23) */
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u8 slh_reserved;
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u8 slh_day; /* Day (1..31) */
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u8 slh_month; /* Month (1..12) */
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u8 slh_year; /* Year (00..99) */
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u8 slh_century; /* Century (19, 20, 21, ...) */
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} sal_log_timestamp_t;
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/* Definition of log record header structures */
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typedef struct sal_log_record_header {
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u64 id; /* Unique monotonically increasing ID */
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sal_log_revision_t revision; /* Major and Minor revision of header */
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u8 severity; /* Error Severity */
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u8 validation_bits; /* 0: platform_guid, 1: !timestamp */
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u32 len; /* Length of this error log in bytes */
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sal_log_timestamp_t timestamp; /* Timestamp */
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efi_guid_t platform_guid; /* Unique OEM Platform ID */
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} sal_log_record_header_t;
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#define sal_log_severity_recoverable 0
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#define sal_log_severity_fatal 1
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#define sal_log_severity_corrected 2
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/*
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* Error Recovery Info (ERI) bit decode. From SAL Spec section B.2.2 Table B-3
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* Error Section Error_Recovery_Info Field Definition.
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*/
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#define ERI_NOT_VALID 0x0 /* Error Recovery Field is not valid */
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#define ERI_NOT_ACCESSIBLE 0x30 /* Resource not accessible */
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#define ERI_CONTAINMENT_WARN 0x22 /* Corrupt data propagated */
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#define ERI_UNCORRECTED_ERROR 0x20 /* Uncorrected error */
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#define ERI_COMPONENT_RESET 0x24 /* Component must be reset */
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#define ERI_CORR_ERROR_LOG 0x21 /* Corrected error, needs logging */
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#define ERI_CORR_ERROR_THRESH 0x29 /* Corrected error threshold exceeded */
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/* Definition of log section header structures */
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typedef struct sal_log_sec_header {
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efi_guid_t guid; /* Unique Section ID */
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sal_log_revision_t revision; /* Major and Minor revision of Section */
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u8 error_recovery_info; /* Platform error recovery status */
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u8 reserved;
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u32 len; /* Section length */
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} sal_log_section_hdr_t;
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typedef struct sal_log_mod_error_info {
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struct {
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u64 check_info : 1,
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requestor_identifier : 1,
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responder_identifier : 1,
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target_identifier : 1,
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precise_ip : 1,
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reserved : 59;
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} valid;
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u64 check_info;
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u64 requestor_identifier;
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u64 responder_identifier;
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u64 target_identifier;
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u64 precise_ip;
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} sal_log_mod_error_info_t;
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typedef struct sal_processor_static_info {
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struct {
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u64 minstate : 1,
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br : 1,
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cr : 1,
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ar : 1,
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rr : 1,
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fr : 1,
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reserved : 58;
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} valid;
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pal_min_state_area_t min_state_area;
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u64 br[8];
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u64 cr[128];
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u64 ar[128];
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u64 rr[8];
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struct ia64_fpreg __attribute__ ((packed)) fr[128];
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} sal_processor_static_info_t;
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struct sal_cpuid_info {
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u64 regs[5];
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u64 reserved;
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};
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typedef struct sal_log_processor_info {
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sal_log_section_hdr_t header;
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struct {
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u64 proc_error_map : 1,
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proc_state_param : 1,
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proc_cr_lid : 1,
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psi_static_struct : 1,
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num_cache_check : 4,
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num_tlb_check : 4,
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num_bus_check : 4,
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num_reg_file_check : 4,
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num_ms_check : 4,
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cpuid_info : 1,
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reserved1 : 39;
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} valid;
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u64 proc_error_map;
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u64 proc_state_parameter;
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u64 proc_cr_lid;
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/*
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* The rest of this structure consists of variable-length arrays, which can't be
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* expressed in C.
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*/
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sal_log_mod_error_info_t info[0];
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/*
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* This is what the rest looked like if C supported variable-length arrays:
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*
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* sal_log_mod_error_info_t cache_check_info[.valid.num_cache_check];
|
|
* sal_log_mod_error_info_t tlb_check_info[.valid.num_tlb_check];
|
|
* sal_log_mod_error_info_t bus_check_info[.valid.num_bus_check];
|
|
* sal_log_mod_error_info_t reg_file_check_info[.valid.num_reg_file_check];
|
|
* sal_log_mod_error_info_t ms_check_info[.valid.num_ms_check];
|
|
* struct sal_cpuid_info cpuid_info;
|
|
* sal_processor_static_info_t processor_static_info;
|
|
*/
|
|
} sal_log_processor_info_t;
|
|
|
|
/* Given a sal_log_processor_info_t pointer, return a pointer to the processor_static_info: */
|
|
#define SAL_LPI_PSI_INFO(l) \
|
|
({ sal_log_processor_info_t *_l = (l); \
|
|
((sal_processor_static_info_t *) \
|
|
((char *) _l->info + ((_l->valid.num_cache_check + _l->valid.num_tlb_check \
|
|
+ _l->valid.num_bus_check + _l->valid.num_reg_file_check \
|
|
+ _l->valid.num_ms_check) * sizeof(sal_log_mod_error_info_t) \
|
|
+ sizeof(struct sal_cpuid_info)))); \
|
|
})
|
|
|
|
/* platform error log structures */
|
|
|
|
typedef struct sal_log_mem_dev_err_info {
|
|
sal_log_section_hdr_t header;
|
|
struct {
|
|
u64 error_status : 1,
|
|
physical_addr : 1,
|
|
addr_mask : 1,
|
|
node : 1,
|
|
card : 1,
|
|
module : 1,
|
|
bank : 1,
|
|
device : 1,
|
|
row : 1,
|
|
column : 1,
|
|
bit_position : 1,
|
|
requestor_id : 1,
|
|
responder_id : 1,
|
|
target_id : 1,
|
|
bus_spec_data : 1,
|
|
oem_id : 1,
|
|
oem_data : 1,
|
|
reserved : 47;
|
|
} valid;
|
|
u64 error_status;
|
|
u64 physical_addr;
|
|
u64 addr_mask;
|
|
u16 node;
|
|
u16 card;
|
|
u16 module;
|
|
u16 bank;
|
|
u16 device;
|
|
u16 row;
|
|
u16 column;
|
|
u16 bit_position;
|
|
u64 requestor_id;
|
|
u64 responder_id;
|
|
u64 target_id;
|
|
u64 bus_spec_data;
|
|
u8 oem_id[16];
|
|
u8 oem_data[1]; /* Variable length data */
|
|
} sal_log_mem_dev_err_info_t;
|
|
|
|
typedef struct sal_log_sel_dev_err_info {
|
|
sal_log_section_hdr_t header;
|
|
struct {
|
|
u64 record_id : 1,
|
|
record_type : 1,
|
|
generator_id : 1,
|
|
evm_rev : 1,
|
|
sensor_type : 1,
|
|
sensor_num : 1,
|
|
event_dir : 1,
|
|
event_data1 : 1,
|
|
event_data2 : 1,
|
|
event_data3 : 1,
|
|
reserved : 54;
|
|
} valid;
|
|
u16 record_id;
|
|
u8 record_type;
|
|
u8 timestamp[4];
|
|
u16 generator_id;
|
|
u8 evm_rev;
|
|
u8 sensor_type;
|
|
u8 sensor_num;
|
|
u8 event_dir;
|
|
u8 event_data1;
|
|
u8 event_data2;
|
|
u8 event_data3;
|
|
} sal_log_sel_dev_err_info_t;
|
|
|
|
typedef struct sal_log_pci_bus_err_info {
|
|
sal_log_section_hdr_t header;
|
|
struct {
|
|
u64 err_status : 1,
|
|
err_type : 1,
|
|
bus_id : 1,
|
|
bus_address : 1,
|
|
bus_data : 1,
|
|
bus_cmd : 1,
|
|
requestor_id : 1,
|
|
responder_id : 1,
|
|
target_id : 1,
|
|
oem_data : 1,
|
|
reserved : 54;
|
|
} valid;
|
|
u64 err_status;
|
|
u16 err_type;
|
|
u16 bus_id;
|
|
u32 reserved;
|
|
u64 bus_address;
|
|
u64 bus_data;
|
|
u64 bus_cmd;
|
|
u64 requestor_id;
|
|
u64 responder_id;
|
|
u64 target_id;
|
|
u8 oem_data[1]; /* Variable length data */
|
|
} sal_log_pci_bus_err_info_t;
|
|
|
|
typedef struct sal_log_smbios_dev_err_info {
|
|
sal_log_section_hdr_t header;
|
|
struct {
|
|
u64 event_type : 1,
|
|
length : 1,
|
|
time_stamp : 1,
|
|
data : 1,
|
|
reserved1 : 60;
|
|
} valid;
|
|
u8 event_type;
|
|
u8 length;
|
|
u8 time_stamp[6];
|
|
u8 data[1]; /* data of variable length, length == slsmb_length */
|
|
} sal_log_smbios_dev_err_info_t;
|
|
|
|
typedef struct sal_log_pci_comp_err_info {
|
|
sal_log_section_hdr_t header;
|
|
struct {
|
|
u64 err_status : 1,
|
|
comp_info : 1,
|
|
num_mem_regs : 1,
|
|
num_io_regs : 1,
|
|
reg_data_pairs : 1,
|
|
oem_data : 1,
|
|
reserved : 58;
|
|
} valid;
|
|
u64 err_status;
|
|
struct {
|
|
u16 vendor_id;
|
|
u16 device_id;
|
|
u8 class_code[3];
|
|
u8 func_num;
|
|
u8 dev_num;
|
|
u8 bus_num;
|
|
u8 seg_num;
|
|
u8 reserved[5];
|
|
} comp_info;
|
|
u32 num_mem_regs;
|
|
u32 num_io_regs;
|
|
u64 reg_data_pairs[1];
|
|
/*
|
|
* array of address/data register pairs is num_mem_regs + num_io_regs elements
|
|
* long. Each array element consists of a u64 address followed by a u64 data
|
|
* value. The oem_data array immediately follows the reg_data_pairs array
|
|
*/
|
|
u8 oem_data[1]; /* Variable length data */
|
|
} sal_log_pci_comp_err_info_t;
|
|
|
|
typedef struct sal_log_plat_specific_err_info {
|
|
sal_log_section_hdr_t header;
|
|
struct {
|
|
u64 err_status : 1,
|
|
guid : 1,
|
|
oem_data : 1,
|
|
reserved : 61;
|
|
} valid;
|
|
u64 err_status;
|
|
efi_guid_t guid;
|
|
u8 oem_data[1]; /* platform specific variable length data */
|
|
} sal_log_plat_specific_err_info_t;
|
|
|
|
typedef struct sal_log_host_ctlr_err_info {
|
|
sal_log_section_hdr_t header;
|
|
struct {
|
|
u64 err_status : 1,
|
|
requestor_id : 1,
|
|
responder_id : 1,
|
|
target_id : 1,
|
|
bus_spec_data : 1,
|
|
oem_data : 1,
|
|
reserved : 58;
|
|
} valid;
|
|
u64 err_status;
|
|
u64 requestor_id;
|
|
u64 responder_id;
|
|
u64 target_id;
|
|
u64 bus_spec_data;
|
|
u8 oem_data[1]; /* Variable length OEM data */
|
|
} sal_log_host_ctlr_err_info_t;
|
|
|
|
typedef struct sal_log_plat_bus_err_info {
|
|
sal_log_section_hdr_t header;
|
|
struct {
|
|
u64 err_status : 1,
|
|
requestor_id : 1,
|
|
responder_id : 1,
|
|
target_id : 1,
|
|
bus_spec_data : 1,
|
|
oem_data : 1,
|
|
reserved : 58;
|
|
} valid;
|
|
u64 err_status;
|
|
u64 requestor_id;
|
|
u64 responder_id;
|
|
u64 target_id;
|
|
u64 bus_spec_data;
|
|
u8 oem_data[1]; /* Variable length OEM data */
|
|
} sal_log_plat_bus_err_info_t;
|
|
|
|
/* Overall platform error section structure */
|
|
typedef union sal_log_platform_err_info {
|
|
sal_log_mem_dev_err_info_t mem_dev_err;
|
|
sal_log_sel_dev_err_info_t sel_dev_err;
|
|
sal_log_pci_bus_err_info_t pci_bus_err;
|
|
sal_log_smbios_dev_err_info_t smbios_dev_err;
|
|
sal_log_pci_comp_err_info_t pci_comp_err;
|
|
sal_log_plat_specific_err_info_t plat_specific_err;
|
|
sal_log_host_ctlr_err_info_t host_ctlr_err;
|
|
sal_log_plat_bus_err_info_t plat_bus_err;
|
|
} sal_log_platform_err_info_t;
|
|
|
|
/* SAL log over-all, multi-section error record structure (processor+platform) */
|
|
typedef struct err_rec {
|
|
sal_log_record_header_t sal_elog_header;
|
|
sal_log_processor_info_t proc_err;
|
|
sal_log_platform_err_info_t plat_err;
|
|
u8 oem_data_pad[1024];
|
|
} ia64_err_rec_t;
|
|
|
|
/*
|
|
* Now define a couple of inline functions for improved type checking
|
|
* and convenience.
|
|
*/
|
|
|
|
extern s64 ia64_sal_cache_flush (u64 cache_type);
|
|
extern void __init check_sal_cache_flush (void);
|
|
|
|
/* Initialize all the processor and platform level instruction and data caches */
|
|
static inline s64
|
|
ia64_sal_cache_init (void)
|
|
{
|
|
struct ia64_sal_retval isrv;
|
|
SAL_CALL(isrv, SAL_CACHE_INIT, 0, 0, 0, 0, 0, 0, 0);
|
|
return isrv.status;
|
|
}
|
|
|
|
/*
|
|
* Clear the processor and platform information logged by SAL with respect to the machine
|
|
* state at the time of MCA's, INITs, CMCs, or CPEs.
|
|
*/
|
|
static inline s64
|
|
ia64_sal_clear_state_info (u64 sal_info_type)
|
|
{
|
|
struct ia64_sal_retval isrv;
|
|
SAL_CALL_REENTRANT(isrv, SAL_CLEAR_STATE_INFO, sal_info_type, 0,
|
|
0, 0, 0, 0, 0);
|
|
return isrv.status;
|
|
}
|
|
|
|
|
|
/* Get the processor and platform information logged by SAL with respect to the machine
|
|
* state at the time of the MCAs, INITs, CMCs, or CPEs.
|
|
*/
|
|
static inline u64
|
|
ia64_sal_get_state_info (u64 sal_info_type, u64 *sal_info)
|
|
{
|
|
struct ia64_sal_retval isrv;
|
|
SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO, sal_info_type, 0,
|
|
sal_info, 0, 0, 0, 0);
|
|
if (isrv.status)
|
|
return 0;
|
|
|
|
return isrv.v0;
|
|
}
|
|
|
|
/*
|
|
* Get the maximum size of the information logged by SAL with respect to the machine state
|
|
* at the time of MCAs, INITs, CMCs, or CPEs.
|
|
*/
|
|
static inline u64
|
|
ia64_sal_get_state_info_size (u64 sal_info_type)
|
|
{
|
|
struct ia64_sal_retval isrv;
|
|
SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO_SIZE, sal_info_type, 0,
|
|
0, 0, 0, 0, 0);
|
|
if (isrv.status)
|
|
return 0;
|
|
return isrv.v0;
|
|
}
|
|
|
|
/*
|
|
* Causes the processor to go into a spin loop within SAL where SAL awaits a wakeup from
|
|
* the monarch processor. Must not lock, because it will not return on any cpu until the
|
|
* monarch processor sends a wake up.
|
|
*/
|
|
static inline s64
|
|
ia64_sal_mc_rendez (void)
|
|
{
|
|
struct ia64_sal_retval isrv;
|
|
SAL_CALL_NOLOCK(isrv, SAL_MC_RENDEZ, 0, 0, 0, 0, 0, 0, 0);
|
|
return isrv.status;
|
|
}
|
|
|
|
/*
|
|
* Allow the OS to specify the interrupt number to be used by SAL to interrupt OS during
|
|
* the machine check rendezvous sequence as well as the mechanism to wake up the
|
|
* non-monarch processor at the end of machine check processing.
|
|
* Returns the complete ia64_sal_retval because some calls return more than just a status
|
|
* value.
|
|
*/
|
|
static inline struct ia64_sal_retval
|
|
ia64_sal_mc_set_params (u64 param_type, u64 i_or_m, u64 i_or_m_val, u64 timeout, u64 rz_always)
|
|
{
|
|
struct ia64_sal_retval isrv;
|
|
SAL_CALL(isrv, SAL_MC_SET_PARAMS, param_type, i_or_m, i_or_m_val,
|
|
timeout, rz_always, 0, 0);
|
|
return isrv;
|
|
}
|
|
|
|
/* Read from PCI configuration space */
|
|
static inline s64
|
|
ia64_sal_pci_config_read (u64 pci_config_addr, int type, u64 size, u64 *value)
|
|
{
|
|
struct ia64_sal_retval isrv;
|
|
SAL_CALL(isrv, SAL_PCI_CONFIG_READ, pci_config_addr, size, type, 0, 0, 0, 0);
|
|
if (value)
|
|
*value = isrv.v0;
|
|
return isrv.status;
|
|
}
|
|
|
|
/* Write to PCI configuration space */
|
|
static inline s64
|
|
ia64_sal_pci_config_write (u64 pci_config_addr, int type, u64 size, u64 value)
|
|
{
|
|
struct ia64_sal_retval isrv;
|
|
SAL_CALL(isrv, SAL_PCI_CONFIG_WRITE, pci_config_addr, size, value,
|
|
type, 0, 0, 0);
|
|
return isrv.status;
|
|
}
|
|
|
|
/*
|
|
* Register physical addresses of locations needed by SAL when SAL procedures are invoked
|
|
* in virtual mode.
|
|
*/
|
|
static inline s64
|
|
ia64_sal_register_physical_addr (u64 phys_entry, u64 phys_addr)
|
|
{
|
|
struct ia64_sal_retval isrv;
|
|
SAL_CALL(isrv, SAL_REGISTER_PHYSICAL_ADDR, phys_entry, phys_addr,
|
|
0, 0, 0, 0, 0);
|
|
return isrv.status;
|
|
}
|
|
|
|
/*
|
|
* Register software dependent code locations within SAL. These locations are handlers or
|
|
* entry points where SAL will pass control for the specified event. These event handlers
|
|
* are for the bott rendezvous, MCAs and INIT scenarios.
|
|
*/
|
|
static inline s64
|
|
ia64_sal_set_vectors (u64 vector_type,
|
|
u64 handler_addr1, u64 gp1, u64 handler_len1,
|
|
u64 handler_addr2, u64 gp2, u64 handler_len2)
|
|
{
|
|
struct ia64_sal_retval isrv;
|
|
SAL_CALL(isrv, SAL_SET_VECTORS, vector_type,
|
|
handler_addr1, gp1, handler_len1,
|
|
handler_addr2, gp2, handler_len2);
|
|
|
|
return isrv.status;
|
|
}
|
|
|
|
/* Update the contents of PAL block in the non-volatile storage device */
|
|
static inline s64
|
|
ia64_sal_update_pal (u64 param_buf, u64 scratch_buf, u64 scratch_buf_size,
|
|
u64 *error_code, u64 *scratch_buf_size_needed)
|
|
{
|
|
struct ia64_sal_retval isrv;
|
|
SAL_CALL(isrv, SAL_UPDATE_PAL, param_buf, scratch_buf, scratch_buf_size,
|
|
0, 0, 0, 0);
|
|
if (error_code)
|
|
*error_code = isrv.v0;
|
|
if (scratch_buf_size_needed)
|
|
*scratch_buf_size_needed = isrv.v1;
|
|
return isrv.status;
|
|
}
|
|
|
|
/* Get physical processor die mapping in the platform. */
|
|
static inline s64
|
|
ia64_sal_physical_id_info(u16 *splid)
|
|
{
|
|
struct ia64_sal_retval isrv;
|
|
|
|
if (sal_revision < SAL_VERSION_CODE(3,2))
|
|
return -1;
|
|
|
|
SAL_CALL(isrv, SAL_PHYSICAL_ID_INFO, 0, 0, 0, 0, 0, 0, 0);
|
|
if (splid)
|
|
*splid = isrv.v0;
|
|
return isrv.status;
|
|
}
|
|
|
|
extern unsigned long sal_platform_features;
|
|
|
|
extern int (*salinfo_platform_oemdata)(const u8 *, u8 **, u64 *);
|
|
|
|
struct sal_ret_values {
|
|
long r8; long r9; long r10; long r11;
|
|
};
|
|
|
|
#define IA64_SAL_OEMFUNC_MIN 0x02000000
|
|
#define IA64_SAL_OEMFUNC_MAX 0x03ffffff
|
|
|
|
extern int ia64_sal_oemcall(struct ia64_sal_retval *, u64, u64, u64, u64, u64,
|
|
u64, u64, u64);
|
|
extern int ia64_sal_oemcall_nolock(struct ia64_sal_retval *, u64, u64, u64,
|
|
u64, u64, u64, u64, u64);
|
|
extern int ia64_sal_oemcall_reentrant(struct ia64_sal_retval *, u64, u64, u64,
|
|
u64, u64, u64, u64, u64);
|
|
extern long
|
|
ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second,
|
|
unsigned long *drift_info);
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
|
/*
|
|
* System Abstraction Layer Specification
|
|
* Section 3.2.5.1: OS_BOOT_RENDEZ to SAL return State.
|
|
* Note: region regs are stored first in head.S _start. Hence they must
|
|
* stay up front.
|
|
*/
|
|
struct sal_to_os_boot {
|
|
u64 rr[8]; /* Region Registers */
|
|
u64 br[6]; /* br0:
|
|
* return addr into SAL boot rendez routine */
|
|
u64 gr1; /* SAL:GP */
|
|
u64 gr12; /* SAL:SP */
|
|
u64 gr13; /* SAL: Task Pointer */
|
|
u64 fpsr;
|
|
u64 pfs;
|
|
u64 rnat;
|
|
u64 unat;
|
|
u64 bspstore;
|
|
u64 dcr; /* Default Control Register */
|
|
u64 iva;
|
|
u64 pta;
|
|
u64 itv;
|
|
u64 pmv;
|
|
u64 cmcv;
|
|
u64 lrr[2];
|
|
u64 gr[4];
|
|
u64 pr; /* Predicate registers */
|
|
u64 lc; /* Loop Count */
|
|
struct ia64_fpreg fp[20];
|
|
};
|
|
|
|
/*
|
|
* Global array allocated for NR_CPUS at boot time
|
|
*/
|
|
extern struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS];
|
|
|
|
extern void ia64_jump_to_sal(struct sal_to_os_boot *);
|
|
#endif
|
|
|
|
extern void ia64_sal_handler_init(void *entry_point, void *gpval);
|
|
|
|
#define PALO_MAX_TLB_PURGES 0xFFFF
|
|
#define PALO_SIG "PALO"
|
|
|
|
struct palo_table {
|
|
u8 signature[4]; /* Should be "PALO" */
|
|
u32 length;
|
|
u8 minor_revision;
|
|
u8 major_revision;
|
|
u8 checksum;
|
|
u8 reserved1[5];
|
|
u16 max_tlb_purges;
|
|
u8 reserved2[6];
|
|
};
|
|
|
|
#define NPTCG_FROM_PAL 0
|
|
#define NPTCG_FROM_PALO 1
|
|
#define NPTCG_FROM_KERNEL_PARAMETER 2
|
|
|
|
#endif /* __ASSEMBLY__ */
|
|
|
|
#endif /* _ASM_IA64_SAL_H */
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