251 lines
		
	
	
		
			6.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			251 lines
		
	
	
		
			6.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/****************************************************************************
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 * Driver for Solarflare Solarstorm network controllers and boards
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 * Copyright 2006-2008 Solarflare Communications Inc.
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 *
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 * This program is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 as published
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 * by the Free Software Foundation, incorporated herein by reference.
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 */
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/*
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 * Driver for SFP+ and XFP optical PHYs plus some support specific to the
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 * AMCC QT20xx adapters; see www.amcc.com for details
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 */
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#include <linux/timer.h>
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#include <linux/delay.h>
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#include "efx.h"
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#include "mdio_10g.h"
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#include "phy.h"
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#include "falcon.h"
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#define XFP_REQUIRED_DEVS (MDIO_DEVS_PCS |	\
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			   MDIO_DEVS_PMAPMD |	\
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			   MDIO_DEVS_PHYXS)
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#define XFP_LOOPBACKS ((1 << LOOPBACK_PCS) |		\
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		       (1 << LOOPBACK_PMAPMD) |		\
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		       (1 << LOOPBACK_NETWORK))
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/****************************************************************************/
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/* Quake-specific MDIO registers */
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#define MDIO_QUAKE_LED0_REG	(0xD006)
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/* QT2025C only */
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#define PCS_FW_HEARTBEAT_REG	0xd7ee
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#define PCS_FW_HEARTB_LBN	0
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#define PCS_FW_HEARTB_WIDTH	8
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#define PCS_UC8051_STATUS_REG	0xd7fd
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#define PCS_UC_STATUS_LBN	0
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#define PCS_UC_STATUS_WIDTH	8
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#define PCS_UC_STATUS_FW_SAVE	0x20
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#define PMA_PMD_FTX_CTRL2_REG	0xc309
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#define PMA_PMD_FTX_STATIC_LBN	13
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#define PMA_PMD_VEND1_REG	0xc001
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#define PMA_PMD_VEND1_LBTXD_LBN	15
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#define PCS_VEND1_REG	   	0xc000
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#define PCS_VEND1_LBTXD_LBN	5
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void xfp_set_led(struct efx_nic *p, int led, int mode)
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{
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	int addr = MDIO_QUAKE_LED0_REG + led;
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	efx_mdio_write(p, MDIO_MMD_PMAPMD, addr, mode);
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}
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struct xfp_phy_data {
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	enum efx_phy_mode phy_mode;
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};
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#define XFP_MAX_RESET_TIME 500
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#define XFP_RESET_WAIT 10
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static int qt2025c_wait_reset(struct efx_nic *efx)
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{
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	unsigned long timeout = jiffies + 10 * HZ;
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	int reg, old_counter = 0;
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	/* Wait for firmware heartbeat to start */
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	for (;;) {
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		int counter;
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		reg = efx_mdio_read(efx, MDIO_MMD_PCS, PCS_FW_HEARTBEAT_REG);
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		if (reg < 0)
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			return reg;
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		counter = ((reg >> PCS_FW_HEARTB_LBN) &
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			    ((1 << PCS_FW_HEARTB_WIDTH) - 1));
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		if (old_counter == 0)
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			old_counter = counter;
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		else if (counter != old_counter)
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			break;
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		if (time_after(jiffies, timeout))
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			return -ETIMEDOUT;
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		msleep(10);
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	}
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	/* Wait for firmware status to look good */
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	for (;;) {
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		reg = efx_mdio_read(efx, MDIO_MMD_PCS, PCS_UC8051_STATUS_REG);
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		if (reg < 0)
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			return reg;
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		if ((reg &
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		     ((1 << PCS_UC_STATUS_WIDTH) - 1) << PCS_UC_STATUS_LBN) >=
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		    PCS_UC_STATUS_FW_SAVE)
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			break;
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		if (time_after(jiffies, timeout))
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			return -ETIMEDOUT;
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		msleep(100);
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	}
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	return 0;
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}
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static int xfp_reset_phy(struct efx_nic *efx)
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{
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	int rc;
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	if (efx->phy_type == PHY_TYPE_QT2025C) {
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		/* Wait for the reset triggered by falcon_reset_hw()
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		 * to complete */
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		rc = qt2025c_wait_reset(efx);
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		if (rc < 0)
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			goto fail;
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	} else {
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		/* Reset the PHYXS MMD. This is documented as doing
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		 * a complete soft reset. */
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		rc = efx_mdio_reset_mmd(efx, MDIO_MMD_PHYXS,
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					XFP_MAX_RESET_TIME / XFP_RESET_WAIT,
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					XFP_RESET_WAIT);
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		if (rc < 0)
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			goto fail;
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	}
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	/* Wait 250ms for the PHY to complete bootup */
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	msleep(250);
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	/* Check that all the MMDs we expect are present and responding. We
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	 * expect faults on some if the link is down, but not on the PHY XS */
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	rc = efx_mdio_check_mmds(efx, XFP_REQUIRED_DEVS, MDIO_DEVS_PHYXS);
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	if (rc < 0)
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		goto fail;
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	efx->board_info.init_leds(efx);
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	return rc;
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 fail:
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	EFX_ERR(efx, "PHY reset timed out\n");
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	return rc;
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}
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static int xfp_phy_init(struct efx_nic *efx)
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{
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	struct xfp_phy_data *phy_data;
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	u32 devid = efx_mdio_read_id(efx, MDIO_MMD_PHYXS);
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	int rc;
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	phy_data = kzalloc(sizeof(struct xfp_phy_data), GFP_KERNEL);
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	if (!phy_data)
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		return -ENOMEM;
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	efx->phy_data = phy_data;
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	EFX_INFO(efx, "PHY ID reg %x (OUI %06x model %02x revision %x)\n",
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		 devid, efx_mdio_id_oui(devid), efx_mdio_id_model(devid),
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		 efx_mdio_id_rev(devid));
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	phy_data->phy_mode = efx->phy_mode;
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	rc = xfp_reset_phy(efx);
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	EFX_INFO(efx, "PHY init %s.\n",
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		 rc ? "failed" : "successful");
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	if (rc < 0)
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		goto fail;
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	return 0;
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 fail:
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	kfree(efx->phy_data);
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	efx->phy_data = NULL;
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	return rc;
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}
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static void xfp_phy_clear_interrupt(struct efx_nic *efx)
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{
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	/* Read to clear link status alarm */
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	efx_mdio_read(efx, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_STAT);
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}
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static int xfp_link_ok(struct efx_nic *efx)
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{
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	return efx_mdio_links_ok(efx, XFP_REQUIRED_DEVS);
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}
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static void xfp_phy_poll(struct efx_nic *efx)
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{
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	int link_up = xfp_link_ok(efx);
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	/* Simulate a PHY event if link state has changed */
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	if (link_up != efx->link_up)
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		falcon_sim_phy_event(efx);
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}
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static void xfp_phy_reconfigure(struct efx_nic *efx)
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{
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	struct xfp_phy_data *phy_data = efx->phy_data;
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	if (efx->phy_type == PHY_TYPE_QT2025C) {
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		/* There are several different register bits which can
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		 * disable TX (and save power) on direct-attach cables
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		 * or optical transceivers, varying somewhat between
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		 * firmware versions.  Only 'static mode' appears to
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		 * cover everything. */
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		mdio_set_flag(
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			&efx->mdio, efx->mdio.prtad, MDIO_MMD_PMAPMD,
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			PMA_PMD_FTX_CTRL2_REG, 1 << PMA_PMD_FTX_STATIC_LBN,
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			efx->phy_mode & PHY_MODE_TX_DISABLED ||
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			efx->phy_mode & PHY_MODE_LOW_POWER ||
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			efx->loopback_mode == LOOPBACK_PCS ||
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			efx->loopback_mode == LOOPBACK_PMAPMD);
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	} else {
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		/* Reset the PHY when moving from tx off to tx on */
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		if (!(efx->phy_mode & PHY_MODE_TX_DISABLED) &&
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		    (phy_data->phy_mode & PHY_MODE_TX_DISABLED))
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			xfp_reset_phy(efx);
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		efx_mdio_transmit_disable(efx);
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	}
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	efx_mdio_phy_reconfigure(efx);
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	phy_data->phy_mode = efx->phy_mode;
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	efx->link_up = xfp_link_ok(efx);
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	efx->link_speed = 10000;
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	efx->link_fd = true;
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	efx->link_fc = efx->wanted_fc;
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}
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static void xfp_phy_get_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
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{
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	mdio45_ethtool_gset(&efx->mdio, ecmd);
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}
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static void xfp_phy_fini(struct efx_nic *efx)
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{
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	/* Clobber the LED if it was blinking */
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	efx->board_info.blink(efx, false);
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	/* Free the context block */
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	kfree(efx->phy_data);
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	efx->phy_data = NULL;
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}
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struct efx_phy_operations falcon_xfp_phy_ops = {
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	.macs		 = EFX_XMAC,
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	.init            = xfp_phy_init,
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	.reconfigure     = xfp_phy_reconfigure,
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	.poll            = xfp_phy_poll,
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	.fini            = xfp_phy_fini,
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	.clear_interrupt = xfp_phy_clear_interrupt,
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	.get_settings    = xfp_phy_get_settings,
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	.set_settings	 = efx_mdio_set_settings,
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	.mmds            = XFP_REQUIRED_DEVS,
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	.loopbacks       = XFP_LOOPBACKS,
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};
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