143 lines
		
	
	
		
			4.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			143 lines
		
	
	
		
			4.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/* Machine-dependent software floating-point definitions.
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   S/390 kernel version.
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   Copyright (C) 1997,1998,1999 Free Software Foundation, Inc.
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   This file is part of the GNU C Library.
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   Contributed by Richard Henderson (rth@cygnus.com),
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		  Jakub Jelinek (jj@ultra.linux.cz),
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		  David S. Miller (davem@redhat.com) and
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		  Peter Maydell (pmaydell@chiark.greenend.org.uk).
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   The GNU C Library is free software; you can redistribute it and/or
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   modify it under the terms of the GNU Library General Public License as
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   published by the Free Software Foundation; either version 2 of the
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   License, or (at your option) any later version.
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   The GNU C Library is distributed in the hope that it will be useful,
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   but WITHOUT ANY WARRANTY; without even the implied warranty of
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   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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   Library General Public License for more details.
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   You should have received a copy of the GNU Library General Public
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   License along with the GNU C Library; see the file COPYING.LIB.  If
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   not, write to the Free Software Foundation, Inc.,
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   59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
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#ifndef _SFP_MACHINE_H
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#define _SFP_MACHINE_H
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#define _FP_W_TYPE_SIZE		32
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#define _FP_W_TYPE		unsigned int
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#define _FP_WS_TYPE		signed int
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#define _FP_I_TYPE		int
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#define _FP_MUL_MEAT_S(R,X,Y)					\
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  _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
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#define _FP_MUL_MEAT_D(R,X,Y)					\
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  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
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#define _FP_MUL_MEAT_Q(R,X,Y)					\
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  _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
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#define _FP_DIV_MEAT_S(R,X,Y)	_FP_DIV_MEAT_1_udiv(S,R,X,Y)
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#define _FP_DIV_MEAT_D(R,X,Y)	_FP_DIV_MEAT_2_udiv(D,R,X,Y)
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#define _FP_DIV_MEAT_Q(R,X,Y)	_FP_DIV_MEAT_4_udiv(Q,R,X,Y)
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#define _FP_NANFRAC_S		((_FP_QNANBIT_S << 1) - 1)
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#define _FP_NANFRAC_D		((_FP_QNANBIT_D << 1) - 1), -1
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#define _FP_NANFRAC_Q		((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
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#define _FP_NANSIGN_S		0
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#define _FP_NANSIGN_D		0
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#define _FP_NANSIGN_Q		0
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#define _FP_KEEPNANFRACP 1
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/*
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 * If one NaN is signaling and the other is not,
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 * we choose that one, otherwise we choose X.
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 */
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#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)                      \
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  do {                                                          \
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    if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)          \
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        && !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs))     \
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      {                                                         \
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        R##_s = Y##_s;                                          \
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        _FP_FRAC_COPY_##wc(R,Y);                                \
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      }                                                         \
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    else                                                        \
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      {                                                         \
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        R##_s = X##_s;                                          \
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        _FP_FRAC_COPY_##wc(R,X);                                \
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      }                                                         \
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    R##_c = FP_CLS_NAN;                                         \
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  } while (0)
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/* Some assembly to speed things up. */
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#define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) ({		\
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	unsigned int __r2 = (x2) + (y2);			\
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	unsigned int __r1 = (x1);				\
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	unsigned int __r0 = (x0);				\
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	asm volatile(						\
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		"	alr	%2,%3\n"			\
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		"	brc	12,0f\n"			\
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		"	lhi	0,1\n"				\
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		"	alr	%1,0\n"				\
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		"	brc	12,0f\n"			\
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		"	alr	%0,0\n"				\
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		"0:"						\
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		: "+&d" (__r2), "+&d" (__r1), "+&d" (__r0)	\
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		: "d" (y0), "i" (1) : "cc", "0" );		\
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	asm volatile(						\
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		"	alr	%1,%2\n"			\
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		"	brc	12,0f\n"			\
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		"	ahi	%0,1\n"				\
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		"0:"						\
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		: "+&d" (__r2), "+&d" (__r1)			\
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		: "d" (y1) : "cc");				\
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	(r2) = __r2;						\
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	(r1) = __r1;						\
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	(r0) = __r0;						\
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})
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#define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) ({		\
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	unsigned int __r2 = (x2) - (y2);			\
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	unsigned int __r1 = (x1);				\
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	unsigned int __r0 = (x0);				\
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	asm volatile(						\
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		"	slr   %2,%3\n"				\
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		"	brc	3,0f\n"				\
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		"	lhi	0,1\n"				\
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		"	slr	%1,0\n"				\
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		"	brc	3,0f\n"				\
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		"	slr	%0,0\n"				\
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		"0:"						\
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		: "+&d" (__r2), "+&d" (__r1), "+&d" (__r0)	\
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		: "d" (y0) : "cc", "0");			\
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	asm volatile(						\
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		"	slr	%1,%2\n"			\
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		"	brc	3,0f\n"				\
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		"	ahi	%0,-1\n"			\
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		"0:"						\
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		: "+&d" (__r2), "+&d" (__r1)			\
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		: "d" (y1) : "cc");				\
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	(r2) = __r2;						\
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	(r1) = __r1;						\
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	(r0) = __r0;						\
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})
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#define __FP_FRAC_DEC_3(x2,x1,x0,y2,y1,y0) __FP_FRAC_SUB_3(x2,x1,x0,x2,x1,x0,y2,y1,y0)
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/* Obtain the current rounding mode. */
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#define FP_ROUNDMODE	mode
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/* Exception flags. */
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#define FP_EX_INVALID		0x800000
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#define FP_EX_DIVZERO		0x400000
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#define FP_EX_OVERFLOW		0x200000
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#define FP_EX_UNDERFLOW		0x100000
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#define FP_EX_INEXACT		0x080000
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/* We write the results always */
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#define FP_INHIBIT_RESULTS 0
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#endif
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