519 lines
13 KiB
C
519 lines
13 KiB
C
/*
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* Atheros AR9170 driver
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*
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* MAC programming
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*
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* Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, see
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* http://www.gnu.org/licenses/.
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*
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* This file incorporates work covered by the following copyright and
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* permission notice:
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* Copyright (c) 2007-2008 Atheros Communications, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include "ar9170.h"
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#include "cmd.h"
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int ar9170_set_dyn_sifs_ack(struct ar9170 *ar)
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{
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u32 val;
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if (conf_is_ht40(&ar->hw->conf))
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val = 0x010a;
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else {
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if (ar->hw->conf.channel->band == IEEE80211_BAND_2GHZ)
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val = 0x105;
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else
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val = 0x104;
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}
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return ar9170_write_reg(ar, AR9170_MAC_REG_DYNAMIC_SIFS_ACK, val);
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}
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int ar9170_set_slot_time(struct ar9170 *ar)
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{
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u32 slottime = 20;
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if (!ar->vif)
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return 0;
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if ((ar->hw->conf.channel->band == IEEE80211_BAND_5GHZ) ||
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ar->vif->bss_conf.use_short_slot)
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slottime = 9;
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return ar9170_write_reg(ar, AR9170_MAC_REG_SLOT_TIME, slottime << 10);
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}
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int ar9170_set_basic_rates(struct ar9170 *ar)
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{
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u8 cck, ofdm;
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if (!ar->vif)
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return 0;
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ofdm = ar->vif->bss_conf.basic_rates >> 4;
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/* FIXME: is still necessary? */
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if (ar->hw->conf.channel->band == IEEE80211_BAND_5GHZ)
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cck = 0;
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else
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cck = ar->vif->bss_conf.basic_rates & 0xf;
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return ar9170_write_reg(ar, AR9170_MAC_REG_BASIC_RATE,
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ofdm << 8 | cck);
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}
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int ar9170_set_qos(struct ar9170 *ar)
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{
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ar9170_regwrite_begin(ar);
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ar9170_regwrite(AR9170_MAC_REG_AC0_CW, ar->edcf[0].cw_min |
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(ar->edcf[0].cw_max << 16));
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ar9170_regwrite(AR9170_MAC_REG_AC1_CW, ar->edcf[1].cw_min |
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(ar->edcf[1].cw_max << 16));
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ar9170_regwrite(AR9170_MAC_REG_AC2_CW, ar->edcf[2].cw_min |
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(ar->edcf[2].cw_max << 16));
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ar9170_regwrite(AR9170_MAC_REG_AC3_CW, ar->edcf[3].cw_min |
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(ar->edcf[3].cw_max << 16));
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ar9170_regwrite(AR9170_MAC_REG_AC4_CW, ar->edcf[4].cw_min |
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(ar->edcf[4].cw_max << 16));
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ar9170_regwrite(AR9170_MAC_REG_AC1_AC0_AIFS,
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((ar->edcf[0].aifs * 9 + 10)) |
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((ar->edcf[1].aifs * 9 + 10) << 12) |
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((ar->edcf[2].aifs * 9 + 10) << 24));
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ar9170_regwrite(AR9170_MAC_REG_AC3_AC2_AIFS,
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((ar->edcf[2].aifs * 9 + 10) >> 8) |
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((ar->edcf[3].aifs * 9 + 10) << 4) |
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((ar->edcf[4].aifs * 9 + 10) << 16));
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ar9170_regwrite(AR9170_MAC_REG_AC1_AC0_TXOP,
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ar->edcf[0].txop | ar->edcf[1].txop << 16);
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ar9170_regwrite(AR9170_MAC_REG_AC3_AC2_TXOP,
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ar->edcf[1].txop | ar->edcf[3].txop << 16);
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ar9170_regwrite_finish();
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return ar9170_regwrite_result();
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}
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static int ar9170_set_ampdu_density(struct ar9170 *ar, u8 mpdudensity)
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{
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u32 val;
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/* don't allow AMPDU density > 8us */
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if (mpdudensity > 6)
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return -EINVAL;
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/* Watch out! Otus uses slightly different density values. */
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val = 0x140a00 | (mpdudensity ? (mpdudensity + 1) : 0);
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ar9170_regwrite_begin(ar);
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ar9170_regwrite(AR9170_MAC_REG_AMPDU_DENSITY, val);
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ar9170_regwrite_finish();
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return ar9170_regwrite_result();
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}
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int ar9170_init_mac(struct ar9170 *ar)
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{
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ar9170_regwrite_begin(ar);
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ar9170_regwrite(AR9170_MAC_REG_ACK_EXTENSION, 0x40);
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ar9170_regwrite(AR9170_MAC_REG_RETRY_MAX, 0);
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/* enable MMIC */
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ar9170_regwrite(AR9170_MAC_REG_SNIFFER,
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AR9170_MAC_REG_SNIFFER_DEFAULTS);
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ar9170_regwrite(AR9170_MAC_REG_RX_THRESHOLD, 0xc1f80);
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ar9170_regwrite(AR9170_MAC_REG_RX_PE_DELAY, 0x70);
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ar9170_regwrite(AR9170_MAC_REG_EIFS_AND_SIFS, 0xa144000);
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ar9170_regwrite(AR9170_MAC_REG_SLOT_TIME, 9 << 10);
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/* CF-END mode */
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ar9170_regwrite(0x1c3b2c, 0x19000000);
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/* NAV protects ACK only (in TXOP) */
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ar9170_regwrite(0x1c3b38, 0x201);
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/* Set Beacon PHY CTRL's TPC to 0x7, TA1=1 */
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/* OTUS set AM to 0x1 */
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ar9170_regwrite(AR9170_MAC_REG_BCN_HT1, 0x8000170);
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ar9170_regwrite(AR9170_MAC_REG_BACKOFF_PROTECT, 0x105);
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/* AGG test code*/
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/* Aggregation MAX number and timeout */
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ar9170_regwrite(0x1c3b9c, 0x10000a);
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ar9170_regwrite(AR9170_MAC_REG_FRAMETYPE_FILTER,
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AR9170_MAC_REG_FTF_DEFAULTS);
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/* Enable deaggregator, response in sniffer mode */
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ar9170_regwrite(0x1c3c40, 0x1 | 1<<30);
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/* rate sets */
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ar9170_regwrite(AR9170_MAC_REG_BASIC_RATE, 0x150f);
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ar9170_regwrite(AR9170_MAC_REG_MANDATORY_RATE, 0x150f);
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ar9170_regwrite(AR9170_MAC_REG_RTS_CTS_RATE, 0x10b01bb);
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/* MIMO response control */
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ar9170_regwrite(0x1c3694, 0x4003C1E);/* bit 26~28 otus-AM */
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/* switch MAC to OTUS interface */
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ar9170_regwrite(0x1c3600, 0x3);
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ar9170_regwrite(AR9170_MAC_REG_AMPDU_RX_THRESH, 0xffff);
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/* set PHY register read timeout (??) */
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ar9170_regwrite(AR9170_MAC_REG_MISC_680, 0xf00008);
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/* Disable Rx TimeOut, workaround for BB. */
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ar9170_regwrite(AR9170_MAC_REG_RX_TIMEOUT, 0x0);
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/* Set CPU clock frequency to 88/80MHz */
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ar9170_regwrite(AR9170_PWR_REG_CLOCK_SEL,
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AR9170_PWR_CLK_AHB_80_88MHZ |
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AR9170_PWR_CLK_DAC_160_INV_DLY);
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/* Set WLAN DMA interrupt mode: generate int per packet */
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ar9170_regwrite(AR9170_MAC_REG_TXRX_MPI, 0x110011);
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ar9170_regwrite(AR9170_MAC_REG_FCS_SELECT,
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AR9170_MAC_FCS_FIFO_PROT);
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/* Disables the CF_END frame, undocumented register */
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ar9170_regwrite(AR9170_MAC_REG_TXOP_NOT_ENOUGH_IND,
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0x141E0F48);
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ar9170_regwrite_finish();
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return ar9170_regwrite_result();
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}
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static int ar9170_set_mac_reg(struct ar9170 *ar, const u32 reg, const u8 *mac)
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{
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static const u8 zero[ETH_ALEN] = { 0 };
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if (!mac)
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mac = zero;
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ar9170_regwrite_begin(ar);
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ar9170_regwrite(reg,
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(mac[3] << 24) | (mac[2] << 16) |
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(mac[1] << 8) | mac[0]);
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ar9170_regwrite(reg + 4, (mac[5] << 8) | mac[4]);
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ar9170_regwrite_finish();
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return ar9170_regwrite_result();
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}
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int ar9170_update_multicast(struct ar9170 *ar, const u64 mc_hash)
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{
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int err;
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ar9170_regwrite_begin(ar);
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ar9170_regwrite(AR9170_MAC_REG_GROUP_HASH_TBL_H, mc_hash >> 32);
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ar9170_regwrite(AR9170_MAC_REG_GROUP_HASH_TBL_L, mc_hash);
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ar9170_regwrite_finish();
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err = ar9170_regwrite_result();
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if (err)
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return err;
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ar->cur_mc_hash = mc_hash;
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return 0;
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}
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int ar9170_update_frame_filter(struct ar9170 *ar, const u32 filter)
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{
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int err;
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err = ar9170_write_reg(ar, AR9170_MAC_REG_FRAMETYPE_FILTER, filter);
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if (err)
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return err;
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ar->cur_filter = filter;
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return 0;
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}
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static int ar9170_set_promiscouous(struct ar9170 *ar)
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{
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u32 encr_mode, sniffer;
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int err;
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err = ar9170_read_reg(ar, AR9170_MAC_REG_SNIFFER, &sniffer);
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if (err)
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return err;
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err = ar9170_read_reg(ar, AR9170_MAC_REG_ENCRYPTION, &encr_mode);
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if (err)
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return err;
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if (ar->sniffer_enabled) {
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sniffer |= AR9170_MAC_REG_SNIFFER_ENABLE_PROMISC;
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/*
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* Rx decryption works in place.
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*
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* If we don't disable it, the hardware will render all
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* encrypted frames which are encrypted with an unknown
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* key useless.
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*/
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encr_mode |= AR9170_MAC_REG_ENCRYPTION_RX_SOFTWARE;
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ar->sniffer_enabled = true;
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} else {
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sniffer &= ~AR9170_MAC_REG_SNIFFER_ENABLE_PROMISC;
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if (ar->rx_software_decryption)
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encr_mode |= AR9170_MAC_REG_ENCRYPTION_RX_SOFTWARE;
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else
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encr_mode &= ~AR9170_MAC_REG_ENCRYPTION_RX_SOFTWARE;
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}
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ar9170_regwrite_begin(ar);
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ar9170_regwrite(AR9170_MAC_REG_ENCRYPTION, encr_mode);
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ar9170_regwrite(AR9170_MAC_REG_SNIFFER, sniffer);
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ar9170_regwrite_finish();
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return ar9170_regwrite_result();
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}
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int ar9170_set_operating_mode(struct ar9170 *ar)
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{
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u32 pm_mode = AR9170_MAC_REG_POWERMGT_DEFAULTS;
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u8 *mac_addr, *bssid;
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int err;
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if (ar->vif) {
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mac_addr = ar->mac_addr;
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bssid = ar->bssid;
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switch (ar->vif->type) {
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case NL80211_IFTYPE_MESH_POINT:
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case NL80211_IFTYPE_ADHOC:
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pm_mode |= AR9170_MAC_REG_POWERMGT_IBSS;
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break;
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case NL80211_IFTYPE_AP:
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pm_mode |= AR9170_MAC_REG_POWERMGT_AP;
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break;
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case NL80211_IFTYPE_WDS:
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pm_mode |= AR9170_MAC_REG_POWERMGT_AP_WDS;
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break;
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case NL80211_IFTYPE_MONITOR:
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ar->sniffer_enabled = true;
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ar->rx_software_decryption = true;
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break;
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default:
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pm_mode |= AR9170_MAC_REG_POWERMGT_STA;
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break;
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}
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} else {
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mac_addr = NULL;
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bssid = NULL;
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}
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err = ar9170_set_mac_reg(ar, AR9170_MAC_REG_MAC_ADDR_L, mac_addr);
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if (err)
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return err;
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err = ar9170_set_mac_reg(ar, AR9170_MAC_REG_BSSID_L, bssid);
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if (err)
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return err;
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err = ar9170_set_promiscouous(ar);
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if (err)
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return err;
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/* set AMPDU density to 8us. */
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err = ar9170_set_ampdu_density(ar, 6);
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if (err)
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return err;
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ar9170_regwrite_begin(ar);
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ar9170_regwrite(AR9170_MAC_REG_POWERMANAGEMENT, pm_mode);
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ar9170_regwrite_finish();
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return ar9170_regwrite_result();
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}
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int ar9170_set_hwretry_limit(struct ar9170 *ar, unsigned int max_retry)
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{
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u32 tmp = min_t(u32, 0x33333, max_retry * 0x11111);
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return ar9170_write_reg(ar, AR9170_MAC_REG_RETRY_MAX, tmp);
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}
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int ar9170_set_beacon_timers(struct ar9170 *ar)
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{
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u32 v = 0;
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u32 pretbtt = 0;
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if (ar->vif) {
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v |= ar->vif->bss_conf.beacon_int;
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if (ar->enable_beacon) {
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switch (ar->vif->type) {
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case NL80211_IFTYPE_MESH_POINT:
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case NL80211_IFTYPE_ADHOC:
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v |= BIT(25);
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break;
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case NL80211_IFTYPE_AP:
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v |= BIT(24);
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pretbtt = (ar->vif->bss_conf.beacon_int - 6) <<
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16;
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break;
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default:
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break;
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}
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}
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v |= ar->vif->bss_conf.dtim_period << 16;
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}
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ar9170_regwrite_begin(ar);
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ar9170_regwrite(AR9170_MAC_REG_PRETBTT, pretbtt);
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ar9170_regwrite(AR9170_MAC_REG_BCN_PERIOD, v);
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ar9170_regwrite_finish();
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return ar9170_regwrite_result();
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}
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int ar9170_update_beacon(struct ar9170 *ar)
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{
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struct sk_buff *skb;
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__le32 *data, *old = NULL;
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u32 word;
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int i;
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skb = ieee80211_beacon_get(ar->hw, ar->vif);
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if (!skb)
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return -ENOMEM;
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data = (__le32 *)skb->data;
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if (ar->beacon)
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old = (__le32 *)ar->beacon->data;
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ar9170_regwrite_begin(ar);
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for (i = 0; i < DIV_ROUND_UP(skb->len, 4); i++) {
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/*
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* XXX: This accesses beyond skb data for up
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* to the last 3 bytes!!
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*/
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if (old && (data[i] == old[i]))
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continue;
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word = le32_to_cpu(data[i]);
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ar9170_regwrite(AR9170_BEACON_BUFFER_ADDRESS + 4 * i, word);
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}
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/* XXX: use skb->cb info */
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if (ar->hw->conf.channel->band == IEEE80211_BAND_2GHZ)
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ar9170_regwrite(AR9170_MAC_REG_BCN_PLCP,
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((skb->len + 4) << (3 + 16)) + 0x0400);
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else
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ar9170_regwrite(AR9170_MAC_REG_BCN_PLCP,
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((skb->len + 4) << 16) + 0x001b);
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ar9170_regwrite(AR9170_MAC_REG_BCN_LENGTH, skb->len + 4);
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ar9170_regwrite(AR9170_MAC_REG_BCN_ADDR, AR9170_BEACON_BUFFER_ADDRESS);
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ar9170_regwrite(AR9170_MAC_REG_BCN_CTRL, 1);
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ar9170_regwrite_finish();
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dev_kfree_skb(ar->beacon);
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ar->beacon = skb;
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return ar9170_regwrite_result();
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}
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void ar9170_new_beacon(struct work_struct *work)
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{
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struct ar9170 *ar = container_of(work, struct ar9170,
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beacon_work);
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struct sk_buff *skb;
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if (unlikely(!IS_STARTED(ar)))
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return ;
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mutex_lock(&ar->mutex);
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if (!ar->vif)
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goto out;
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ar9170_update_beacon(ar);
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rcu_read_lock();
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while ((skb = ieee80211_get_buffered_bc(ar->hw, ar->vif)))
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ar9170_op_tx(ar->hw, skb);
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rcu_read_unlock();
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out:
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mutex_unlock(&ar->mutex);
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}
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|
|
|
int ar9170_upload_key(struct ar9170 *ar, u8 id, const u8 *mac, u8 ktype,
|
|
u8 keyidx, u8 *keydata, int keylen)
|
|
{
|
|
__le32 vals[7];
|
|
static const u8 bcast[ETH_ALEN] =
|
|
{ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
|
|
u8 dummy;
|
|
|
|
mac = mac ? : bcast;
|
|
|
|
vals[0] = cpu_to_le32((keyidx << 16) + id);
|
|
vals[1] = cpu_to_le32(mac[1] << 24 | mac[0] << 16 | ktype);
|
|
vals[2] = cpu_to_le32(mac[5] << 24 | mac[4] << 16 |
|
|
mac[3] << 8 | mac[2]);
|
|
memset(&vals[3], 0, 16);
|
|
if (keydata)
|
|
memcpy(&vals[3], keydata, keylen);
|
|
|
|
return ar->exec_cmd(ar, AR9170_CMD_EKEY,
|
|
sizeof(vals), (u8 *)vals,
|
|
1, &dummy);
|
|
}
|
|
|
|
int ar9170_disable_key(struct ar9170 *ar, u8 id)
|
|
{
|
|
__le32 val = cpu_to_le32(id);
|
|
u8 dummy;
|
|
|
|
return ar->exec_cmd(ar, AR9170_CMD_EKEY,
|
|
sizeof(val), (u8 *)&val,
|
|
1, &dummy);
|
|
}
|