309 lines
9.1 KiB
C
309 lines
9.1 KiB
C
/*
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* xHCI host controller driver
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*
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* Copyright (C) 2008 Intel Corp.
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*
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* Author: Sarah Sharp
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* Some code borrowed from the Linux EHCI driver.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software Foundation,
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* Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <asm/unaligned.h>
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#include "xhci.h"
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static void xhci_hub_descriptor(struct xhci_hcd *xhci,
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struct usb_hub_descriptor *desc)
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{
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int ports;
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u16 temp;
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ports = HCS_MAX_PORTS(xhci->hcs_params1);
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/* USB 3.0 hubs have a different descriptor, but we fake this for now */
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desc->bDescriptorType = 0x29;
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desc->bPwrOn2PwrGood = 10; /* xhci section 5.4.9 says 20ms max */
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desc->bHubContrCurrent = 0;
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desc->bNbrPorts = ports;
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temp = 1 + (ports / 8);
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desc->bDescLength = 7 + 2 * temp;
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/* Why does core/hcd.h define bitmap? It's just confusing. */
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memset(&desc->DeviceRemovable[0], 0, temp);
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memset(&desc->DeviceRemovable[temp], 0xff, temp);
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/* Ugh, these should be #defines, FIXME */
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/* Using table 11-13 in USB 2.0 spec. */
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temp = 0;
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/* Bits 1:0 - support port power switching, or power always on */
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if (HCC_PPC(xhci->hcc_params))
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temp |= 0x0001;
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else
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temp |= 0x0002;
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/* Bit 2 - root hubs are not part of a compound device */
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/* Bits 4:3 - individual port over current protection */
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temp |= 0x0008;
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/* Bits 6:5 - no TTs in root ports */
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/* Bit 7 - no port indicators */
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desc->wHubCharacteristics = (__force __u16) cpu_to_le16(temp);
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}
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static unsigned int xhci_port_speed(unsigned int port_status)
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{
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if (DEV_LOWSPEED(port_status))
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return 1 << USB_PORT_FEAT_LOWSPEED;
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if (DEV_HIGHSPEED(port_status))
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return 1 << USB_PORT_FEAT_HIGHSPEED;
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if (DEV_SUPERSPEED(port_status))
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return 1 << USB_PORT_FEAT_SUPERSPEED;
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/*
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* FIXME: Yes, we should check for full speed, but the core uses that as
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* a default in portspeed() in usb/core/hub.c (which is the only place
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* USB_PORT_FEAT_*SPEED is used).
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*/
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return 0;
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}
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/*
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* These bits are Read Only (RO) and should be saved and written to the
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* registers: 0, 3, 10:13, 30
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* connect status, over-current status, port speed, and device removable.
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* connect status and port speed are also sticky - meaning they're in
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* the AUX well and they aren't changed by a hot, warm, or cold reset.
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*/
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#define XHCI_PORT_RO ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
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/*
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* These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
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* bits 5:8, 9, 14:15, 25:27
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* link state, port power, port indicator state, "wake on" enable state
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*/
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#define XHCI_PORT_RWS ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
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/*
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* These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
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* bit 4 (port reset)
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*/
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#define XHCI_PORT_RW1S ((1<<4))
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/*
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* These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
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* bits 1, 17, 18, 19, 20, 21, 22, 23
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* port enable/disable, and
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* change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
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* over-current, reset, link state, and L1 change
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*/
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#define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
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/*
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* Bit 16 is RW, and writing a '1' to it causes the link state control to be
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* latched in
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*/
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#define XHCI_PORT_RW ((1<<16))
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/*
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* These bits are Reserved Zero (RsvdZ) and zero should be written to them:
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* bits 2, 24, 28:31
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*/
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#define XHCI_PORT_RZ ((1<<2) | (1<<24) | (0xf<<28))
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/*
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* Given a port state, this function returns a value that would result in the
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* port being in the same state, if the value was written to the port status
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* control register.
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* Save Read Only (RO) bits and save read/write bits where
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* writing a 0 clears the bit and writing a 1 sets the bit (RWS).
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* For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
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*/
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static u32 xhci_port_state_to_neutral(u32 state)
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{
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/* Save read-only status and port state */
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return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
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}
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int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
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u16 wIndex, char *buf, u16 wLength)
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{
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struct xhci_hcd *xhci = hcd_to_xhci(hcd);
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int ports;
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unsigned long flags;
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u32 temp, status;
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int retval = 0;
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u32 __iomem *addr;
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char *port_change_bit;
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ports = HCS_MAX_PORTS(xhci->hcs_params1);
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spin_lock_irqsave(&xhci->lock, flags);
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switch (typeReq) {
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case GetHubStatus:
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/* No power source, over-current reported per port */
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memset(buf, 0, 4);
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break;
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case GetHubDescriptor:
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xhci_hub_descriptor(xhci, (struct usb_hub_descriptor *) buf);
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break;
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case GetPortStatus:
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if (!wIndex || wIndex > ports)
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goto error;
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wIndex--;
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status = 0;
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addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);
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temp = xhci_readl(xhci, addr);
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xhci_dbg(xhci, "get port status, actual port %d status = 0x%x\n", wIndex, temp);
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/* wPortChange bits */
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if (temp & PORT_CSC)
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status |= 1 << USB_PORT_FEAT_C_CONNECTION;
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if (temp & PORT_PEC)
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status |= 1 << USB_PORT_FEAT_C_ENABLE;
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if ((temp & PORT_OCC))
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status |= 1 << USB_PORT_FEAT_C_OVER_CURRENT;
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/*
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* FIXME ignoring suspend, reset, and USB 2.1/3.0 specific
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* changes
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*/
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if (temp & PORT_CONNECT) {
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status |= 1 << USB_PORT_FEAT_CONNECTION;
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status |= xhci_port_speed(temp);
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}
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if (temp & PORT_PE)
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status |= 1 << USB_PORT_FEAT_ENABLE;
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if (temp & PORT_OC)
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status |= 1 << USB_PORT_FEAT_OVER_CURRENT;
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if (temp & PORT_RESET)
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status |= 1 << USB_PORT_FEAT_RESET;
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if (temp & PORT_POWER)
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status |= 1 << USB_PORT_FEAT_POWER;
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xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
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put_unaligned(cpu_to_le32(status), (__le32 *) buf);
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break;
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case SetPortFeature:
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wIndex &= 0xff;
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if (!wIndex || wIndex > ports)
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goto error;
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wIndex--;
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addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);
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temp = xhci_readl(xhci, addr);
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temp = xhci_port_state_to_neutral(temp);
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switch (wValue) {
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case USB_PORT_FEAT_POWER:
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/*
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* Turn on ports, even if there isn't per-port switching.
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* HC will report connect events even before this is set.
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* However, khubd will ignore the roothub events until
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* the roothub is registered.
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*/
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xhci_writel(xhci, temp | PORT_POWER, addr);
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temp = xhci_readl(xhci, addr);
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xhci_dbg(xhci, "set port power, actual port %d status = 0x%x\n", wIndex, temp);
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break;
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case USB_PORT_FEAT_RESET:
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temp = (temp | PORT_RESET);
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xhci_writel(xhci, temp, addr);
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temp = xhci_readl(xhci, addr);
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xhci_dbg(xhci, "set port reset, actual port %d status = 0x%x\n", wIndex, temp);
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break;
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default:
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goto error;
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}
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temp = xhci_readl(xhci, addr); /* unblock any posted writes */
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break;
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case ClearPortFeature:
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if (!wIndex || wIndex > ports)
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goto error;
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wIndex--;
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addr = &xhci->op_regs->port_status_base +
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NUM_PORT_REGS*(wIndex & 0xff);
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temp = xhci_readl(xhci, addr);
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temp = xhci_port_state_to_neutral(temp);
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switch (wValue) {
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case USB_PORT_FEAT_C_RESET:
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status = PORT_RC;
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port_change_bit = "reset";
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break;
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case USB_PORT_FEAT_C_CONNECTION:
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status = PORT_CSC;
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port_change_bit = "connect";
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break;
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case USB_PORT_FEAT_C_OVER_CURRENT:
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status = PORT_OCC;
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port_change_bit = "over-current";
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break;
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default:
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goto error;
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}
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/* Change bits are all write 1 to clear */
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xhci_writel(xhci, temp | status, addr);
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temp = xhci_readl(xhci, addr);
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xhci_dbg(xhci, "clear port %s change, actual port %d status = 0x%x\n",
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port_change_bit, wIndex, temp);
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temp = xhci_readl(xhci, addr); /* unblock any posted writes */
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break;
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default:
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error:
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/* "stall" on error */
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retval = -EPIPE;
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}
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spin_unlock_irqrestore(&xhci->lock, flags);
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return retval;
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}
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/*
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* Returns 0 if the status hasn't changed, or the number of bytes in buf.
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* Ports are 0-indexed from the HCD point of view,
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* and 1-indexed from the USB core pointer of view.
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* xHCI instances can have up to 127 ports, so FIXME if you see more than 15.
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*
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* Note that the status change bits will be cleared as soon as a port status
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* change event is generated, so we use the saved status from that event.
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*/
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int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
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{
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unsigned long flags;
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u32 temp, status;
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int i, retval;
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struct xhci_hcd *xhci = hcd_to_xhci(hcd);
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int ports;
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u32 __iomem *addr;
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ports = HCS_MAX_PORTS(xhci->hcs_params1);
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/* Initial status is no changes */
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buf[0] = 0;
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status = 0;
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if (ports > 7) {
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buf[1] = 0;
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retval = 2;
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} else {
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retval = 1;
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}
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spin_lock_irqsave(&xhci->lock, flags);
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/* For each port, did anything change? If so, set that bit in buf. */
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for (i = 0; i < ports; i++) {
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addr = &xhci->op_regs->port_status_base +
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NUM_PORT_REGS*i;
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temp = xhci_readl(xhci, addr);
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if (temp & (PORT_CSC | PORT_PEC | PORT_OCC)) {
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if (i < 7)
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buf[0] |= 1 << (i + 1);
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else
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buf[1] |= 1 << (i - 7);
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status = 1;
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}
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}
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spin_unlock_irqrestore(&xhci->lock, flags);
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return status ? retval : 0;
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}
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