218 lines
		
	
	
		
			5.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			218 lines
		
	
	
		
			5.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright(c) 2004 - 2009 Intel Corporation. All rights reserved.
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 *
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 * This program is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License as published by the Free
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 * Software Foundation; either version 2 of the License, or (at your option)
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 * any later version.
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 *
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 * This program is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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 * more details.
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 *
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 * You should have received a copy of the GNU General Public License along with
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 * this program; if not, write to the Free Software Foundation, Inc., 59
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 * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
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 *
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 * The full GNU General Public License is included in this distribution in the
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 * file called COPYING.
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 */
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#ifndef _IOAT_HW_H_
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#define _IOAT_HW_H_
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/* PCI Configuration Space Values */
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#define IOAT_PCI_VID            0x8086
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#define IOAT_MMIO_BAR		0
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/* CB device ID's */
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#define IOAT_PCI_DID_5000       0x1A38
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#define IOAT_PCI_DID_CNB        0x360B
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#define IOAT_PCI_DID_SCNB       0x65FF
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#define IOAT_PCI_DID_SNB        0x402F
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#define IOAT_PCI_RID            0x00
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#define IOAT_PCI_SVID           0x8086
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#define IOAT_PCI_SID            0x8086
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#define IOAT_VER_1_2            0x12    /* Version 1.2 */
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#define IOAT_VER_2_0            0x20    /* Version 2.0 */
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#define IOAT_VER_3_0            0x30    /* Version 3.0 */
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#define IOAT_VER_3_2            0x32    /* Version 3.2 */
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int system_has_dca_enabled(struct pci_dev *pdev);
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struct ioat_dma_descriptor {
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	uint32_t	size;
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	union {
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		uint32_t ctl;
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		struct {
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			unsigned int int_en:1;
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			unsigned int src_snoop_dis:1;
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			unsigned int dest_snoop_dis:1;
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			unsigned int compl_write:1;
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			unsigned int fence:1;
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			unsigned int null:1;
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			unsigned int src_brk:1;
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			unsigned int dest_brk:1;
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			unsigned int bundle:1;
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			unsigned int dest_dca:1;
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			unsigned int hint:1;
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			unsigned int rsvd2:13;
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			#define IOAT_OP_COPY 0x00
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			unsigned int op:8;
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		} ctl_f;
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	};
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	uint64_t	src_addr;
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	uint64_t	dst_addr;
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	uint64_t	next;
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	uint64_t	rsv1;
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	uint64_t	rsv2;
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	/* store some driver data in an unused portion of the descriptor */
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	union {
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		uint64_t	user1;
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		uint64_t	tx_cnt;
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	};
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	uint64_t	user2;
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};
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struct ioat_fill_descriptor {
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	uint32_t	size;
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	union {
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		uint32_t ctl;
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		struct {
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			unsigned int int_en:1;
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			unsigned int rsvd:1;
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			unsigned int dest_snoop_dis:1;
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			unsigned int compl_write:1;
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			unsigned int fence:1;
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			unsigned int rsvd2:2;
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			unsigned int dest_brk:1;
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			unsigned int bundle:1;
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			unsigned int rsvd4:15;
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			#define IOAT_OP_FILL 0x01
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			unsigned int op:8;
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		} ctl_f;
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	};
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	uint64_t	src_data;
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	uint64_t	dst_addr;
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	uint64_t	next;
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	uint64_t	rsv1;
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	uint64_t	next_dst_addr;
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	uint64_t	user1;
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	uint64_t	user2;
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};
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struct ioat_xor_descriptor {
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	uint32_t	size;
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	union {
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		uint32_t ctl;
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		struct {
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			unsigned int int_en:1;
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			unsigned int src_snoop_dis:1;
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			unsigned int dest_snoop_dis:1;
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			unsigned int compl_write:1;
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			unsigned int fence:1;
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			unsigned int src_cnt:3;
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			unsigned int bundle:1;
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			unsigned int dest_dca:1;
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			unsigned int hint:1;
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			unsigned int rsvd:13;
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			#define IOAT_OP_XOR 0x87
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			#define IOAT_OP_XOR_VAL 0x88
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			unsigned int op:8;
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		} ctl_f;
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	};
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	uint64_t	src_addr;
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	uint64_t	dst_addr;
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	uint64_t	next;
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	uint64_t	src_addr2;
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	uint64_t	src_addr3;
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	uint64_t	src_addr4;
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	uint64_t	src_addr5;
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};
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struct ioat_xor_ext_descriptor {
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	uint64_t	src_addr6;
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	uint64_t	src_addr7;
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	uint64_t	src_addr8;
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	uint64_t	next;
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	uint64_t	rsvd[4];
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};
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struct ioat_pq_descriptor {
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	uint32_t	size;
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	union {
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		uint32_t ctl;
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		struct {
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			unsigned int int_en:1;
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			unsigned int src_snoop_dis:1;
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			unsigned int dest_snoop_dis:1;
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			unsigned int compl_write:1;
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			unsigned int fence:1;
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			unsigned int src_cnt:3;
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			unsigned int bundle:1;
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			unsigned int dest_dca:1;
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			unsigned int hint:1;
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			unsigned int p_disable:1;
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			unsigned int q_disable:1;
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			unsigned int rsvd:11;
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			#define IOAT_OP_PQ 0x89
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			#define IOAT_OP_PQ_VAL 0x8a
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			unsigned int op:8;
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		} ctl_f;
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	};
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	uint64_t	src_addr;
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	uint64_t	p_addr;
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	uint64_t	next;
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	uint64_t	src_addr2;
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	uint64_t	src_addr3;
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	uint8_t		coef[8];
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	uint64_t	q_addr;
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};
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struct ioat_pq_ext_descriptor {
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	uint64_t	src_addr4;
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	uint64_t	src_addr5;
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	uint64_t	src_addr6;
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	uint64_t	next;
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	uint64_t	src_addr7;
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	uint64_t	src_addr8;
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	uint64_t	rsvd[2];
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};
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struct ioat_pq_update_descriptor {
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	uint32_t	size;
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	union {
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		uint32_t ctl;
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		struct {
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			unsigned int int_en:1;
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			unsigned int src_snoop_dis:1;
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			unsigned int dest_snoop_dis:1;
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			unsigned int compl_write:1;
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			unsigned int fence:1;
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			unsigned int src_cnt:3;
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			unsigned int bundle:1;
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			unsigned int dest_dca:1;
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			unsigned int hint:1;
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			unsigned int p_disable:1;
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			unsigned int q_disable:1;
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			unsigned int rsvd:3;
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			unsigned int coef:8;
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			#define IOAT_OP_PQ_UP 0x8b
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			unsigned int op:8;
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		} ctl_f;
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	};
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	uint64_t	src_addr;
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	uint64_t	p_addr;
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	uint64_t	next;
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	uint64_t	src_addr2;
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	uint64_t	p_src;
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	uint64_t	q_src;
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	uint64_t	q_addr;
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};
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struct ioat_raw_descriptor {
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	uint64_t	field[8];
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};
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#endif
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