296 lines
7.6 KiB
C
296 lines
7.6 KiB
C
/* arch/arm/mach-msm/dex_comm.c
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*
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* Author: maejrep
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* Markinus
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Based on proc_comm.c by Brian Swetland
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*/
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/gpio.h>
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#include <linux/irq.h>
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#include <linux/spinlock.h>
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#include <mach/msm_iomap.h>
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#include <mach/system.h>
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#include <mach/irqs.h>
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#include <asm/mach-types.h>
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#include "dex_comm.h"
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// from board-htcleo-power.c
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void notify_vbus_change_intr(void);
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#define MSM_A2M_INT(n) (MSM_CSR_BASE + 0x400 + (n) * 4)
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static unsigned base = 0;
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static inline void notify_other_dex_comm(void)
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{
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uint8_t dex_irq;
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if(machine_is_htcleo())
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dex_irq = 4;
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else
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dex_irq = 6;
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writel(1, MSM_A2M_INT(dex_irq));
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}
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#define PC_DEBUG 1
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#define PC_COMMAND 0x00
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#define PC_STATUS 0x04
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#define PC_SERIAL 0x08
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#define PC_SERIAL_CHECK 0x0C
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#define PC_DATA 0x20
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#define PC_DATA_RESULT 0x24
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#define PC_NOTIFY 0x28
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#define PC_DATA2 0x30
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#define PC_DATA_RESULT2 0x34
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#define PC_READY 0x3c
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#if (PC_DEBUG > 0)
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#define DDEX(fmt, arg...) printk(KERN_DEBUG "[DEX] %s: " fmt "\n", __FUNCTION__, ## arg)
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#else
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#define DDEX(fmt, arg...) do {} while (0)
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#endif
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static DEFINE_SPINLOCK(dex_comm_lock);
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/* The higher level SMD support will install this to
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* provide a way to check for and handle modem restart?
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*/
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int (*msm_check_for_modem_crash)(void);
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#define TIMEOUT (10000000) /* 10s in microseconds */
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int dex_comm(unsigned cmd, unsigned *data1, unsigned *data2)
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{
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unsigned long flags;
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unsigned timeout;
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unsigned status;
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unsigned num, dex_has_data, dex_cmd=0, dex_data=0, dex_data2=0;
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unsigned base_cmd, base_status;
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dex_has_data = data1 ? 1 : data2 ? 1 : 0;
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dex_data = data1 ? *data1 : 0;
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dex_data2 = data2 ? *data2 : 0;
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dex_cmd = cmd;
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spin_lock_irqsave(&dex_comm_lock, flags);
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DDEX("waiting for modem; command=0x%02x data=0x%x data2=0x%x has_data=0x%x", dex_cmd, dex_data, dex_data2, dex_has_data);
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DDEX("Check DEX Status: %d base adress: 0x%x\n", readl(base + PC_READY), base);
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// Store original cmd byte
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base_cmd = dex_cmd & 0xff;
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// Write only lowest byte
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writeb(base_cmd, base + PC_COMMAND);
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// If we have data to pass, add 0x100 bit and store the data
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if ( dex_has_data )
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{
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writel(readl(base + PC_COMMAND) | DEX_HAS_DATA, base + PC_COMMAND);
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writel(dex_data, base + PC_DATA);
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writel(dex_data2, base + PC_DATA2);
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} else {
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writel(readl(base + PC_COMMAND) & ~DEX_HAS_DATA, base + PC_COMMAND);
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writel(0, base + PC_DATA);
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writel(0, base + PC_DATA2);
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}
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// Increment last serial counter
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num = readl(base + PC_SERIAL) + 1;
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writel(num, base + PC_SERIAL);
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DDEX("command and data sent (cntr=0x%x) ...", num);
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// Notify ARM9 with int6
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notify_other_dex_comm();
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// Wait for response... XXX: check irq stat?
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timeout = TIMEOUT;
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while ( --timeout && readl(base + PC_SERIAL_CHECK) != num )
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udelay(1);
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if ( ! timeout )
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{
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printk(KERN_WARNING "%s: DEX cmd timed out. status=0x%x, A2Mcntr=%x, M2Acntr=%x\n",
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__func__, readl(base + PC_STATUS), num, readl(base + PC_SERIAL_CHECK));
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goto end;
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}
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DDEX("command result status = 0x%08x", readl(base + PC_STATUS));
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// Read status of command
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status = readl(base + PC_STATUS);
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writeb(0, base + PC_STATUS);
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base_status = status & 0xff;
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DDEX("status new = 0x%x; status base = 0x%x",
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readl(base + PC_STATUS), base_status);
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if ( base_status == base_cmd )
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{
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if ( status & DEX_STATUS_FAIL )
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{
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DDEX("DEX cmd failed; status=%x, result=%x",
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readl(base + PC_STATUS),
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readl(base + PC_DATA_RESULT));
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writel(readl(base + PC_STATUS) & ~DEX_STATUS_FAIL, base + PC_STATUS);
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}
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else if ( status & DEX_HAS_DATA )
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{
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writel(readl(base + PC_STATUS) & ~DEX_HAS_DATA, base + PC_STATUS);
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if (data1)
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*data1 = readl(base + PC_DATA_RESULT);
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if (data2)
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*data2 = readl(base + PC_DATA_RESULT2);
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DDEX("DEX output data = 0x%x data2 = 0x%x ",
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readl(base + PC_DATA_RESULT), readl(base + PC_DATA_RESULT2));
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}
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} else {
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printk(KERN_WARNING "%s: DEX Code not match! a2m[0x%x], m2a[0x%x], a2m_num[0x%x], m2a_num[0x%x]\n",
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__func__, base_cmd, base_status, num, readl(base + PC_SERIAL_CHECK));
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}
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end:
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writel(0, base + PC_DATA_RESULT);
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writel(0, base + PC_STATUS);
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spin_unlock_irqrestore(&dex_comm_lock, flags);
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return 0;
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}
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int dex_audio(int param)
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{
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return dex_comm(DEX_AUDIO_CALL, ¶m, 0);
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}
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#if defined(CONFIG_ARCH_QSD8X50)
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#define PLLn_BASE(n) (MSM_CLK_CTL_BASE + 0x300 + 32 * (n))
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#else
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#define PLLn_BASE(n) (MSM_CLK_CTL_BASE + 0x300 + 28 * (n))
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#endif
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#define TCX0 19200000 // Hz
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#define PLL_FREQ(l, m, n) (TCX0 * (l) + TCX0 * (m) / (n))
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#define DUMP_PLL(name, base) { \
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unsigned int mode, L, M, N, freq; \
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mode = readl(base); \
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L = readl(base + 0x4); \
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M = readl(base + 0x8); \
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N = readl(base + 0xc); \
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freq = PLL_FREQ(L, M, N); \
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printk(KERN_INFO "%s @ %p: MODE=%08x L=%08x M=%08x N=%08x freq=%u Hz (%u MHz)\n", \
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name, base, mode, L, M, N, freq, freq / 1000000); \
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}
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// Dump useful debug stuff
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void dump_debug_stuff(void)
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{
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unsigned int pcb_xc, ver_base;
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char amss_ver[16];
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if (machine_is_htcleo()) {
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ver_base = 0xef230;
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// Dump PLL params (for debug purposes, no relation to dex_comm)
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DUMP_PLL("PLL0", PLLn_BASE(0));
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DUMP_PLL("PLL1", PLLn_BASE(1));
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DUMP_PLL("PLL4", PLLn_BASE(4));
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DUMP_PLL("PLL5", PLLn_BASE(5));
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}
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else {
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ver_base = 0xfc030;
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// Dump PLL params (for debug purposes, no relation to dex_comm)
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DUMP_PLL("PLL0", PLLn_BASE(0));
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DUMP_PLL("PLL1", PLLn_BASE(1));
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DUMP_PLL("PLL2", PLLn_BASE(2));
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DUMP_PLL("PLL3", PLLn_BASE(3));
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}
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// Dump PCB XC
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pcb_xc = readl(MSM_SHARED_RAM_BASE + ver_base + 0x18);
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printk(KERN_INFO "PCB XC: %08x\n", pcb_xc);
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// Dump AMMS version
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*(unsigned int *) (amss_ver + 0x0) = readl(MSM_SHARED_RAM_BASE + ver_base + 0x0);
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*(unsigned int *) (amss_ver + 0x4) = readl(MSM_SHARED_RAM_BASE + ver_base + 0x4);
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*(unsigned int *) (amss_ver + 0x8) = readl(MSM_SHARED_RAM_BASE + ver_base + 0x8);
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*(unsigned int *) (amss_ver + 0xc) = readl(MSM_SHARED_RAM_BASE + ver_base + 0xc);
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amss_ver[15] = 0;
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printk(KERN_INFO "AMSS version: %s\n", amss_ver);
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}
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///////////////////////////////////////////////////////////////////////
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// DEX callback
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///////////////////////////////////////////////////////////////////////
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static irqreturn_t dex_cb_interrupt(int irq, void *dev_id)
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{
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uint32_t nt;
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nt = readl(base + PC_NOTIFY);
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writeb(0, base + PC_NOTIFY); // clear state
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// printk("###DEX CB INTR[%08X]###\n", nt);
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if (nt & 2) // VBUS state changed
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{
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notify_vbus_change_intr();
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}
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return IRQ_HANDLED;
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}
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static struct irqaction dex_callback_irq =
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{
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.name = "dex_cb",
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.flags = IRQF_TRIGGER_RISING, //IRQF_DISABLED,
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.handler = dex_cb_interrupt
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};
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// Initialize DEX registers
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int init_dex_comm()
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{
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unsigned long flags;
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setup_irq(INT_A9_M2A_4, &dex_callback_irq);
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if(machine_is_htcleo())
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base = (unsigned)(MSM_SHARED_RAM_BASE + 0xefe00);
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else
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base = (unsigned)(MSM_SHARED_RAM_BASE + 0xfc100);
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spin_lock_irqsave(&dex_comm_lock, flags);
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writel(0, base + PC_DATA);
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writel(0, base + PC_DATA_RESULT);
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writel(0, base + PC_SERIAL);
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writel(0, base + PC_SERIAL_CHECK);
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writel(0, base + PC_STATUS);
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spin_unlock_irqrestore(&dex_comm_lock, flags);
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printk(KERN_INFO "%s: WinCE DEX initialized.\n", __func__);
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dump_debug_stuff();
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return 0;
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}
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