120 lines
		
	
	
		
			4.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			120 lines
		
	
	
		
			4.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/* to be used by qlogicfas and qlogic_cs */
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#ifndef __QLOGICFAS408_H
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#define __QLOGICFAS408_H
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/*----------------------------------------------------------------*/
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/* Configuration */
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/* Set the following to max out the speed of the PIO PseudoDMA transfers,
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   again, 0 tends to be slower, but more stable.  */
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#define QL_TURBO_PDMA 1
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/* This should be 1 to enable parity detection */
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#define QL_ENABLE_PARITY 1
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/* This will reset all devices when the driver is initialized (during bootup).
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   The other linux drivers don't do this, but the DOS drivers do, and after
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   using DOS or some kind of crash or lockup this will bring things back
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   without requiring a cold boot.  It does take some time to recover from a
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   reset, so it is slower, and I have seen timeouts so that devices weren't
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   recognized when this was set. */
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#define QL_RESET_AT_START 0
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/* crystal frequency in megahertz (for offset 5 and 9)
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   Please set this for your card.  Most Qlogic cards are 40 Mhz.  The
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   Control Concepts ISA (not VLB) is 24 Mhz */
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#define XTALFREQ	40
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/**********/
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/* DANGER! modify these at your own risk */
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/* SLOWCABLE can usually be reset to zero if you have a clean setup and
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   proper termination.  The rest are for synchronous transfers and other
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   advanced features if your device can transfer faster than 5Mb/sec.
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   If you are really curious, email me for a quick howto until I have
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   something official */
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/**********/
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/*****/
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/* config register 1 (offset 8) options */
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/* This needs to be set to 1 if your cabling is long or noisy */
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#define SLOWCABLE 1
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/*****/
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/* offset 0xc */
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/* This will set fast (10Mhz) synchronous timing when set to 1
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   For this to have an effect, FASTCLK must also be 1 */
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#define FASTSCSI 0
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/* This when set to 1 will set a faster sync transfer rate */
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#define FASTCLK 0	/*(XTALFREQ>25?1:0)*/
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/*****/
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/* offset 6 */
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/* This is the sync transfer divisor, XTALFREQ/X will be the maximum
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   achievable data rate (assuming the rest of the system is capable
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   and set properly) */
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#define SYNCXFRPD 5	/*(XTALFREQ/5)*/
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/*****/
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/* offset 7 */
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/* This is the count of how many synchronous transfers can take place
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	i.e. how many reqs can occur before an ack is given.
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	The maximum value for this is 15, the upper bits can modify
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	REQ/ACK assertion and deassertion during synchronous transfers
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	If this is 0, the bus will only transfer asynchronously */
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#define SYNCOFFST 0
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/* for the curious, bits 7&6 control the deassertion delay in 1/2 cycles
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	of the 40Mhz clock. If FASTCLK is 1, specifying 01 (1/2) will
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	cause the deassertion to be early by 1/2 clock.  Bits 5&4 control
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	the assertion delay, also in 1/2 clocks (FASTCLK is ignored here). */
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/*----------------------------------------------------------------*/
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struct qlogicfas408_priv {
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	int qbase;		/* Port */
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	int qinitid;		/* initiator ID */
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	int qabort;		/* Flag to cause an abort */
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	int qlirq;		/* IRQ being used */
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	int int_type;		/* type of irq, 2 for ISA board, 0 for PCMCIA */
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	char qinfo[80];		/* description */
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	struct scsi_cmnd *qlcmd;	/* current command being processed */
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	struct Scsi_Host *shost;	/* pointer back to host */
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	struct qlogicfas408_priv *next; /* next private struct */
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};
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/* The qlogic card uses two register maps - These macros select which one */
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#define REG0 ( outb( inb( qbase + 0xd ) & 0x7f , qbase + 0xd ), outb( 4 , qbase + 0xd ))
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#define REG1 ( outb( inb( qbase + 0xd ) | 0x80 , qbase + 0xd ), outb( 0xb4 | int_type, qbase + 0xd ))
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/* following is watchdog timeout in microseconds */
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#define WATCHDOG 5000000
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/*----------------------------------------------------------------*/
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/* the following will set the monitor border color (useful to find
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   where something crashed or gets stuck at and as a simple profiler) */
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#define rtrc(i) {}
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#define get_priv_by_cmd(x) (struct qlogicfas408_priv *)&((x)->device->host->hostdata[0])
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#define get_priv_by_host(x) (struct qlogicfas408_priv *)&((x)->hostdata[0])
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irqreturn_t qlogicfas408_ihandl(int irq, void *dev_id);
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int qlogicfas408_queuecommand(struct scsi_cmnd * cmd,
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			      void (*done) (struct scsi_cmnd *));
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int qlogicfas408_biosparam(struct scsi_device * disk,
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			   struct block_device *dev,
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			   sector_t capacity, int ip[]);
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int qlogicfas408_abort(struct scsi_cmnd * cmd);
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int qlogicfas408_bus_reset(struct scsi_cmnd * cmd);
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const char *qlogicfas408_info(struct Scsi_Host *host);
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int qlogicfas408_get_chip_type(int qbase, int int_type);
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void qlogicfas408_setup(int qbase, int id, int int_type);
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int qlogicfas408_detect(int qbase, int int_type);
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void qlogicfas408_disable_ints(struct qlogicfas408_priv *priv);
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#endif	/* __QLOGICFAS408_H */
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