103 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			103 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * PowerQUICC II support functions
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|  *
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|  * Author: Scott Wood <scottwood@freescale.com>
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|  *
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|  * Copyright (c) 2007 Freescale Semiconductor, Inc.
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|  *
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|  * This program is free software; you can redistribute it and/or modify it
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|  * under the terms of the GNU General Public License version 2 as published
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|  * by the Free Software Foundation.
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|  */
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| 
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| #include "ops.h"
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| #include "types.h"
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| #include "fsl-soc.h"
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| #include "pq2.h"
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| #include "stdio.h"
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| #include "io.h"
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| 
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| #define PQ2_SCCR (0x10c80/4) /* System Clock Configuration Register */
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| #define PQ2_SCMR (0x10c88/4) /* System Clock Mode Register */
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| 
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| static int pq2_corecnf_map[] = {
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| 	3, 2, 2, 2, 4, 4, 5, 9, 6, 11, 8, 10, 3, 12, 7, -1,
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| 	6, 5, 13, 2, 14, 4, 15, 9, 0, 11, 8, 10, 16, 12, 7, -1
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| };
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| 
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| /* Get various clocks from crystal frequency.
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|  * Returns zero on failure and non-zero on success.
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|  */
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| int pq2_get_clocks(u32 crystal, u32 *sysfreq, u32 *corefreq,
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|                    u32 *timebase, u32 *brgfreq)
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| {
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| 	u32 *immr;
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| 	u32 sccr, scmr, mainclk, busclk;
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| 	int corecnf, busdf, plldf, pllmf, dfbrg;
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| 
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| 	immr = fsl_get_immr();
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| 	if (!immr) {
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| 		printf("pq2_get_clocks: Couldn't get IMMR base.\r\n");
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| 		return 0;
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| 	}
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| 
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| 	sccr = in_be32(&immr[PQ2_SCCR]);
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| 	scmr = in_be32(&immr[PQ2_SCMR]);
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| 
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| 	dfbrg = sccr & 3;
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| 	corecnf = (scmr >> 24) & 0x1f;
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| 	busdf = (scmr >> 20) & 0xf;
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| 	plldf = (scmr >> 12) & 1;
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| 	pllmf = scmr & 0xfff;
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| 
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| 	mainclk = crystal * (pllmf + 1) / (plldf + 1);
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| 	busclk = mainclk / (busdf + 1);
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| 
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| 	if (sysfreq)
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| 		*sysfreq = mainclk / 2;
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| 	if (timebase)
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| 		*timebase = busclk / 4;
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| 	if (brgfreq)
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| 		*brgfreq = mainclk / (1 << ((dfbrg + 1) * 2));
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| 
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| 	if (corefreq) {
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| 		int coremult = pq2_corecnf_map[corecnf];
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| 
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| 		if (coremult < 0)
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| 			*corefreq = mainclk / 2;
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| 		else if (coremult == 0)
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| 			return 0;
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| 		else
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| 			*corefreq = busclk * coremult / 2;
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| 	}
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| 
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| 	return 1;
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| }
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| 
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| /* Set common device tree fields based on the given clock frequencies. */
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| void pq2_set_clocks(u32 sysfreq, u32 corefreq, u32 timebase, u32 brgfreq)
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| {
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| 	void *node;
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| 
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| 	dt_fixup_cpu_clocks(corefreq, timebase, sysfreq);
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| 
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| 	node = finddevice("/soc/cpm");
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| 	if (node)
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| 		setprop(node, "clock-frequency", &sysfreq, 4);
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| 
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| 	node = finddevice("/soc/cpm/brg");
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| 	if (node)
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| 		setprop(node, "clock-frequency", &brgfreq, 4);
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| }
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| 
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| int pq2_fixup_clocks(u32 crystal)
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| {
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| 	u32 sysfreq, corefreq, timebase, brgfreq;
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| 
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| 	if (!pq2_get_clocks(crystal, &sysfreq, &corefreq, &timebase, &brgfreq))
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| 		return 0;
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| 
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| 	pq2_set_clocks(sysfreq, corefreq, timebase, brgfreq);
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| 	return 1;
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| }
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