157 lines
		
	
	
		
			3.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			157 lines
		
	
	
		
			3.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* linux/arch/arm/plat-s3c/gpio.c
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|  *
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|  * Copyright 2008 Simtec Electronics
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|  *	Ben Dooks <ben@simtec.co.uk>
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|  *	http://armlinux.simtec.co.uk/
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|  *
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|  * S3C series GPIO core
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License version 2 as
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|  * published by the Free Software Foundation.
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| */
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| 
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| #include <linux/kernel.h>
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| #include <linux/init.h>
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| #include <linux/io.h>
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| #include <linux/gpio.h>
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| 
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| #include <mach/gpio-core.h>
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| 
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| #ifdef CONFIG_S3C_GPIO_TRACK
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| struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
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| 
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| static __init void s3c_gpiolib_track(struct s3c_gpio_chip *chip)
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| {
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| 	unsigned int gpn;
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| 	int i;
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| 
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| 	gpn = chip->chip.base;
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| 	for (i = 0; i < chip->chip.ngpio; i++, gpn++) {
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| 		BUG_ON(gpn >= ARRAY_SIZE(s3c_gpios));
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| 		s3c_gpios[gpn] = chip;
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| 	}
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| }
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| #endif /* CONFIG_S3C_GPIO_TRACK */
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| 
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| /* Default routines for controlling GPIO, based on the original S3C24XX
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|  * GPIO functions which deal with the case where each gpio bank of the
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|  * chip is as following:
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|  *
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|  * base + 0x00: Control register, 2 bits per gpio
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|  *	        gpio n: 2 bits starting at (2*n)
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|  *		00 = input, 01 = output, others mean special-function
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|  * base + 0x04: Data register, 1 bit per gpio
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|  *		bit n: data bit n
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| */
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| 
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| static int s3c_gpiolib_input(struct gpio_chip *chip, unsigned offset)
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| {
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| 	struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
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| 	void __iomem *base = ourchip->base;
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| 	unsigned long flags;
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| 	unsigned long con;
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| 
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| 	local_irq_save(flags);
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| 
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| 	con = __raw_readl(base + 0x00);
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| 	con &= ~(3 << (offset * 2));
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| 
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| 	__raw_writel(con, base + 0x00);
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| 
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| 	local_irq_restore(flags);
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| 	return 0;
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| }
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| 
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| static int s3c_gpiolib_output(struct gpio_chip *chip,
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| 			      unsigned offset, int value)
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| {
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| 	struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
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| 	void __iomem *base = ourchip->base;
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| 	unsigned long flags;
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| 	unsigned long dat;
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| 	unsigned long con;
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| 
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| 	local_irq_save(flags);
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| 
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| 	dat = __raw_readl(base + 0x04);
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| 	dat &= ~(1 << offset);
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| 	if (value)
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| 		dat |= 1 << offset;
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| 	__raw_writel(dat, base + 0x04);
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| 
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| 	con = __raw_readl(base + 0x00);
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| 	con &= ~(3 << (offset * 2));
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| 	con |= 1 << (offset * 2);
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| 
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| 	__raw_writel(con, base + 0x00);
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| 	__raw_writel(dat, base + 0x04);
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| 
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| 	local_irq_restore(flags);
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| 	return 0;
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| }
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| 
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| static void s3c_gpiolib_set(struct gpio_chip *chip,
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| 			    unsigned offset, int value)
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| {
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| 	struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
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| 	void __iomem *base = ourchip->base;
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| 	unsigned long flags;
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| 	unsigned long dat;
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| 
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| 	local_irq_save(flags);
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| 
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| 	dat = __raw_readl(base + 0x04);
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| 	dat &= ~(1 << offset);
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| 	if (value)
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| 		dat |= 1 << offset;
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| 	__raw_writel(dat, base + 0x04);
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| 
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| 	local_irq_restore(flags);
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| }
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| 
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| static int s3c_gpiolib_get(struct gpio_chip *chip, unsigned offset)
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| {
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| 	struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
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| 	unsigned long val;
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| 
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| 	val = __raw_readl(ourchip->base + 0x04);
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| 	val >>= offset;
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| 	val &= 1;
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| 
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| 	return val;
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| }
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| 
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| __init void s3c_gpiolib_add(struct s3c_gpio_chip *chip)
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| {
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| 	struct gpio_chip *gc = &chip->chip;
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| 	int ret;
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| 
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| 	BUG_ON(!chip->base);
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| 	BUG_ON(!gc->label);
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| 	BUG_ON(!gc->ngpio);
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| 
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| 	if (!gc->direction_input)
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| 		gc->direction_input = s3c_gpiolib_input;
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| 	if (!gc->direction_output)
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| 		gc->direction_output = s3c_gpiolib_output;
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| 	if (!gc->set)
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| 		gc->set = s3c_gpiolib_set;
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| 	if (!gc->get)
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| 		gc->get = s3c_gpiolib_get;
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| 
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| #ifdef CONFIG_PM
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| 	if (chip->pm != NULL) {
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| 		if (!chip->pm->save || !chip->pm->resume)
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| 			printk(KERN_ERR "gpio: %s has missing PM functions\n",
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| 			       gc->label);
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| 	} else
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| 		printk(KERN_ERR "gpio: %s has no PM function\n", gc->label);
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| #endif
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| 
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| 	/* gpiochip_add() prints own failure message on error. */
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| 	ret = gpiochip_add(gc);
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| 	if (ret >= 0)
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| 		s3c_gpiolib_track(chip);
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| }
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