51 lines
		
	
	
		
			1.4 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			51 lines
		
	
	
		
			1.4 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| Specifying GPIO information for devices
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| ============================================
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| 
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| 1) gpios property
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| -----------------
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| 
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| Nodes that makes use of GPIOs should define them using `gpios' property,
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| format of which is: <&gpio-controller1-phandle gpio1-specifier
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| 		     &gpio-controller2-phandle gpio2-specifier
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| 		     0 /* holes are permitted, means no GPIO 3 */
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| 		     &gpio-controller4-phandle gpio4-specifier
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| 		     ...>;
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| 
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| Note that gpio-specifier length is controller dependent.
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| 
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| gpio-specifier may encode: bank, pin position inside the bank,
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| whether pin is open-drain and whether pin is logically inverted.
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| 
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| Example of the node using GPIOs:
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| 
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| 	node {
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| 		gpios = <&qe_pio_e 18 0>;
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| 	};
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| 
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| In this example gpio-specifier is "18 0" and encodes GPIO pin number,
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| and empty GPIO flags as accepted by the "qe_pio_e" gpio-controller.
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| 
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| 2) gpio-controller nodes
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| ------------------------
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| 
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| Every GPIO controller node must have #gpio-cells property defined,
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| this information will be used to translate gpio-specifiers.
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| 
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| Example of two SOC GPIO banks defined as gpio-controller nodes:
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| 
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| 	qe_pio_a: gpio-controller@1400 {
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| 		#gpio-cells = <2>;
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| 		compatible = "fsl,qe-pario-bank-a", "fsl,qe-pario-bank";
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| 		reg = <0x1400 0x18>;
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| 		gpio-controller;
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| 	};
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| 
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| 	qe_pio_e: gpio-controller@1460 {
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| 		#gpio-cells = <2>;
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| 		compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
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| 		reg = <0x1460 0x18>;
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| 		gpio-controller;
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| 	};
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| 
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| 
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