170 lines
4.4 KiB
Plaintext
170 lines
4.4 KiB
Plaintext
//
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// Copyright(c) by Benny Sjostrand (benny@hostmobility.com)
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//
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// This program is free software; you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation; either version 2 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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//
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//
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// This code runs inside the DSP (cs4610, cs4612, cs4624, or cs4630),
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// to compile it you need a tool named SPASM 3.0 and DSP code owned by
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// Cirrus Logic(R). The SPASM program will generate a object file (cwcdma.osp),
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// the "ospparser" tool will genereate the cwcdma.h file it's included from
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// the cs46xx_lib.c file.
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//
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//
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// The purpose of this code is very simple: make it possible to tranfser
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// the samples 'as they are' with no alteration from a PCMreader SCB (DMA from host)
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// to any other SCB. This is useful for AC3 throug SPDIF. SRC (source rate converters)
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// task always alters the samples in some how, however it's from 48khz -> 48khz. The
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// alterations are not audible, but AC3 wont work.
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//
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// ...
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// |
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// +---------------+
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// | AsynchFGTxSCB |
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// +---------------+
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// |
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// subListPtr
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// |
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// +--------------+
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// | DMAReader |
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// +--------------+
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// |
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// subListPtr
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// |
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// +-------------+
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// | PCMReader |
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// +-------------+
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// (DMA from host)
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//
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struct dmaSCB
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{
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long dma_reserved1[3];
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short dma_reserved2:dma_outBufPtr;
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short dma_unused1:dma_unused2;
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long dma_reserved3[4];
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short dma_subListPtr:dma_nextSCB;
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short dma_SPBptr:dma_entryPoint;
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long dma_strmRsConfig;
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long dma_strmBufPtr;
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long dma_reserved4;
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VolumeControl s2m_volume;
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};
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#export DMAReader
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void DMAReader()
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{
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execChild();
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r2 = r0->dma_subListPtr;
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r1 = r0->nextSCB;
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rsConfig01 = r2->strmRsConfig;
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// Load rsConfig for input buffer
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rsDMA01 = r2->basicReq.daw, , tb = Z(0 - rf);
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// Load rsDMA in case input buffer is a DMA buffer Test to see if there is any data to transfer
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if (tb) goto execSibling_2ind1 after {
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r5 = rf + (-1);
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r6 = r1->dma_entryPoint; // r6 = entry point of sibling task
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r1 = r1->dma_SPBptr, // r1 = pointer to sibling task's SPB
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, ind = r6; // Load entry point of sibling task
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}
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rsConfig23 = r0->dma_strmRsConfig;
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// Load rsConfig for output buffer (never a DMA buffer)
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r4 = r0->dma_outBufPtr;
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rsa0 = r2->strmBufPtr;
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// rsa0 = input buffer pointer
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for (i = r5; i >= 0; --i)
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after {
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rsa2 = r4;
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// rsa2 = output buffer pointer
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nop;
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nop;
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}
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//*****************************
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// TODO: cycles to this point *
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//*****************************
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{
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acc0 = (rsd0 = *rsa0++1);
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// get sample
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nop; // Those "nop"'s are really uggly, but there's
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nop; // something with DSP's pipelines which I don't
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nop; // understand, resulting this code to fail without
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// having those "nop"'s (Benny)
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rsa0?reqDMA = r2;
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// Trigger DMA transfer on input stream,
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// if needed to replenish input buffer
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nop;
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// Yet another magic "nop" to make stuff work
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,,r98 = acc0 $+>> 0;
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// store sample in ALU
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nop;
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// latency on load register.
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// (this one is understandable)
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*rsa2++1 = r98;
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// store sample in output buffer
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nop; // The same story
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nop; // as above again ...
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nop;
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}
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// TODO: cycles per loop iteration
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r2->strmBufPtr = rsa0,, ;
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// Update the modified buffer pointers
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r4 = rsa2;
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// Load output pointer position into r4
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r2 = r0->nextSCB;
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// Sibling task
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goto execSibling_2ind1 // takes 6 cycles
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after {
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r98 = r2->thisSPB:entryPoint;
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// Load child routine entry and data address
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r1 = r9;
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// r9 is r2->thisSPB
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r0->dma_outBufPtr = r4,,
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// Store updated output buffer pointer
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ind = r8;
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// r8 is r2->entryPoint
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}
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}
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