138 lines
3.4 KiB
C
138 lines
3.4 KiB
C
/* arch/arm/mach-msm/io.c
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*
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* MSM7K io support
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*
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* Copyright (C) 2007 Google, Inc.
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* Author: Brian Swetland <swetland@google.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <mach/hardware.h>
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#include <asm/page.h>
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#include <mach/msm_iomap.h>
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#include <asm/mach/map.h>
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#include <mach/board.h>
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#define MSM_DEVICE(name) { \
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.virtual = (unsigned long) MSM_##name##_BASE, \
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.pfn = __phys_to_pfn(MSM_##name##_PHYS), \
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.length = MSM_##name##_SIZE, \
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.type = MT_DEVICE_NONSHARED, \
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}
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static struct map_desc msm_io_desc[] __initdata = {
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MSM_DEVICE(VIC),
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MSM_DEVICE(CSR),
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#ifdef CONFIG_ARCH_MSM7X30
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MSM_DEVICE(TMR),
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#else
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MSM_DEVICE(GPT),
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#endif
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MSM_DEVICE(DMOV),
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MSM_DEVICE(GPIO1),
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MSM_DEVICE(GPIO2),
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MSM_DEVICE(CLK_CTL),
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#ifdef CONFIG_ARCH_MSM7X30
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MSM_DEVICE(CLK_CTL_SH2),
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#endif
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#ifdef CONFIG_ARCH_MSM7227
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MSM_DEVICE(TGPIO1),
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#endif
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#ifdef CONFIG_ARCH_QSD8X50
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MSM_DEVICE(SIRC),
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MSM_DEVICE(SCPLL),
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#endif
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MSM_DEVICE(AD5),
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MSM_DEVICE(MDC),
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#ifdef CONFIG_ARCH_MSM7X30
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MSM_DEVICE(ACC),
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MSM_DEVICE(SAW),
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MSM_DEVICE(GCC),
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MSM_DEVICE(TCSR),
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#endif
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#ifdef CONFIG_MSM_DEBUG_UART
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MSM_DEVICE(DEBUG_UART),
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#endif
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#ifdef CONFIG_ARCH_QSD8X50
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MSM_DEVICE(TCSR),
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#endif
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#ifdef CONFIG_CACHE_L2X0
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{
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.virtual = (unsigned long) MSM_L2CC_BASE,
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.pfn = __phys_to_pfn(MSM_L2CC_PHYS),
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.length = MSM_L2CC_SIZE,
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.type = MT_DEVICE,
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},
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#endif
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{
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.virtual = (unsigned long) MSM_SHARED_RAM_BASE,
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.pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
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.length = MSM_SHARED_RAM_SIZE,
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.type = MT_DEVICE,
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},
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MSM_DEVICE(SDC2),
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};
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void __init msm_map_common_io(void)
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{
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#ifdef CONFIG_ARCH_MSM_ARM11
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/* Make sure the peripheral register window is closed, since
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* we will use PTE flags (TEX[1]=1,B=0,C=1) to determine which
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* pages are peripheral interface or not.
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*/
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asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0));
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#endif
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#ifdef CONFIG_ARCH_QSD8X50
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unsigned int unused;
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/* The bootloader may not have done it, so disable predecode repair
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* cache for thumb2 (DPRC, set bit 4 in PVR0F2) due to a bug.
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*/
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asm volatile ("mrc p15, 0, %0, c15, c15, 2\n\t"
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"orr %0, %0, #0x10\n\t"
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"mcr p15, 0, %0, c15, c15, 2"
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: "=&r" (unused));
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#endif
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#ifdef CONFIG_ARCH_QSD8X50
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/* clear out EFSR and ADFSR on boot */
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asm volatile ("mcr p15, 7, %0, c15, c0, 1\n\t"
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"mcr p15, 0, %0, c5, c1, 0"
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: : "r" (0));
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#endif
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iotable_init(msm_io_desc, ARRAY_SIZE(msm_io_desc));
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}
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void __iomem *
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__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
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{
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#ifdef CONFIG_ARCH_MSM_ARM11
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if (mtype == MT_DEVICE) {
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/* The peripherals in the 88000000 - D0000000 range
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* are only accessable by type MT_DEVICE_NONSHARED.
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* Adjust mtype as necessary to make this "just work."
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*/
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if ((phys_addr >= 0x88000000) && (phys_addr < 0xD0000000))
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mtype = MT_DEVICE_NONSHARED;
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}
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#endif
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return __arm_ioremap(phys_addr, size, mtype);
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}
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EXPORT_SYMBOL(__msm_ioremap);
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