332 lines
11 KiB
C
332 lines
11 KiB
C
/*
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* Aic94xx SAS/SATA driver register access.
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*
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* Copyright (C) 2005 Adaptec, Inc. All rights reserved.
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* Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com>
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*
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* This file is licensed under GPLv2.
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*
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* This file is part of the aic94xx driver.
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*
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* The aic94xx driver is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of the
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* License.
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*
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* The aic94xx driver is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with the aic94xx driver; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*/
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#include <linux/pci.h>
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#include "aic94xx_reg.h"
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#include "aic94xx.h"
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/* Writing to device address space.
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* Offset comes before value to remind that the operation of
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* this function is *offs = val.
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*/
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static void asd_write_byte(struct asd_ha_struct *asd_ha,
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unsigned long offs, u8 val)
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{
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if (unlikely(asd_ha->iospace))
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outb(val,
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(unsigned long)asd_ha->io_handle[0].addr + (offs & 0xFF));
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else
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writeb(val, asd_ha->io_handle[0].addr + offs);
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wmb();
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}
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static void asd_write_word(struct asd_ha_struct *asd_ha,
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unsigned long offs, u16 val)
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{
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if (unlikely(asd_ha->iospace))
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outw(val,
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(unsigned long)asd_ha->io_handle[0].addr + (offs & 0xFF));
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else
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writew(val, asd_ha->io_handle[0].addr + offs);
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wmb();
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}
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static void asd_write_dword(struct asd_ha_struct *asd_ha,
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unsigned long offs, u32 val)
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{
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if (unlikely(asd_ha->iospace))
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outl(val,
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(unsigned long)asd_ha->io_handle[0].addr + (offs & 0xFF));
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else
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writel(val, asd_ha->io_handle[0].addr + offs);
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wmb();
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}
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/* Reading from device address space.
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*/
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static u8 asd_read_byte(struct asd_ha_struct *asd_ha, unsigned long offs)
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{
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u8 val;
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if (unlikely(asd_ha->iospace))
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val = inb((unsigned long) asd_ha->io_handle[0].addr
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+ (offs & 0xFF));
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else
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val = readb(asd_ha->io_handle[0].addr + offs);
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rmb();
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return val;
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}
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static u16 asd_read_word(struct asd_ha_struct *asd_ha,
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unsigned long offs)
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{
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u16 val;
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if (unlikely(asd_ha->iospace))
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val = inw((unsigned long)asd_ha->io_handle[0].addr
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+ (offs & 0xFF));
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else
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val = readw(asd_ha->io_handle[0].addr + offs);
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rmb();
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return val;
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}
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static u32 asd_read_dword(struct asd_ha_struct *asd_ha,
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unsigned long offs)
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{
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u32 val;
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if (unlikely(asd_ha->iospace))
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val = inl((unsigned long) asd_ha->io_handle[0].addr
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+ (offs & 0xFF));
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else
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val = readl(asd_ha->io_handle[0].addr + offs);
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rmb();
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return val;
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}
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static inline u32 asd_mem_offs_swa(void)
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{
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return 0;
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}
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static inline u32 asd_mem_offs_swc(void)
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{
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return asd_mem_offs_swa() + MBAR0_SWA_SIZE;
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}
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static inline u32 asd_mem_offs_swb(void)
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{
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return asd_mem_offs_swc() + MBAR0_SWC_SIZE + 0x20;
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}
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/* We know that the register wanted is in the range
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* of the sliding window.
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*/
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#define ASD_READ_SW(ww, type, ord) \
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static type asd_read_##ww##_##ord(struct asd_ha_struct *asd_ha, \
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u32 reg) \
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{ \
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struct asd_ha_addrspace *io_handle = &asd_ha->io_handle[0]; \
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u32 map_offs = (reg - io_handle->ww##_base) + asd_mem_offs_##ww();\
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return asd_read_##ord(asd_ha, (unsigned long)map_offs); \
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}
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#define ASD_WRITE_SW(ww, type, ord) \
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static void asd_write_##ww##_##ord(struct asd_ha_struct *asd_ha, \
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u32 reg, type val) \
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{ \
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struct asd_ha_addrspace *io_handle = &asd_ha->io_handle[0]; \
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u32 map_offs = (reg - io_handle->ww##_base) + asd_mem_offs_##ww();\
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asd_write_##ord(asd_ha, (unsigned long)map_offs, val); \
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}
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ASD_READ_SW(swa, u8, byte);
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ASD_READ_SW(swa, u16, word);
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ASD_READ_SW(swa, u32, dword);
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ASD_READ_SW(swb, u8, byte);
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ASD_READ_SW(swb, u16, word);
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ASD_READ_SW(swb, u32, dword);
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ASD_READ_SW(swc, u8, byte);
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ASD_READ_SW(swc, u16, word);
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ASD_READ_SW(swc, u32, dword);
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ASD_WRITE_SW(swa, u8, byte);
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ASD_WRITE_SW(swa, u16, word);
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ASD_WRITE_SW(swa, u32, dword);
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ASD_WRITE_SW(swb, u8, byte);
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ASD_WRITE_SW(swb, u16, word);
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ASD_WRITE_SW(swb, u32, dword);
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ASD_WRITE_SW(swc, u8, byte);
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ASD_WRITE_SW(swc, u16, word);
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ASD_WRITE_SW(swc, u32, dword);
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/*
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* A word about sliding windows:
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* MBAR0 is divided into sliding windows A, C and B, in that order.
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* SWA starts at offset 0 of MBAR0, up to 0x57, with size 0x58 bytes.
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* SWC starts at offset 0x58 of MBAR0, up to 0x60, with size 0x8 bytes.
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* From 0x60 to 0x7F, we have a copy of PCI config space 0x60-0x7F.
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* SWB starts at offset 0x80 of MBAR0 and extends to the end of MBAR0.
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* See asd_init_sw() in aic94xx_hwi.c
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*
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* We map the most common registers we'd access of the internal 4GB
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* host adapter memory space. If a register/internal memory location
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* is wanted which is not mapped, we slide SWB, by paging it,
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* see asd_move_swb() in aic94xx_reg.c.
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*/
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/**
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* asd_move_swb -- move sliding window B
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* @asd_ha: pointer to host adapter structure
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* @reg: register desired to be within range of the new window
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*/
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static void asd_move_swb(struct asd_ha_struct *asd_ha, u32 reg)
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{
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u32 base = reg & ~(MBAR0_SWB_SIZE-1);
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pci_write_config_dword(asd_ha->pcidev, PCI_CONF_MBAR0_SWB, base);
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asd_ha->io_handle[0].swb_base = base;
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}
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static void __asd_write_reg_byte(struct asd_ha_struct *asd_ha, u32 reg, u8 val)
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{
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struct asd_ha_addrspace *io_handle=&asd_ha->io_handle[0];
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BUG_ON(reg >= 0xC0000000 || reg < ALL_BASE_ADDR);
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if (io_handle->swa_base <= reg
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&& reg < io_handle->swa_base + MBAR0_SWA_SIZE)
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asd_write_swa_byte (asd_ha, reg,val);
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else if (io_handle->swb_base <= reg
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&& reg < io_handle->swb_base + MBAR0_SWB_SIZE)
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asd_write_swb_byte (asd_ha, reg, val);
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else if (io_handle->swc_base <= reg
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&& reg < io_handle->swc_base + MBAR0_SWC_SIZE)
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asd_write_swc_byte (asd_ha, reg, val);
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else {
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/* Ok, we have to move SWB */
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asd_move_swb(asd_ha, reg);
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asd_write_swb_byte (asd_ha, reg, val);
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}
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}
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#define ASD_WRITE_REG(type, ord) \
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void asd_write_reg_##ord (struct asd_ha_struct *asd_ha, u32 reg, type val)\
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{ \
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struct asd_ha_addrspace *io_handle=&asd_ha->io_handle[0]; \
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unsigned long flags; \
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BUG_ON(reg >= 0xC0000000 || reg < ALL_BASE_ADDR); \
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spin_lock_irqsave(&asd_ha->iolock, flags); \
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if (io_handle->swa_base <= reg \
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&& reg < io_handle->swa_base + MBAR0_SWA_SIZE) \
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asd_write_swa_##ord (asd_ha, reg,val); \
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else if (io_handle->swb_base <= reg \
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&& reg < io_handle->swb_base + MBAR0_SWB_SIZE) \
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asd_write_swb_##ord (asd_ha, reg, val); \
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else if (io_handle->swc_base <= reg \
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&& reg < io_handle->swc_base + MBAR0_SWC_SIZE) \
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asd_write_swc_##ord (asd_ha, reg, val); \
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else { \
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/* Ok, we have to move SWB */ \
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asd_move_swb(asd_ha, reg); \
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asd_write_swb_##ord (asd_ha, reg, val); \
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} \
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spin_unlock_irqrestore(&asd_ha->iolock, flags); \
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}
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ASD_WRITE_REG(u8, byte);
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ASD_WRITE_REG(u16,word);
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ASD_WRITE_REG(u32,dword);
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static u8 __asd_read_reg_byte(struct asd_ha_struct *asd_ha, u32 reg)
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{
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struct asd_ha_addrspace *io_handle=&asd_ha->io_handle[0];
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u8 val;
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BUG_ON(reg >= 0xC0000000 || reg < ALL_BASE_ADDR);
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if (io_handle->swa_base <= reg
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&& reg < io_handle->swa_base + MBAR0_SWA_SIZE)
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val = asd_read_swa_byte (asd_ha, reg);
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else if (io_handle->swb_base <= reg
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&& reg < io_handle->swb_base + MBAR0_SWB_SIZE)
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val = asd_read_swb_byte (asd_ha, reg);
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else if (io_handle->swc_base <= reg
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&& reg < io_handle->swc_base + MBAR0_SWC_SIZE)
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val = asd_read_swc_byte (asd_ha, reg);
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else {
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/* Ok, we have to move SWB */
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asd_move_swb(asd_ha, reg);
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val = asd_read_swb_byte (asd_ha, reg);
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}
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return val;
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}
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#define ASD_READ_REG(type, ord) \
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type asd_read_reg_##ord (struct asd_ha_struct *asd_ha, u32 reg) \
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{ \
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struct asd_ha_addrspace *io_handle=&asd_ha->io_handle[0]; \
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type val; \
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unsigned long flags; \
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BUG_ON(reg >= 0xC0000000 || reg < ALL_BASE_ADDR); \
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spin_lock_irqsave(&asd_ha->iolock, flags); \
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if (io_handle->swa_base <= reg \
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&& reg < io_handle->swa_base + MBAR0_SWA_SIZE) \
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val = asd_read_swa_##ord (asd_ha, reg); \
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else if (io_handle->swb_base <= reg \
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&& reg < io_handle->swb_base + MBAR0_SWB_SIZE) \
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val = asd_read_swb_##ord (asd_ha, reg); \
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else if (io_handle->swc_base <= reg \
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&& reg < io_handle->swc_base + MBAR0_SWC_SIZE) \
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val = asd_read_swc_##ord (asd_ha, reg); \
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else { \
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/* Ok, we have to move SWB */ \
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asd_move_swb(asd_ha, reg); \
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val = asd_read_swb_##ord (asd_ha, reg); \
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} \
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spin_unlock_irqrestore(&asd_ha->iolock, flags); \
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return val; \
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}
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ASD_READ_REG(u8, byte);
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ASD_READ_REG(u16,word);
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ASD_READ_REG(u32,dword);
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/**
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* asd_read_reg_string -- read a string of bytes from io space memory
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* @asd_ha: pointer to host adapter structure
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* @dst: pointer to a destination buffer where data will be written to
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* @offs: start offset (register) to read from
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* @count: number of bytes to read
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*/
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void asd_read_reg_string(struct asd_ha_struct *asd_ha, void *dst,
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u32 offs, int count)
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{
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u8 *p = dst;
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unsigned long flags;
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spin_lock_irqsave(&asd_ha->iolock, flags);
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for ( ; count > 0; count--, offs++, p++)
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*p = __asd_read_reg_byte(asd_ha, offs);
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spin_unlock_irqrestore(&asd_ha->iolock, flags);
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}
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/**
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* asd_write_reg_string -- write a string of bytes to io space memory
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* @asd_ha: pointer to host adapter structure
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* @src: pointer to source buffer where data will be read from
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* @offs: start offset (register) to write to
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* @count: number of bytes to write
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*/
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void asd_write_reg_string(struct asd_ha_struct *asd_ha, void *src,
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u32 offs, int count)
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{
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u8 *p = src;
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unsigned long flags;
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spin_lock_irqsave(&asd_ha->iolock, flags);
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for ( ; count > 0; count--, offs++, p++)
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__asd_write_reg_byte(asd_ha, offs, *p);
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spin_unlock_irqrestore(&asd_ha->iolock, flags);
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}
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