350 lines
10 KiB
C
350 lines
10 KiB
C
/*******************************************************************************
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Intel 10 Gigabit PCI Express Linux driver
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Copyright(c) 1999 - 2009 Intel Corporation.
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Contact Information:
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Linux NICS <linux.nics@intel.com>
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e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*******************************************************************************/
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#include "ixgbe.h"
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#include "ixgbe_type.h"
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#include "ixgbe_dcb.h"
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#include "ixgbe_dcb_82598.h"
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#include "ixgbe_dcb_82599.h"
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/**
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* ixgbe_dcb_config - Struct containing DCB settings.
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* @dcb_config: Pointer to DCB config structure
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*
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* This function checks DCB rules for DCB settings.
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* The following rules are checked:
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* 1. The sum of bandwidth percentages of all Bandwidth Groups must total 100%.
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* 2. The sum of bandwidth percentages of all Traffic Classes within a Bandwidth
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* Group must total 100.
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* 3. A Traffic Class should not be set to both Link Strict Priority
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* and Group Strict Priority.
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* 4. Link strict Bandwidth Groups can only have link strict traffic classes
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* with zero bandwidth.
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*/
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s32 ixgbe_dcb_check_config(struct ixgbe_dcb_config *dcb_config)
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{
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struct tc_bw_alloc *p;
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s32 ret_val = 0;
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u8 i, j, bw = 0, bw_id;
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u8 bw_sum[2][MAX_BW_GROUP];
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bool link_strict[2][MAX_BW_GROUP];
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memset(bw_sum, 0, sizeof(bw_sum));
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memset(link_strict, 0, sizeof(link_strict));
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/* First Tx, then Rx */
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for (i = 0; i < 2; i++) {
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/* Check each traffic class for rule violation */
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for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
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p = &dcb_config->tc_config[j].path[i];
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bw = p->bwg_percent;
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bw_id = p->bwg_id;
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if (bw_id >= MAX_BW_GROUP) {
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ret_val = DCB_ERR_CONFIG;
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goto err_config;
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}
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if (p->prio_type == prio_link) {
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link_strict[i][bw_id] = true;
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/* Link strict should have zero bandwidth */
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if (bw) {
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ret_val = DCB_ERR_LS_BW_NONZERO;
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goto err_config;
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}
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} else if (!bw) {
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/*
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* Traffic classes without link strict
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* should have non-zero bandwidth.
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*/
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ret_val = DCB_ERR_TC_BW_ZERO;
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goto err_config;
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}
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bw_sum[i][bw_id] += bw;
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}
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bw = 0;
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/* Check each bandwidth group for rule violation */
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for (j = 0; j < MAX_BW_GROUP; j++) {
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bw += dcb_config->bw_percentage[i][j];
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/*
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* Sum of bandwidth percentages of all traffic classes
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* within a Bandwidth Group must total 100 except for
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* link strict group (zero bandwidth).
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*/
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if (link_strict[i][j]) {
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if (bw_sum[i][j]) {
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/*
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* Link strict group should have zero
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* bandwidth.
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*/
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ret_val = DCB_ERR_LS_BWG_NONZERO;
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goto err_config;
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}
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} else if (bw_sum[i][j] != BW_PERCENT &&
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bw_sum[i][j] != 0) {
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ret_val = DCB_ERR_TC_BW;
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goto err_config;
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}
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}
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if (bw != BW_PERCENT) {
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ret_val = DCB_ERR_BW_GROUP;
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goto err_config;
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}
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}
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err_config:
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return ret_val;
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}
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/**
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* ixgbe_dcb_calculate_tc_credits - Calculates traffic class credits
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* @ixgbe_dcb_config: Struct containing DCB settings.
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* @direction: Configuring either Tx or Rx.
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*
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* This function calculates the credits allocated to each traffic class.
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* It should be called only after the rules are checked by
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* ixgbe_dcb_check_config().
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*/
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s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_dcb_config *dcb_config,
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u8 direction)
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{
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struct tc_bw_alloc *p;
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s32 ret_val = 0;
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/* Initialization values default for Tx settings */
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u32 credit_refill = 0;
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u32 credit_max = 0;
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u16 link_percentage = 0;
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u8 bw_percent = 0;
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u8 i;
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if (dcb_config == NULL) {
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ret_val = DCB_ERR_CONFIG;
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goto out;
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}
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/* Find out the link percentage for each TC first */
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for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
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p = &dcb_config->tc_config[i].path[direction];
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bw_percent = dcb_config->bw_percentage[direction][p->bwg_id];
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link_percentage = p->bwg_percent;
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/* Must be careful of integer division for very small nums */
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link_percentage = (link_percentage * bw_percent) / 100;
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if (p->bwg_percent > 0 && link_percentage == 0)
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link_percentage = 1;
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/* Save link_percentage for reference */
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p->link_percent = (u8)link_percentage;
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/* Calculate credit refill and save it */
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credit_refill = link_percentage * MINIMUM_CREDIT_REFILL;
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p->data_credits_refill = (u16)credit_refill;
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/* Calculate maximum credit for the TC */
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credit_max = (link_percentage * MAX_CREDIT) / 100;
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/*
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* Adjustment based on rule checking, if the percentage
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* of a TC is too small, the maximum credit may not be
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* enough to send out a jumbo frame in data plane arbitration.
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*/
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if (credit_max && (credit_max < MINIMUM_CREDIT_FOR_JUMBO))
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credit_max = MINIMUM_CREDIT_FOR_JUMBO;
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if (direction == DCB_TX_CONFIG) {
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/*
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* Adjustment based on rule checking, if the
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* percentage of a TC is too small, the maximum
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* credit may not be enough to send out a TSO
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* packet in descriptor plane arbitration.
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*/
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if (credit_max &&
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(credit_max < MINIMUM_CREDIT_FOR_TSO))
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credit_max = MINIMUM_CREDIT_FOR_TSO;
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dcb_config->tc_config[i].desc_credits_max =
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(u16)credit_max;
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}
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p->data_credits_max = (u16)credit_max;
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}
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out:
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return ret_val;
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}
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/**
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* ixgbe_dcb_get_tc_stats - Returns status of each traffic class
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* @hw: pointer to hardware structure
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* @stats: pointer to statistics structure
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* @tc_count: Number of elements in bwg_array.
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*
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* This function returns the status data for each of the Traffic Classes in use.
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*/
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s32 ixgbe_dcb_get_tc_stats(struct ixgbe_hw *hw, struct ixgbe_hw_stats *stats,
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u8 tc_count)
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{
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s32 ret = 0;
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if (hw->mac.type == ixgbe_mac_82598EB)
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ret = ixgbe_dcb_get_tc_stats_82598(hw, stats, tc_count);
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else if (hw->mac.type == ixgbe_mac_82599EB)
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ret = ixgbe_dcb_get_tc_stats_82599(hw, stats, tc_count);
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return ret;
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}
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/**
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* ixgbe_dcb_get_pfc_stats - Returns CBFC status of each traffic class
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* hw - pointer to hardware structure
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* stats - pointer to statistics structure
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* tc_count - Number of elements in bwg_array.
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*
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* This function returns the CBFC status data for each of the Traffic Classes.
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*/
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s32 ixgbe_dcb_get_pfc_stats(struct ixgbe_hw *hw, struct ixgbe_hw_stats *stats,
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u8 tc_count)
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{
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s32 ret = 0;
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if (hw->mac.type == ixgbe_mac_82598EB)
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ret = ixgbe_dcb_get_pfc_stats_82598(hw, stats, tc_count);
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else if (hw->mac.type == ixgbe_mac_82599EB)
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ret = ixgbe_dcb_get_pfc_stats_82599(hw, stats, tc_count);
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return ret;
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}
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/**
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* ixgbe_dcb_config_rx_arbiter - Config Rx arbiter
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* @hw: pointer to hardware structure
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* @dcb_config: pointer to ixgbe_dcb_config structure
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*
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* Configure Rx Data Arbiter and credits for each traffic class.
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*/
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s32 ixgbe_dcb_config_rx_arbiter(struct ixgbe_hw *hw,
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struct ixgbe_dcb_config *dcb_config)
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{
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s32 ret = 0;
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if (hw->mac.type == ixgbe_mac_82598EB)
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ret = ixgbe_dcb_config_rx_arbiter_82598(hw, dcb_config);
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else if (hw->mac.type == ixgbe_mac_82599EB)
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ret = ixgbe_dcb_config_rx_arbiter_82599(hw, dcb_config);
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return ret;
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}
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/**
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* ixgbe_dcb_config_tx_desc_arbiter - Config Tx Desc arbiter
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* @hw: pointer to hardware structure
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* @dcb_config: pointer to ixgbe_dcb_config structure
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*
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* Configure Tx Descriptor Arbiter and credits for each traffic class.
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*/
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s32 ixgbe_dcb_config_tx_desc_arbiter(struct ixgbe_hw *hw,
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struct ixgbe_dcb_config *dcb_config)
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{
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s32 ret = 0;
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if (hw->mac.type == ixgbe_mac_82598EB)
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ret = ixgbe_dcb_config_tx_desc_arbiter_82598(hw, dcb_config);
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else if (hw->mac.type == ixgbe_mac_82599EB)
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ret = ixgbe_dcb_config_tx_desc_arbiter_82599(hw, dcb_config);
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return ret;
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}
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/**
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* ixgbe_dcb_config_tx_data_arbiter - Config Tx data arbiter
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* @hw: pointer to hardware structure
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* @dcb_config: pointer to ixgbe_dcb_config structure
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*
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* Configure Tx Data Arbiter and credits for each traffic class.
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*/
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s32 ixgbe_dcb_config_tx_data_arbiter(struct ixgbe_hw *hw,
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struct ixgbe_dcb_config *dcb_config)
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{
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s32 ret = 0;
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if (hw->mac.type == ixgbe_mac_82598EB)
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ret = ixgbe_dcb_config_tx_data_arbiter_82598(hw, dcb_config);
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else if (hw->mac.type == ixgbe_mac_82599EB)
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ret = ixgbe_dcb_config_tx_data_arbiter_82599(hw, dcb_config);
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return ret;
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}
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/**
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* ixgbe_dcb_config_pfc - Config priority flow control
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* @hw: pointer to hardware structure
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* @dcb_config: pointer to ixgbe_dcb_config structure
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*
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* Configure Priority Flow Control for each traffic class.
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*/
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s32 ixgbe_dcb_config_pfc(struct ixgbe_hw *hw,
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struct ixgbe_dcb_config *dcb_config)
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{
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s32 ret = 0;
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if (hw->mac.type == ixgbe_mac_82598EB)
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ret = ixgbe_dcb_config_pfc_82598(hw, dcb_config);
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else if (hw->mac.type == ixgbe_mac_82599EB)
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ret = ixgbe_dcb_config_pfc_82599(hw, dcb_config);
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return ret;
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}
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/**
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* ixgbe_dcb_config_tc_stats - Config traffic class statistics
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* @hw: pointer to hardware structure
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*
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* Configure queue statistics registers, all queues belonging to same traffic
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* class uses a single set of queue statistics counters.
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*/
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s32 ixgbe_dcb_config_tc_stats(struct ixgbe_hw *hw)
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{
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s32 ret = 0;
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if (hw->mac.type == ixgbe_mac_82598EB)
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ret = ixgbe_dcb_config_tc_stats_82598(hw);
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else if (hw->mac.type == ixgbe_mac_82599EB)
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ret = ixgbe_dcb_config_tc_stats_82599(hw);
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return ret;
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}
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/**
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* ixgbe_dcb_hw_config - Config and enable DCB
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* @hw: pointer to hardware structure
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* @dcb_config: pointer to ixgbe_dcb_config structure
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*
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* Configure dcb settings and enable dcb mode.
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*/
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s32 ixgbe_dcb_hw_config(struct ixgbe_hw *hw,
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struct ixgbe_dcb_config *dcb_config)
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{
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s32 ret = 0;
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if (hw->mac.type == ixgbe_mac_82598EB)
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ret = ixgbe_dcb_hw_config_82598(hw, dcb_config);
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else if (hw->mac.type == ixgbe_mac_82599EB)
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ret = ixgbe_dcb_hw_config_82599(hw, dcb_config);
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return ret;
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}
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