107 lines
3.1 KiB
ArmAsm
107 lines
3.1 KiB
ArmAsm
/* arch/arm/mach-msm/idle.S
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*
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* Idle processing for MSM7X00A - work around bugs with SWFI.
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*
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* Copyright (c) 2007 QUALCOMM Incorporated.
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* Copyright (C) 2007 Google, Inc.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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ENTRY(msm_pm_collapse)
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ldr r0, =saved_state
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stmia r0!, {r4-r14}
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mrc p15, 0, r1, c1, c0, 0 /* MMU control */
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mrc p15, 0, r2, c2, c0, 0 /* ttb */
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mrc p15, 0, r3, c3, c0, 0 /* dacr */
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mrc p15, 0, ip, c13, c0, 1 /* context ID */
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stmia r0!, {r1-r3, ip}
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#if defined(CONFIG_OPROFILE)
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mrc p15, 0, r1, c15, c12, 0 /* pmnc */
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mrc p15, 0, r2, c15, c12, 1 /* ccnt */
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mrc p15, 0, r3, c15, c12, 2 /* pmn0 */
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mrc p15, 0, ip, c15, c12, 3 /* pmn1 */
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stmia r0!, {r1-r3, ip}
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#endif
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/* fall though */
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ENTRY(msm_arch_idle)
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#if defined(CONFIG_MSM_FIQ_SUPPORT)
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cpsid f
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#endif
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mrc p15, 0, r1, c1, c0, 0 /* read current CR */
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bic r0, r1, #(1 << 2) /* clear dcache bit */
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bic r0, r0, #(1 << 12) /* clear icache bit */
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mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */
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mov r0, #0 /* prepare wfi value */ /* also used as return value from msm_pm_collapse */
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mcr p15, 0, r0, c7, c10, 0 /* flush the cache */
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mcr p15, 0, r0, c7, c10, 4 /* memory barrier */
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mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */
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mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */
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#if defined(CONFIG_MSM_FIQ_SUPPORT)
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cpsie f
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#endif
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mov pc, lr
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ENTRY(msm_pm_collapse_exit)
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#if 0 /* serial debug */
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mov r0, #0x80000016
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mcr p15, 0, r0, c15, c2, 4
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mov r0, #0xA9000000
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add r0, r0, #0x00A00000 /* UART1 */
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/*add r0, r0, #0x00C00000*/ /* UART3 */
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mov r1, #'A'
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str r1, [r0, #0x00C]
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#endif
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ldr r1, =saved_state_end
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ldr r2, =msm_pm_collapse_exit
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adr r3, msm_pm_collapse_exit
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add r1, r1, r3
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sub r1, r1, r2
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#if defined(CONFIG_OPROFILE)
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ldmdb r1!, {r2-r5}
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mcr p15, 0, r3, c15, c12, 1 /* ccnt */
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mcr p15, 0, r4, c15, c12, 2 /* pmn0 */
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mcr p15, 0, r5, c15, c12, 3 /* pmn1 */
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mcr p15, 0, r2, c15, c12, 0 /* pmnc */
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#endif
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ldmdb r1!, {r2-r5}
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mcr p15, 0, r4, c3, c0, 0 /* dacr */
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mcr p15, 0, r3, c2, c0, 0 /* ttb */
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mcr p15, 0, r5, c13, c0, 1 /* context ID */
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ldmdb r1!, {r4-r14}
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mov r0, #1
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mcr p15, 0, r2, c1, c0, 0 /* MMU control */
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mov pc, lr
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nop
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nop
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nop
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nop
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nop
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1: b 1b
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.data
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saved_state:
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.space 4 * 11 /* r4-14 */
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.space 4 * 4 /* cp15 - MMU control, ttb, dacr, context ID */
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#if defined(CONFIG_OPROFILE)
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.space 4 * 4 /* more cp15 - pmnc, ccnt, pmn0, pmn1 */
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#endif
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saved_state_end:
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