88 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			88 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
| /* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
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|    2004, 2005
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|    Free Software Foundation, Inc.
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| 
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| This file is free software; you can redistribute it and/or modify it
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| under the terms of the GNU General Public License as published by the
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| Free Software Foundation; either version 2, or (at your option) any
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| later version.
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| 
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| In addition to the permissions in the GNU General Public License, the
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| Free Software Foundation gives you unlimited permission to link the
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| compiled version of this file into combinations with other programs,
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| and to distribute those combinations without any restriction coming
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| from the use of this file.  (The General Public License restrictions
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| do apply in other respects; for example, they cover modification of
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| the file, and distribution when not linked into a combine
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| executable.)
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| 
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| This file is distributed in the hope that it will be useful, but
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| WITHOUT ANY WARRANTY; without even the implied warranty of
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| MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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| General Public License for more details.
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| 
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| You should have received a copy of the GNU General Public License
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| along with this program; see the file COPYING.  If not, write to
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| the Free Software Foundation, 51 Franklin Street, Fifth Floor,
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| Boston, MA 02110-1301, USA.  */
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| 
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| !! libgcc routines for the Renesas / SuperH SH CPUs.
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| !! Contributed by Steve Chamberlain.
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| !! sac@cygnus.com
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| 
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| 	.balign 4
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| 	.global	__udivsi3
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| 	.type	__udivsi3, @function
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| div8:
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| 	div1 r5,r4
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| div7:
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| 	div1 r5,r4; div1 r5,r4; div1 r5,r4
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| 	div1 r5,r4; div1 r5,r4; div1 r5,r4; rts; div1 r5,r4
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| 
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| divx4:
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| 	div1 r5,r4; rotcl r0
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| 	div1 r5,r4; rotcl r0
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| 	div1 r5,r4; rotcl r0
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| 	rts; div1 r5,r4
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| 
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| __udivsi3:
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| 	sts.l pr,@-r15
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| 	extu.w r5,r0
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| 	cmp/eq r5,r0
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| 	bf/s large_divisor
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| 	div0u
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| 	swap.w r4,r0
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| 	shlr16 r4
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| 	bsr div8
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| 	shll16 r5
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| 	bsr div7
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| 	div1 r5,r4
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| 	xtrct r4,r0
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| 	xtrct r0,r4
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| 	bsr div8
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| 	swap.w r4,r4
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| 	bsr div7
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| 	div1 r5,r4
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| 	lds.l @r15+,pr
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| 	xtrct r4,r0
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| 	swap.w r0,r0
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| 	rotcl r0
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| 	rts
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| 	shlr16 r5
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| 
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| large_divisor:
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| 	mov #0,r0
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| 	xtrct r4,r0
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| 	xtrct r0,r4
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| 	bsr divx4
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| 	rotcl r0
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| 	bsr divx4
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| 	rotcl r0
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| 	bsr divx4
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| 	rotcl r0
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| 	bsr divx4
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| 	rotcl r0
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| 	lds.l @r15+,pr
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| 	rts
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| 	rotcl r0
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