105 lines
2.4 KiB
C
105 lines
2.4 KiB
C
/*
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* SH-X3 SMP
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*
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* Copyright (C) 2007 - 2008 Paul Mundt
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* Copyright (C) 2007 Magnus Damm
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/cpumask.h>
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#include <linux/smp.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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static irqreturn_t ipi_interrupt_handler(int irq, void *arg)
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{
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unsigned int message = (unsigned int)(long)arg;
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unsigned int cpu = hard_smp_processor_id();
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unsigned int offs = 4 * cpu;
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unsigned int x;
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x = ctrl_inl(0xfe410070 + offs); /* C0INITICI..CnINTICI */
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x &= (1 << (message << 2));
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ctrl_outl(x, 0xfe410080 + offs); /* C0INTICICLR..CnINTICICLR */
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smp_message_recv(message);
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return IRQ_HANDLED;
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}
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void __init plat_smp_setup(void)
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{
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unsigned int cpu = 0;
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int i, num;
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init_cpu_possible(cpumask_of(cpu));
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__cpu_number_map[0] = 0;
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__cpu_logical_map[0] = 0;
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/*
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* Do this stupidly for now.. we don't have an easy way to probe
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* for the total number of cores.
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*/
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for (i = 1, num = 0; i < NR_CPUS; i++) {
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set_cpu_possible(i, true);
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__cpu_number_map[i] = ++num;
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__cpu_logical_map[num] = i;
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}
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printk(KERN_INFO "Detected %i available secondary CPU(s)\n", num);
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}
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void __init plat_prepare_cpus(unsigned int max_cpus)
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{
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int i;
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local_timer_setup(0);
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BUILD_BUG_ON(SMP_MSG_NR >= 8);
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for (i = 0; i < SMP_MSG_NR; i++)
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request_irq(104 + i, ipi_interrupt_handler, IRQF_DISABLED,
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"IPI", (void *)(long)i);
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}
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#define STBCR_REG(phys_id) (0xfe400004 | (phys_id << 12))
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#define RESET_REG(phys_id) (0xfe400008 | (phys_id << 12))
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#define STBCR_MSTP 0x00000001
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#define STBCR_RESET 0x00000002
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#define STBCR_LTSLP 0x80000000
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#define STBCR_AP_VAL (STBCR_RESET | STBCR_LTSLP)
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void plat_start_cpu(unsigned int cpu, unsigned long entry_point)
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{
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ctrl_outl(entry_point, RESET_REG(cpu));
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if (!(ctrl_inl(STBCR_REG(cpu)) & STBCR_MSTP))
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ctrl_outl(STBCR_MSTP, STBCR_REG(cpu));
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while (!(ctrl_inl(STBCR_REG(cpu)) & STBCR_MSTP))
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cpu_relax();
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/* Start up secondary processor by sending a reset */
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ctrl_outl(STBCR_AP_VAL, STBCR_REG(cpu));
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}
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int plat_smp_processor_id(void)
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{
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return ctrl_inl(0xff000048); /* CPIDR */
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}
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void plat_send_ipi(unsigned int cpu, unsigned int message)
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{
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unsigned long addr = 0xfe410070 + (cpu * 4);
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BUG_ON(cpu >= 4);
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ctrl_outl(1 << (message << 2), addr); /* C0INTICI..CnINTICI */
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}
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